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Summary

  1. [ARM] Take into account -mcpu and -mfpu options while handling 'crypto' feature Submittin in behalf of krisb (Kristina Bessonova) <ch.bessonova@gmail.com> Summary: '+crypto' means '+aes' and '+sha2' for arch >= ARMv8 when they were not disabled explicitly. But this is correctly handled only in case of '-march' option, though the feature may also be specified through the '-mcpu' or '-mfpu' options. In the following example: $ clang -mcpu=cortex-a57 -mfpu=crypto-neon-fp-armv8 'aes' and 'sha2' are disabled that is quite unexpected: $ clang -cc1 -triple armv8--- -target-cpu cortex-a57 <...> -target-feature -sha2 -target-feature -aes -target-feature +crypto This exposed by https://reviews.llvm.org/D63936 that makes the 'aes' and 'sha2' features disabled by default. So, while handling the 'crypto' feature we need to take into account: - a CPU name, as it provides the information about architecture (if no '-march' option specified), - features, specified by the '-mcpu' and '-mfpu' options. Reviewers: SjoerdMeijer, ostannard, labrinea, dnsampaio Reviewed By: dnsampaio Subscribers: ikudrin, javed.absar, kristof.beyls, cfe-commits Tags: #clang Differential Revision: https://reviews.llvm.org/D66018 Author: krisb
  2. [LoopInterchange] Properly move condition, induction increment and ops to latch. Currently we only rely on the induction increment to come before the condition to ensure the required instructions get moved to the new latch. This patch duplicates and moves the required instructions to the newly created latch. We move the condition to the end of the new block, then process its operands. We stop at operands that are defined outside the loop, or are the induction PHI. We duplicate the instructions and update the uses in the moved instructions, to ensure other users remain intact. See the added test2 for such an example. Reviewers: efriedma, mcrosier Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D67367
  3. [NFC][ARM] Add and modify tests Add test for ParallelDSP.
Revision 371597 by dnsampaio:
[ARM] Take into account -mcpu and -mfpu options while handling 'crypto' feature

Submittin in behalf of krisb (Kristina Bessonova) <ch.bessonova@gmail.com>

Summary:
'+crypto' means '+aes' and '+sha2' for arch >= ARMv8 when they were
not disabled explicitly. But this is correctly handled only in case of
'-march' option, though the feature may also be specified through
the '-mcpu' or '-mfpu' options. In the following example:

  $ clang -mcpu=cortex-a57 -mfpu=crypto-neon-fp-armv8

'aes' and 'sha2' are disabled that is quite unexpected:

  $ clang -cc1 -triple armv8--- -target-cpu cortex-a57
    <...> -target-feature -sha2 -target-feature -aes -target-feature +crypto

This exposed by https://reviews.llvm.org/D63936 that makes
the 'aes' and 'sha2' features disabled by default.

So, while handling the 'crypto' feature we need to take into account:
  - a CPU name, as it provides the information about architecture
    (if no '-march' option specified),
  - features, specified by the '-mcpu' and '-mfpu' options.

Reviewers: SjoerdMeijer, ostannard, labrinea, dnsampaio

Reviewed By: dnsampaio

Subscribers: ikudrin, javed.absar, kristof.beyls, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D66018

Author: krisb
Change TypePath in RepositoryPath in Workspace
The file was modified/cfe/trunk/include/clang/Basic/DiagnosticDriverKinds.td (diff)clang.src/include/clang/Basic/DiagnosticDriverKinds.td
The file was modified/cfe/trunk/lib/Driver/ToolChains/Arch/ARM.cpp (diff)clang.src/lib/Driver/ToolChains/Arch/ARM.cpp
The file was modified/cfe/trunk/test/Driver/arm-features.c (diff)clang.src/test/Driver/arm-features.c
Revision 371595 by fhahn:
[LoopInterchange] Properly move condition, induction increment and ops to latch.

Currently we only rely on the induction increment to come before the
condition to ensure the required instructions get moved to the new
latch.

This patch duplicates and moves the required instructions to the
newly created latch. We move the condition to the end of the new block,
then process its operands. We stop at operands that are defined
outside the loop, or are the induction PHI.

We duplicate the instructions and update the uses in the moved
instructions, to ensure other users remain intact. See the added
test2 for such an example.

Reviewers: efriedma, mcrosier

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D67367
Change TypePath in RepositoryPath in Workspace
The file was modified/llvm/trunk/lib/Transforms/Scalar/LoopInterchange.cpp (diff)llvm.src/lib/Transforms/Scalar/LoopInterchange.cpp
The file was modified/llvm/trunk/test/Transforms/LoopInterchange/interchangeable.ll (diff)llvm.src/test/Transforms/LoopInterchange/interchangeable.ll
The file was modified/llvm/trunk/test/Transforms/LoopInterchange/perserve-lcssa.ll (diff)llvm.src/test/Transforms/LoopInterchange/perserve-lcssa.ll
The file was modified/llvm/trunk/test/Transforms/LoopInterchange/phi-ordering.ll (diff)llvm.src/test/Transforms/LoopInterchange/phi-ordering.ll
The file was added/llvm/trunk/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.llllvm.src/test/Transforms/LoopInterchange/pr43176-move-to-new-latch.ll
The file was modified/llvm/trunk/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll (diff)llvm.src/test/Transforms/LoopInterchange/reductions-across-inner-and-outer-loop.ll
Revision 371594 by sam_parker:
[NFC][ARM] Add and modify tests

Add test for ParallelDSP.
Change TypePath in RepositoryPath in Workspace
The file was added/llvm/trunk/test/CodeGen/ARM/ParallelDSP/complex_dot_prod.llllvm.src/test/CodeGen/ARM/ParallelDSP/complex_dot_prod.ll
The file was modified/llvm/trunk/test/CodeGen/ARM/ParallelDSP/unroll-n-jam-smlad.ll (diff)llvm.src/test/CodeGen/ARM/ParallelDSP/unroll-n-jam-smlad.ll