SuccessChanges

Summary

  1. [llvm-ar] Simplify and make two global variables static. NFC (details)
  2. [ThinLTO] Import virtual method with single implementation in hybrid (details)
  3. [Alignment][NFC] Use Align for TargetFrameLowering/Subtarget (details)
  4. [DAGCombine][ARM] Enable extending masked loads (details)
  5. [DFAPacketizer] Use DFAEmitter. NFC. (details)
  6. [ARM][MVE] Change VPST to use, not def, VPR (details)
  7. Revert r374931 "[llvm-objdump] Use a counter for llvm-objdump -h instead (details)
  8. [Analysis] Don't assume that unsigned overflow can't happen in (details)
  9. Try to fix the assert in Alignment::alignAddr to work on 32-bit (details)
Commit bb197dd52ac7f5caecf0b51d1e72f94b08c66746 by maskray
[llvm-ar] Simplify and make two global variables static. NFC
llvm-svn: 375082
The file was modifiedllvm/tools/llvm-ar/llvm-ar.cpp
Commit 943afb57aa65b03b29808765c4c657f03d3d0e94 by eleviant
[ThinLTO] Import virtual method with single implementation in hybrid
mode
Differential revision: https://reviews.llvm.org/D68782
llvm-svn: 375083
The file was addedllvm/test/ThinLTO/X86/Inputs/devirt_single_hybrid_bar.ll
The file was addedllvm/test/ThinLTO/X86/devirt_single_hybrid.ll
The file was modifiedllvm/lib/Transforms/IPO/WholeProgramDevirt.cpp
The file was addedllvm/test/ThinLTO/X86/Inputs/devirt_single_hybrid_foo.ll
Commit 882c43d703cd63889a5541bf8f2c014733cbbbee by gchatelet
[Alignment][NFC] Use Align for TargetFrameLowering/Subtarget
Summary: This is patch is part of a series to introduce an Alignment
type. See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this
patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet
Subscribers: jholewinski, arsenm, dschuff, jyknight, dylanmckay,
sdardis, nemanjai, jvesely, nhaehnle, sbc100, jgravelle-google,
hiraditya, aheejin, kbarton, fedor.sergeev, asb, rbar, johnrusso,
simoncook, apazos, sabuasal, niosHD, jrtc27, MaskRay, zzheng,
edward-jones, atanasyan, rogfer01, MartinMosbeck, brucehoult, the_o,
PkmX, jocewei, jsji, Jim, lenary, s.egerton, pzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68993
llvm-svn: 375084
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/lib/Target/NVPTX/NVPTXFrameLowering.cpp
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyFrameLowering.h
The file was modifiedllvm/include/llvm/CodeGen/TargetFrameLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsSubtarget.h
The file was modifiedllvm/lib/Target/X86/X86TargetMachine.cpp
The file was modifiedllvm/lib/Target/Mips/MipsTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600FrameLowering.h
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.h
The file was modifiedllvm/lib/Target/X86/X86Subtarget.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.cpp
The file was modifiedllvm/lib/Target/ARM/ARMSubtarget.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/Lanai/LanaiFrameLowering.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonFrameLowering.h
The file was modifiedllvm/lib/Target/BPF/BPFFrameLowering.h
The file was modifiedllvm/lib/Target/AVR/AVRFrameLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedllvm/lib/Target/X86/X86Subtarget.h
The file was modifiedllvm/unittests/CodeGen/MachineInstrTest.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVFrameLowering.h
The file was modifiedllvm/lib/Target/XCore/XCoreFrameLowering.cpp
The file was modifiedllvm/lib/Target/Mips/MipsSubtarget.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcFrameLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsAsmPrinter.cpp
The file was modifiedllvm/lib/Target/ARC/ARCFrameLowering.h
The file was modifiedllvm/lib/Target/MSP430/MSP430FrameLowering.h
The file was modifiedllvm/lib/Target/Mips/MipsFrameLowering.h
Commit 39af8a3a3b666929752e6bdff0bd65fedbbc34e8 by sam.parker
[DAGCombine][ARM] Enable extending masked loads
Add generic DAG combine for extending masked loads.
Allow us to generate sext/zext masked loads which can access v4i8, v8i8
and v4i16 memory to produce v4i32, v8i16 and v4i32 respectively.
Differential Revision: https://reviews.llvm.org/D68337
llvm-svn: 375085
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-store.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-load.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-maskedldst.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 12092a9691a991a0953512451af0d1421ab4d5dc by jmolloy
[DFAPacketizer] Use DFAEmitter. NFC.
Summary: This is a NFC change that removes the NFA->DFA construction and
emission logic from DFAPacketizerEmitter and instead uses the generic
DFAEmitter logic. This allows DFAPacketizer to use the Automaton class
from Support and remove a bunch of logic there too.
After this patch, DFAPacketizer is mostly logic for grepping Itineraries
and collecting functional units, with no state machine logic. This will
allow us to modernize by removing the 16-functional-unit limit and
supporting non-itinerary functional units. This is all for followup
patches.
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68992
llvm-svn: 375086
The file was modifiedllvm/utils/TableGen/DFAPacketizerEmitter.cpp
The file was modifiedllvm/include/llvm/CodeGen/DFAPacketizer.h
The file was modifiedllvm/include/llvm/Support/Automaton.h
The file was modifiedllvm/lib/CodeGen/DFAPacketizer.cpp
The file was modifiedllvm/test/CodeGen/Hexagon/packetizer-resources.ll
Commit 3ff961cabd8593f183e56e99bf161842b645a0d6 by sam.parker
[ARM][MVE] Change VPST to use, not def, VPR
Unlike VPT, VPST just uses the current value of VPR.P0.
Differential Revision: https://reviews.llvm.org/D69037
llvm-svn: 375087
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block6.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block8.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block7.mir
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block3.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block5.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block2.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-nots.mir
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vpt-block4.mir
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
Commit 312c4a6e248988a6aca72b47667c25636a319602 by hans
Revert r374931 "[llvm-objdump] Use a counter for llvm-objdump -h instead
of the section index."
This broke llvm-objdump in 32-bit builds, see e.g.
http://lab.llvm.org:8011/builders/clang-cmake-armv7-quick/builds/10925
> Summary:
> When listing the index in `llvm-objdump -h`, use a zero-based counter
instead of the actual section index (e.g. shdr->sh_index for ELF).
>
> While this is effectively a noop for now (except one unit test for
XCOFF), the index values will change in a future patch that filters
certain sections out (e.g. symbol tables). See D68669 for more context.
Note: the test case in `test/tools/llvm-objdump/X86/section-index.s`
already covers the case of incrementing the section index counter when
sections are skipped.
>
> Reviewers: grimar, jhenderson, espindola
>
> Reviewed By: grimar
>
> Subscribers: emaste, sbc100, arichardson, aheejin, arphaman, seiya,
llvm-commits, MaskRay
>
> Tags: #llvm
>
> Differential Revision: https://reviews.llvm.org/D68848
llvm-svn: 375088
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.h
The file was modifiedllvm/test/tools/llvm-objdump/xcoff-section-headers.test
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
Commit b6534b2a26fa94e4d09d271faf538b1e4b19ab5d by mikhail.maltsev
[Analysis] Don't assume that unsigned overflow can't happen in
EmitGEPOffset (PR42699)
Summary: Currently when computing a GEP offset using the function
EmitGEPOffset for the following instruction
  getelementptr inbounds i32, i32* %p, i64 %offs
we get
  mul nuw i64 %offs, 4
Unfortunately we cannot assume that unsigned wrapping won't happen here
because %offs is allowed to be negative.
Making such assumptions can lead to miscompilations: see the new test
test24_neg_offs in InstCombine/icmp.ll. Without the patch InstCombine
would generate the following comparison:
   icmp eq i64 %offs, 4611686018427387902; 0x3ffffffffffffffe
Whereas the correct value to compare with is -2.
This patch replaces the NUW flag with NSW in the multiplication
instructions generated by EmitGEPOffset and adjusts the test suite.
https://bugs.llvm.org/show_bug.cgi?id=42699
Reviewers: chandlerc, craig.topper, ostannard, lebedev.ri, spatel,
efriedma, nlopes, aqjune
Reviewed By: lebedev.ri
Subscribers: reames, lebedev.ri, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68342
llvm-svn: 375089
The file was modifiedllvm/include/llvm/Analysis/Utils/Local.h
The file was modifiedllvm/test/Transforms/InstCombine/gep-custom-dl.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-custom-dl.ll
The file was modifiedllvm/test/Transforms/InstCombine/getelementptr.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll
Commit 77cad0b047e3c56e7205c5880fe57354d2d4867c by hans
Try to fix the assert in Alignment::alignAddr to work on 32-bit
Hopefully fixing the AlignmentDeathTest.AlignAddr failures (e.g. at
http://lab.llvm.org:8011/builders/clang-cmake-armv7-quick/builds/10925)
llvm-svn: 375090
The file was modifiedllvm/include/llvm/Support/Alignment.h