FailedChanges

Summary

  1. [lldb] [test] XFAIL TestExpressionEvaluation on NetBSD (details)
  2. [Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` with (details)
  3. [Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` (details)
  4.     [WIP][Attributor] AAReachability Attribute (details)
  5. [OpenMP][Tool] Fix cmake variable in lit.site.cfg.in (details)
  6. [Test] Fix freeze ocaml test failure (details)
  7. Reland "[DAGCombiner] Allow zextended load combines." (details)
  8. [OpenMP][Tool] disable archer tests in standalone build (details)
Commit 06e03bce802e35a7401ab0849515ad1ce0dd21f5 by mgorny
[lldb] [test] XFAIL TestExpressionEvaluation on NetBSD
The file was modifiedlldb/test/Shell/Reproducer/Functionalities/TestExpressionEvaluation.test
Commit 3f46022e33bd33b3d8f816be3c3adbe7de806119 by lebedev.ri
[Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2` with
tautological C1 u<= C2 (PR35479)
Summary: This is a preparatory cleanup before i add more of this fold to
deal with comparisons with non-zero.
In essence, the current lowering is:
``` Name: (X % C1) == 0 -> X * C3 <= C4 Pre: (C1 u>>
countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in
precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, 0
=>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%r = icmp ule i8 %n3, %C4
``` https://rise4fun.com/Alive/oqd
It kinda just works, really no weird edge-cases. But it isn't all that
great for when comparing with non-zero. In particular, given `(X % C1)
== C2`, there will be problems in the always-false tautological case
where `C2 u>= C1`: https://rise4fun.com/Alive/pH3
That case is tautological, always-false:
``` Name: (X % Y) u>= Y
%o0 = urem i8 %x, %y
%r = icmp uge i8 %o0, %y
=>
%r = false
``` https://rise4fun.com/Alive/ofu
While we can't/shouldn't get such tautological case normally, we do deal
with non-splat vectors, so unless we want to give up in this case, we
need to fixup/short-circuit such lanes.
There are two lowering variants: 1. We can blend between whatever
computed result and the correct tautological result
``` Name: (X % C1) == C2 -> X * C3 <= C4 || false Pre: (C2 == 0 || C1
u<= C2) && (C1 u>> countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in
precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
=>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%res = icmp ule i8 %n3, %C4
%r = select i1 %is_tautologically_false, i1 0, i1 %res
``` https://rise4fun.com/Alive/PjT5 https://rise4fun.com/Alive/1KV
2. We can invert the comparison result
``` Name: (X % C1) == C2 -> X * C3 <= C4 || false Pre: (C2 == 0 || C1
u<= C2) && (C1 u>> countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in
precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
=>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n3, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
``` https://rise4fun.com/Alive/2xC https://rise4fun.com/Alive/jpb5
3. We can expand into `and`/`or`: https://rise4fun.com/Alive/WGn
https://rise4fun.com/Alive/lcb5
Blend-one is likely better since we avoid having to load the replacement
from constant pool. `xor` is second best since it's still pretty
general. I'm not adding `and`/`or` variants.
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: nick, hiraditya, xbolva00, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70051
The file was modifiedllvm/test/CodeGen/X86/urem-seteq-vec-tautological.ll
The file was modifiedllvm/test/CodeGen/AArch64/urem-seteq-vec-tautological.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 96cf5c8d4784cd8763977608e2890c0683ebf7b4 by lebedev.ri
[Codegen] TargetLowering::prepareUREMEqFold(): `x u% C1 ==/!= C2`
(PR35479)
Summary: The current lowering is:
``` Name: (X % C1) == C2 -> X * C3 <= C4 || false Pre: (C2 == 0 || C1
u<= C2) && (C1 u>> countTrailingZeros(C1)) * C3 == 1
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in
precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
=>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = -1 /u C1
%n0 = mul i8 %x, C3
%n1 = lshr i8 %n0, countTrailingZeros(C1) ; rotate right
%n2 = shl i8 %n0, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n3 = or i8 %n1, %n2 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n3, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
``` https://rise4fun.com/Alive/2xC https://rise4fun.com/Alive/jpb5
However, we can support non-tautological cases `C1 u> C2` too. Said
handling consists of two parts:
* `C2 u<= (-1 %u C1)`. It just works. We only have to change `(X % C1)
== C2` into `((X - C2) % C1) == 0`
``` Name: (X % C1) == C2 -> (X - C2) * C3 <= C4   iff C2 u<= (-1 %u C1)
Pre: (C1 u>> countTrailingZeros(C1)) * C3 == 1 && C2 u<= (-1 %u C1)
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in
precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
=>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = (-1 /u C1)
%n0 = sub i8 %x, C2
%n1 = mul i8 %n0, C3
%n2 = lshr i8 %n1, countTrailingZeros(C1) ; rotate right
%n3 = shl i8 %n1, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n4 = or i8 %n2, %n3 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n4, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
``` https://rise4fun.com/Alive/m4P https://rise4fun.com/Alive/SKrx
* `C2 u> (-1 %u C1)`. We also have to change `(X % C1) == C2` into `((X
- C2) % C1) == 0`,
and we have to decrement C4:
``` Name: (X % C1) == C2 -> (X - C2) * C3 <= C4   iff C2 u> (-1 %u C1)
Pre: (C1 u>> countTrailingZeros(C1)) * C3 == 1 && C2 u> (-1 %u C1)
%zz = and i8 C3, 0 ; trick alive into making C3 avaliable in
precondition
%o0 = urem i8 %x, C1
%r = icmp eq i8 %o0, C2
=>
%zz = and i8 C3, 0 ; and silence it from complaining about said reg
%C4 = (-1 /u C1)-1
%n0 = sub i8 %x, C2
%n1 = mul i8 %n0, C3
%n2 = lshr i8 %n1, countTrailingZeros(C1) ; rotate right
%n3 = shl i8 %n1, ((8-countTrailingZeros(C1)) %u 8) ; rotate right
%n4 = or i8 %n2, %n3 ; rotate right
%is_tautologically_false = icmp ule i8 C1, C2
%C4_fixed = select i1 %is_tautologically_false, i8 -1, i8 %C4
%res = icmp ule i8 %n4, %C4_fixed
%r = xor i1 %res, %is_tautologically_false
``` https://rise4fun.com/Alive/d40 https://rise4fun.com/Alive/8cF
I believe this concludes `x u% C1 ==/!= C2` lowering. In fact, clang is
may now be better in this regard than gcc: as it can be seen from
`@t32_6_4` test, we do lower `x % 6 == 4` via this pattern, while gcc
does not: https://godbolt.org/z/XNU2z9 And all the general alive proofs
say this is legal. And manual checking agrees:
https://rise4fun.com/Alive/WA2
Fixes [[ https://bugs.llvm.org/show_bug.cgi?id=35479 | PR35479 ]].
Reviewers: RKSimon, craig.topper, spatel
Reviewed By: RKSimon
Subscribers: nick, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70053
The file was modifiedllvm/test/CodeGen/X86/urem-seteq-nonzero.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/urem-seteq-vec-nonzero.ll
The file was modifiedllvm/test/CodeGen/AArch64/urem-seteq-nonzero.ll
The file was modifiedllvm/test/CodeGen/X86/urem-seteq-vec-nonzero.ll
Commit 04945c92ce00e5388be3ab493135b934a25903b4 by pgode
    [WIP][Attributor] AAReachability Attribute
     Summary: Working towards Johannes's suggestion for fixme, in
Attributor's Noalias attribute deduction.
(ii) Check whether the value is captured in the scope using AANoCapture.
FIXME: This is conservative though, it is better to look at CFG and
// check only uses possibly executed before this call site.
A Reachability abstract attribute answers the question "does execution
at point A potentially reach point B". If this question is answered with
false for all other uses of the value that might be captured, we know it
is not *yet* captured and can continue with the noalias deduction.
Currently, information AAReachability provides is completely
pessimistic.
    Reviewers: jdoerfert
    Reviewed By: jdoerfert
    Subscribers: uenoku, sstefan1, hiraditya, llvm-commits
    Differential Revision: https://reviews.llvm.org/D70233
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
Commit ac21de0d7eb8e2c4ab85bfc41fcc7b90b93b1ffc by protze
[OpenMP][Tool] Fix cmake variable in lit.site.cfg.in
As noted in D45890
The file was modifiedopenmp/tools/archer/tests/lit.site.cfg.in
Commit 1465b8bc3a2435eab46582616bdf7c6aee117e8d by aqjune
[Test] Fix freeze ocaml test failure
The file was modifiedllvm/bindings/ocaml/llvm/llvm_ocaml.c
The file was modifiedllvm/test/Bindings/OCaml/core.ml
The file was modifiedllvm/bindings/ocaml/llvm/llvm.mli
The file was modifiedllvm/bindings/ocaml/llvm/llvm.ml
Commit cb15ba84fe7ca289ae561b0e770e7219da40e807 by courbet
Reland "[DAGCombiner] Allow zextended load combines."
Check that the generated type is simple.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/load-combine.ll
The file was modifiedllvm/test/CodeGen/ARM/load-combine-big-endian.ll
The file was modifiedllvm/test/CodeGen/X86/load-combine.ll
The file was modifiedllvm/test/CodeGen/AArch64/load-combine-big-endian.ll
The file was modifiedllvm/test/CodeGen/ARM/load-combine.ll
Commit 6b2431e0c2af0fd01f86d162330ac0b66bc0f2e5 by protze
[OpenMP][Tool] disable archer tests in standalone build
Will be enabled after Build-Bots are fixed
The file was modifiedopenmp/tools/archer/tests/CMakeLists.txt