Started 1 mo 16 days ago
Took 7 hr 16 min

Success Build #1895 (Aug 3, 2020 11:05:54 PM)

Changes
  1. [clang] Include trailing-requires-clause in FunctionDecl's source range (details)
  2. [mlir][Linalg] Conv ops lowering to std calls added. (details)
  3. [JumpThreading] Don't limit the type of an operand (details)
  4. [NFC] [PowerPC] Refactor fp/int conversion lowering (details)
  5. [JumpThreading] Merge/rename thread-two-bbsN.ll tests; NFC (details)
  6. [llvm-readobj] - Simplify findSectionByName(). NFCI. (details)
  7. [clang-tidy] Fix regression in RenamerClangTidy (details)
  8. [MLIR] Add an integration test for 2 D vector.transfer_read (details)
  9. [DebugInfo][unittest] Use YAML to generate the .debug_loclists section. (details)
  10. [llvm-readobj/readelf] - Refine the implementation of printMipsOptions(). (details)
  11. [llvm-readobj] - An attempt to fix BB. (details)
  12. [analyzer] Model iterator random incrementation symmetrically (details)
  13. [llvm-readobj] - A second attempt to fix BB. (details)
  14. [X86][AVX] Add v8f32 'reverse' HADD(SHUFFLE,SHUFFLE) test coverage (details)
  15. Partially revert "[cmake] Make MSVC generate appropriate __cplusplus macro definition" (details)
  16. [SCEV] Consolidate some smin/smax folding tests into single test file. (details)
  17. [AArch64] Consider instruction-level contract FMFs in combiner patterns. (details)
  18. Revert rG66e7dce714fab "Revert "[X86][SSE] Shuffle combine blends to OR(X,Y) if the relevant elements are known zero."" (details)
  19. [ARM] Generated SSAT and USAT instructions with shift (details)
  20. [BasicAA] Enable -basic-aa-recphi by default (details)
  21. [llvm-readobj] - A third attempt to fix BB. (details)
  22. [lldb] fix typo (details)
  23. [JumpThreading] Add a test for simplification of cast of any op; NFC (details)
  24. [JumpThreading] Remove cast's constraint (details)
  25. [SVE] Replace remaining _MERGE_OP1 nodes with _PRED variants. (details)
  26. [YAMLTraits] Fix mapping <none> value that followed by comments. (details)
  27. [AArch64][SVE] Fix CFA calculation in presence of SVE objects. (details)
  28. [AArch64][SVE] Add missing unwind info for SVE registers. (details)
  29. [JumpThreading] Update test freeze.ll; NFC (details)
  30. [MLIR][SPIRVToLLVM] Indentation and style fix in tests (details)
  31. [mlir] Fix adding wrong operand value in `promoteMemRefDescriptors`. (details)
  32. [mlir] translate types between MLIR LLVM dialect and LLVM IR (details)
  33. [mlir] provide same APIs as existing LLVMType in the new LLVM type modeling (details)

Started by upstream project LLDB Incremental build number 23217
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Started by upstream project LLDB Incremental build number 23218
originally caused by:

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Started by upstream project LLDB Incremental build number 23219
originally caused by:

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This run spent:

  • 11 hr waiting;
  • 7 hr 16 min build duration;
  • 12 hr total from scheduled to completion.
Revision: 334aee1e5a0e7690f7490a2619c94d3a15c0b181
  • refs/remotes/origin/master
Revision: 6abd7e2e622bc7eabdb673a7815f6673523a1e94
  • refs/remotes/origin/master
Revision: 334aee1e5a0e7690f7490a2619c94d3a15c0b181
  • refs/remotes/origin/master