1. Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets (details)
  2. [RISCV] eliminate the repetition declare of SDLoc DL (details)
  3. [NFC][PowerPC] Add a multiclass for fsetcc to define them in a uniform way (details)
  4. [FLANG] Fix issues in SELECT TYPE construct when intrinsic type specification is specified in TYPE GUARD statement. (details)
  5. [MC] Default MCAsmBackend::mayNeedRelaxation() to false (details)
  6. [OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 3 (details)
  7. [gn build] Port 160ff83765a (details)
  8. [CMake] Default ENABLE_X86_RELAX_RELOCATIONS to ON (details)
  9. [MLIR][SPIRV] Control attributes support for loop and selection (details)
  10. [NFC] [MIR] Document the reg state flags (details)
Commit b497665d98ad5026b1d3d67d5793a28fefe27bea by i
Reland D64327 [MC][ELF] Allow STT_SECTION referencing SHF_MERGE on REL targets

This drops a GNU gold workaround and reverts the revert commit rL366708.

  Before binutils 2.34, gold -O2 and above did not correctly handle R_386_GOTOFF to

From the original review:

  ... it reduced the size of a big ARM-32 debug image by 33%. It contained ~68M
  of relocations symbols out of total ~71M symbols (96% of symbols table was
  generated for relocations with symbol).

-Wl,-O2 (and -Wl,-O3) is so rare that we should just lower the
optimization level for LLVM_LINKER_IS_GOLD rather than pessimizing all users.
The file was modifiedllvm/lib/MC/ELFObjectWriter.cpp
The file was modifiedllvm/test/MC/Mips/xgot.s
The file was modifiedllvm/test/MC/ELF/compression.s
The file was modifiedllvm/test/MC/Mips/elf-relsym.s
The file was modifiedllvm/test/MC/ELF/basic-elf-32.s
The file was modifiedllvm/test/MC/ELF/relocation-386.s
The file was modifiedllvm/cmake/modules/AddLLVM.cmake
Commit a96921afa7024533cf451ef13708082876233eef by luxufan981014
[RISCV] eliminate the repetition declare of SDLoc DL

Differential revision:
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit 62e4644616dc87dca73357b2a4bf1487ce74e90d by qshanz
[NFC][PowerPC] Add a multiclass for fsetcc to define them in a uniform way

This is a refactor patch to prepare for adding the support for strict-fsetcc
in PowerPC backend. We want to move their definition into a uniform way so that,
we could add the strict node easier.

Reviewed By: shchenz

Differential Revision:
The file was modifiedllvm/lib/Target/PowerPC/
Commit 594dec2884a4814dc97ebdfa7c83ef15bdfb379e by inderjeet_kalra
[FLANG] Fix issues in SELECT TYPE construct when intrinsic type specification is specified in TYPE GUARD statement.

Fix of PR46789 and PR46830.

Differential Revision:
The file was modifiedflang/lib/Semantics/check-select-type.cpp
The file was modifiedflang/test/Semantics/selecttype01.f90
The file was modifiedflang/test/Semantics/symbol11.f90
Commit 40da58a04bea6879e1b52a4ba35559f9d26bee07 by i
[MC] Default MCAsmBackend::mayNeedRelaxation() to false
The file was modifiedllvm/lib/Target/MSP430/MCTargetDesc/MSP430AsmBackend.cpp
The file was modifiedllvm/lib/Target/BPF/MCTargetDesc/BPFAsmBackend.cpp
The file was modifiedllvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCAsmBackend.cpp
The file was modifiedllvm/lib/Target/WebAssembly/MCTargetDesc/WebAssemblyAsmBackend.cpp
The file was modifiedllvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
The file was modifiedllvm/lib/Target/AVR/MCTargetDesc/AVRAsmBackend.h
The file was modifiedllvm/lib/Target/Mips/MCTargetDesc/MipsAsmBackend.h
The file was modifiedllvm/include/llvm/MC/MCAsmBackend.h
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCAsmBackend.cpp
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcAsmBackend.cpp
The file was modifiedllvm/lib/Target/Lanai/MCTargetDesc/LanaiAsmBackend.cpp
Commit 160ff83765ac284f3c7dd7b25d4ef105b9952ac0 by Saiyedul.Islam
[OpenMP][AMDGCN] Support OpenMP offloading for AMDGCN architecture - Part 3

Provides AMDGCN and NVPTX specific specialization of getGPUWarpSize,
getGPUThreadID, and getGPUNumThreads methods. Adds tests for AMDGCN
codegen for these methods in generic and simd modes. Also changes the
precondition in InitTempAlloca to be slightly more permissive. Useful for
AMDGCN OpenMP codegen where allocas are created with a cast to an
address space.

Reviewed By: ABataev

Differential Revision:
The file was modifiedclang/lib/CodeGen/CMakeLists.txt
The file was addedclang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.cpp
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was addedclang/lib/CodeGen/CGOpenMPRuntimeAMDGCN.h
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeNVPTX.h
The file was addedclang/test/OpenMP/amdgcn_target_codegen.cpp
The file was addedclang/test/OpenMP/amdgcn_target_init_temp_alloca.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeGPU.h
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntimeNVPTX.cpp
Commit 5a4cd55e5d1452db7043ef9e9f1211172a6a10e1 by llvmgnsyncbot
[gn build] Port 160ff83765a
The file was modifiedllvm/utils/gn/secondary/clang/lib/CodeGen/
Commit c41a18cf61790fc898dcda1055c3efbf442c14c0 by i

This makes clang default to -Wa,-mrelax-relocations=yes, which enables
R_386_GOT32X (GNU as enables it regardless of -mrelax-relocations=) and
R_X86_64_[REX_]GOTPCRELX in MC. The produced object files require GNU ld>=2.26
to link. binutils 2.26 is considered a very old release today.
The file was modifiedclang/CMakeLists.txt
The file was modifiedllvm/utils/gn/secondary/clang/include/clang/Config/
Commit 91f6a5f7854a542611ed76442acb1ec375a9feb2 by georgemitenk0v
[MLIR][SPIRV] Control attributes support for loop and selection

This patch handles loopControl and selectionControl in parsing and
printing. In order to reuse the functionality, and avoid handling cases when
`{` of the region is parsed as a dictionary attribute, `control` keyword was
introduced.`None` is a default control attribute. This functionality can be
later extended to `spv.func`.
Also, loopControl and selectionControl can now be (de)serialized.

Reviewed By: antiagainst

Differential Revision:
The file was modifiedmlir/test/Dialect/SPIRV/Serialization/selection.mlir
The file was modifiedmlir/test/Dialect/SPIRV/Serialization/loop.mlir
The file was modifiedmlir/test/Dialect/SPIRV/control-flow-ops.mlir
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Deserializer.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
Commit 4fdc4d892b988bb9f2e06c3440971d28d6361722 by djolertrk
[NFC] [MIR] Document the reg state flags

This patch adds documentation for the RegState enumeration.

Differential Revision:
The file was modifiedllvm/include/llvm/CodeGen/MachineInstrBuilder.h