Started 1 mo 10 days ago
Took 10 hr

Success Build #952 (Jan 9, 2020 12:04:59 PM)

Changes
  1. [PowerPC] The VK_PLT symbolref modifier is only used on 32-bit ELF. (details)
  2. [X86] AMD Znver2 (Rome) Scheduler enablement (details)
  3. [ms] [X86] Use "P" modifier on all branch-target operands in inline X86 (details)
  4. [clang] Enforce triple in mempcpy test (details)
  5. [GlobalISel][AArch64] Import + select LDR*roW and STR*roW patterns (details)
  6. [X86] Add ueq/one fp128 quiet compare tests. NFC (details)
  7. Re-apply "[ELF] Allow getErrPlace() to work before Out::bufferStart is (details)
  8. MipsDelaySlotFiller: Update registers def-uses for BUNDLE instructions (details)
  9. [mlir] NFC: Move the state for managing SSA value names out of (details)
  10. [libc++] Explicitly enumerate std::string external instantiations. (details)
  11. [clang-tidy] Refresh the add_new_check.py now that we use a table + (details)
  12. [clangd] Handle DeducedTemplateSpecializationType in TargetFinder (details)
  13. phab doc: remove the svn section (details)
  14. phab doc: also document 'arc land' (details)
  15. phab doc: Replace or remove references to svn (details)
  16. AMDGPU/GlobalISel: Widen 16-bit shift amount sources (details)
  17. AMDGPU/GlobalISel: Fix argument lowering for vectors of pointers (details)
  18. GlobalISel: Don't assert on MoreElements creating vectors (details)
  19. TableGen/GlobalISel: Address fixme (details)
  20. GlobalISel: Move getLLTForMVT/getMVTForLLT (details)
  21. Add gdb pretty printer for MutableArrayRef, remove ConstArrayRef. (details)
  22. Add builtins for aligning and checking alignment of pointers and (details)
  23. [mlir] mlir-cpu-runner test's cblas_interface should export functions on (details)
  24. [mlir] add a missing dependency for Linalg conversion (details)
  25. [AArch64][GlobalISel] Implement selection of <2 x float> vector splat. (details)
  26. CodeGen: Use LLT instead of EVT in getRegisterByName (details)
  27. GlobalISel: Fix else after return (details)
  28. DAG: Don't use unchecked dyn_cast (details)
  29. GlobalISel: Handle llvm.read_register (details)
  30. TableGen/GlobalISel: Add way for SDNodeXForm to work on timm (details)
  31. TableGen/GlobalISel: Fix pattern matching of immarg literals (details)
  32. [lldb/Lua] Add lua typemaps for INOUT params (details)
  33. [mlir] Use getDenseElementBitwidth instead of (details)
  34. When diagnosing the lack of a viable conversion function, also list (details)
  35. AVR: Update for getRegisterByName change (details)
  36. [lldb] Remove spurious file (details)
  37. [AMDGPU] Fix bundle scheduling (details)
  38. When reading Aux file in chunks, read consecutive byte ranges (details)
  39. [ELF] Fix includeInDynsym() when an undefined weak is merged with a lazy (details)
  40. AMDGPU/GlobalISel: Fix G_EXTRACT_VECTOR_ELT mapping for s-v case (details)
  41. AMDGPU/GlobalISel: Select G_EXTRACT_VECTOR_ELT (details)
  42. Relax opcode checks in test for G_READCYCLECOUNTER to check for only a (details)
  43. CWG2352: Allow qualification conversions during reference binding. (details)
  44. [NFC] Style cleanup (details)
  45. fix a few typos to cycle the bots (details)
  46. fix another typo to cycle bots (details)

Started by upstream project LLDB Incremental build number 5563
originally caused by:

Started by upstream project LLDB Incremental build number 5564
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Started by upstream project LLDB Incremental build number 5565
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Started by upstream project LLDB Incremental build number 5566
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Started by upstream project LLDB Incremental build number 5567
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Started by upstream project LLDB Incremental build number 5568
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Started by upstream project LLDB Incremental build number 5569
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Started by upstream project LLDB Incremental build number 5575
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Started by upstream project LLDB Incremental build number 5576
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Started by upstream project LLDB Incremental build number 5577
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Started by upstream project LLDB Incremental build number 5578
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Started by upstream project LLDB Incremental build number 5579
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This run spent:

  • 13 hr waiting;
  • 10 hr build duration;
  • 15 hr total from scheduled to completion.
Revision: 66f206567090b1d6e4879775d8308d3715379515
  • refs/remotes/origin/master
Revision: 01662aeb5d1fcef4f067caec633d0c85bb3062a7
  • refs/remotes/origin/master
Revision: 66f206567090b1d6e4879775d8308d3715379515
  • refs/remotes/origin/master