Started 1 mo 4 days ago
Took 8 hr 22 min

Success Build #957 (Jan 13, 2020 4:39:11 AM)

Changes
  1. [Driver] Fix OptionClass of -fconvergent-functions and -fms-volatile (details)
  2. [Concepts] Fix MarkUsedTemplateParameters for exprs (details)
  3. Remove umask tests (details)
  4. [COFF] Align ARM64 range extension thunks at instruction boundary (details)
  5. [TargetLowering][ARM][Mips][WebAssembly] Remove the ordered FP compare (details)
  6. [SCEV] [NFC] add more test cases for range of addrecexpr with nsw flag (details)
  7. [NFC] [PowerPC] Update mi-peephole-splat test (details)
  8. [AMDGPU] Remove unnecessary v_mov from a register to itself in WQM (details)
  9. Mark the test/Feature/load_extension.ll test as unsupported on Darwin. (details)
  10. [X86] Use ReplaceAllUsesWith instead of ReplaceAllUsesOfValueWith to (details)
  11. [X86][Disassembler] Simplify readPrefixes (details)
  12. [X86] Preserve fpexcept property when turning strict_fp_extend and (details)
  13. [X86] Simplify code by removing an unreachable condition. NFCI (details)
  14. Add test for GDB pretty printers. (details)
  15. [X86] Remove dead code from X86DAGToDAGISel::Select that is no longer (details)
  16. [InstCombine] Preserve nuw on sub of geps (PR44419) (details)
  17. [LoopSimplify] Regenerate test checks; NFC (details)
  18. [LoopRotate] Add tests for rotate with switch; NFC (details)
  19. DSE: fix bug where we would only check libcalls for name rather than (details)
  20. [X86] Add more complex tests for vector masks used with AND/OR/XOR. (details)
  21. [X86][AVX] Add lowerShuffleAsLanePermuteAndSHUFP lowering (details)
  22. Fix copy+paste typo in shuffle test name (details)
  23. [Sema] Improve -Wrange-loop-analysis warnings. (details)
  24. [X86] Fix outdated comment (details)
  25. moveOperands - assert Src/Dst MachineOperands are non-null. (details)
  26. Remove copy ctors identical to the default one. NFC. (details)
  27. Fix uninitialized value clang static analyzer warning. NFC. (details)
  28. Fix "pointer is null" static analyzer warning. NFCI. (details)
  29. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  30. Fix "pointer is null" static analyzer warning. NFCI. (details)
  31. Fix "pointer is null" static analyzer warning. NFCI. (details)
  32. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  33. GlobalModuleIndex - Fix use-after-move clang static analyzer warning. (details)
  34. [X86AsmBackend] Be consistent about placing definitions out of line (details)
  35. [X86AsmBackend] Move static function before sole use [NFC] (details)
  36. [X86] Adjust nop emission by compiler to consider target decode (details)
  37. [mlir] NFC: Remove Value::operator* and Value::operator-> now that Value (details)
  38. [ASTMatchers] extract public matchers from const-analysis into own patch (details)
  39. Revert "[ASTMatchers] extract public matchers from const-analysis into (details)
  40. [ExecutionEngine] Re-enable FastISel for non-iOS arm targets. (details)
  41. Add -Wrange-loop-analysis changes to ReleaseNotes (details)
  42. [X86] Turn FP_ROUND/STRICT_FP_ROUND into (details)
  43. [X86][Disassembler] Simplify and optimize reader functions (details)
  44. [LegalizeVectorOps] Only pass SDNode* instead SDValue to all of the (details)
  45. [LegalizeVectorOps] Remove some of the simpler Expand methods. Pass (details)
  46. [X86][Disassembler] Replace custom logger with LLVM_DEBUG (details)
  47. [Support] Optionally call signal handlers when a function wrapped by the (details)
  48. [ORC] Fix argv handling in runAsMain / lli. (details)
  49. [Disassembler] Delete the VStream parameter of (details)
  50. [X86][Disassembler] Optimize argument passing and immediate reading (details)
  51. [X86][Disassembler] Shrink X86GenDisassemblerTables.inc from 36M to 6.1M (details)
  52. [LegalizeVectorOps] Expand vector MERGE_VALUES immediately. (details)
  53. [TargetLowering][X86] Connect the chain from STRICT_FSETCC in (details)
  54. [LegalizeVectorOps] Parallelize the lo/hi part of STRICT_UINT_TO_FLOAT (details)
  55. [SCEV] more accurate range for addrecexpr with nsw flag. (details)
  56. [X86] Don't call LowerSETCC from LowerSELECT for (details)
  57. [NFC] Refactor memory ops cluster method (details)
  58. [profile] Support merge pool size >= 10 (details)
  59. [X86][Disassembler] Simplify (details)
  60. [X86][Disassembler] Merge X86DisassemblerDecoder.cpp into (details)
  61. [X86][AVX] lowerShuffleAsLanePermuteAndSHUFP - only set the demanded (details)
  62. [X86][AVX] Use lowerShuffleAsLanePermuteAndSHUFP to lower binary v4f64 (details)
  63. [AMDGPU] Regenerate shl shift tests (details)
  64. [MIPS] Regenerate shl/lshr shift tests (details)
  65. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  66. [PowerPC] Delete PPCDarwinAsmPrinter and PPCMCAsmInfoDarwin (details)
  67. [NFC] Fix compilation of CrashRecoveryContext.cpp on mingw (details)
  68. __patchable_function_entries: don't use linkage field 'unique' with (details)
  69. [AMDGPU] Add gfx8 assembler and disassembler test cases (details)
  70. [MC][ELF] Emit a relocation if target is defined in the same section and (details)
  71. Fix "pointer is null" static analyzer warning. NFCI. (details)
  72. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  73. [RISCV] Check register class for AMO memory operands (details)
  74. [SCEV] accurate range for addrecexpr with nuw flag (details)
  75. [clangd] Assert that the testcases in FindExplicitReferencesTest.All (details)
  76. [clangd] Show template arguments in type hierarchy when possible (details)
  77. AMDGPU/GlobalISel: Copy type when inserting readfirstlane (details)
  78. AMDGPU/GlobalISel: Don't use XEXEC class for SGPRs (details)
  79. AMDGPU: Split test function (details)
  80. [X86] Use SDNPOptInGlue instead of SDNPInGlue on a couple SDNodes. (details)
  81. [DWARF5][DebugInfo]: Added support for DebugInfo generation for auto (details)
  82. [DWARF5][clang]: Added support for DebugInfo generation for auto return (details)
  83. [SCEV] Follow up of D71563: addressing post commit comment. NFC. (details)
  84. [NFC] Update loop.decrement.reg intrinsic comment (details)
  85. Add zero_extendi and sign_extendi to intrinsic namespace (details)
  86. [lldb] Mark several tests as not dependent on debug info (details)
  87. [RISCV] Collect Statistics on Compressed Instructions (details)
  88. [clangd] Publish xref for macros from Index and AST. (details)
  89. Revert "[DWARF5][clang]: Added support for DebugInfo generation for auto (details)
  90. [lldb] Fix eh-frame-small-fde test for changes in lld (details)
  91. This option allows selecting the TLS size in the local exec TLS model, (details)
  92. ARMLowOverheadLoops: return earlier to avoid printing irrelevant dbg (details)
  93. [DebugInfo][Support] Replace DWARFDataExtractor size function (details)
  94. [lldb][NFC] Use range-based for loops in IRInterpreter (details)
  95. [lldb] Fix lookup of symbols with the same address range but different (details)
  96. [X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI. (details)
  97. [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in (details)
  98. [llvm-exegesis][mips] Expand loadImmediate() (details)
  99. [clangd] Remove raw string literals in macros (details)
  100. [X86][SSE] Add knownbits test showing missing (details)
  101. [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() (details)
  102. [clang] Remove raw string literals in macros (details)
  103. [lldb][NFC] Remove debug print statement from TestExprDiagnostics.py (details)
  104. [llvm-exegesis] Remove unneeded std::move() (details)
  105. GlobalISel: Fix assertion on wide G_ZEXT sources (details)
  106. [FPEnv] Fix chain handling for fpexcept.strict nodes (details)
  107. Revert "[libc++] Explicitly enumerate std::string external (details)
  108. [X86] Add knownbits tests showing missing shift amount demanded elts (details)
  109. [SelectionDAG] ComputeKnownBits - Add DemandedElts support to (details)
  110. [SelectionDAG] ComputeNumSignBits - Use getValidShiftAmountConstant for (details)
  111. [InstSimplify] move tests for select from InstCombine; NFC (details)
  112. [MIPS][ELF] Use PC-relative relocations in .eh_frame when possible (details)
  113. [MIPS] Don't emit R_(MICRO)MIPS_JALR relocations against data symbols (details)
  114. [AArch64] Emit HINT instead of PAC insns in Armv8.2-A or below (details)
  115. Add missing triples to tests in 0c29d3ff2233696f663ae34a8aeda23c750ac68f (details)
  116. Sema::getOwningModule - take const Decl* type. (details)
  117. Fix "pointer is null" static analyzer warnings. NFCI. (details)
  118. Fix some cppcheck shadow variable warnings. NFCI. (details)
  119. Merge isVectorType() and getAs<VectorType> calls to silence clang static (details)
  120. Fix cppcheck uninitialized variable in DiffTree() constructor warning. (details)
  121. [RISCV] Handle globals and block addresses in asm operands (details)
  122. [Clang][Driver] Re-use the calling process instead of creating a new (details)
  123. [mlir][Linalg] Update ReshapeOp::build to be more idiomatic (details)
  124. [Inlining] Add PreInlineThreshold for the new pass manager (details)
  125. [mlir] Added missing GPU lowering ops. (details)
  126. [mlir] m_Constant() (details)
  127. [DebugInfo] Make debug line address size mismatch non-fatal to parsing (details)
  128. [ThinLTO] Add additional ThinLTO pipeline testing with new PM (details)
  129. [AArch64][SVE] Add patterns for some arith SVE instructions. (details)
  130. [Scheduler] Remove superfluous casts. NFC (details)
  131. [X86] Add AVX2 known signbits codegen tests (details)
  132. [X86][SSE] Add sitofp(ashr(x,y)) test case with non-uniform shift value (details)
  133. [SelectionDAG] ComputeNumSignBits add (details)
  134. [LegalizeTypes] Add SoftenFloatResult support for (details)
  135. [lldb/Scripts] Remove SWIG bot (details)
  136. Fix tests for builtbot failures (details)
  137. [lldb/Docs] Extend description section of the main page (details)
  138. [X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift (details)
  139. AMDGPU/GlobalISel: Simplify assert (details)
  140. AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF (details)
  141. AMDGPU/GlobalISel: Add some baseline tests for vector extract (details)
  142. AMDGPU/GlobalISel: Set insert point after waterfall loop (details)
  143. [SelectionDAG] ComputeNumSignBits add (details)
  144. AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap} (details)
  145. Try number 2 for fixing bot failures (details)
  146. Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf (details)
  147. Fix readability-identifier-naming missing member variables (details)
  148. Hopefully last fix for bot failures (details)
  149. [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands. (details)
  150. [X86][Disassembler] Fix a bug when disassembling an empty string (details)
  151. Add a couple of missed wildcards in debug-pass-manager output checking (details)

Started by upstream project LLDB Incremental build number 5718
originally caused by:

This run spent:

  • 6 hr 8 min waiting;
  • 8 hr 22 min build duration;
  • 8 hr 22 min total from scheduled to completion.
Revision: 66f206567090b1d6e4879775d8308d3715379515
  • refs/remotes/origin/master
Revision: cb988a858abbaf1a1ae0fe03f2a1dae692131ea9
  • refs/remotes/origin/master
Revision: 66f206567090b1d6e4879775d8308d3715379515
  • refs/remotes/origin/master