SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [mlir] NFC: Fix trivial typos in comments (details)
  2. [StackColoring] Remap FixedStackPseudoSourceValue frame index referenced (details)
  3. [ARM] Favour post inc for MVE loops (details)
  4. [ARM] MVE VLDn post inc tests. NFC (details)
  5. [ARM] MVE VLDn postinc (details)
  6. [LLVMgold][test] Fix llvm-nm test after D72658 (details)
  7. [llvm-mc] - Produce R_X86_64_PLT32 relocation for branches with JCC (details)
  8. [test] Simplify CodeGen/PowerPC/stack-coloring-vararg.mir (details)
  9. [IndVarSimplify][LoopUtils] rewriteLoopExitValues. NFCI (details)
  10. [llvm-objdump] - Fix the indentation when printing dynamic tags. (details)
  11. Recommit "[DWARF5][DebugInfo]: Added support for DebugInfo generation (details)
  12. [LoopUtils] Better accuracy for getLoopEstimatedTripCount. (details)
  13. [test] On Mac, don't try to use result of sysctl command if calling it (details)
  14. [NFC][LoopUtils] Minor change in comment according to review D71990. (details)
  15. [ARM][MVE] Tail-Predication: rematerialise iteration count in exit (details)
  16. [lldb/DWARF] Change how we construct a llvm::DWARFContext (details)
  17. [X86][SSE] Add PACKSS SimplifyMultipleUseDemandedBits 'sign bit' (details)
  18. [clangd] Remove a stale FIXME, NFC. (details)
  19. Add missing tests for parent traversal (details)
  20. Compare traversal for memoization before bound nodes container (details)
  21. [clang][CodeComplete] Propogate printing policy to FunctionDecl (details)
  22. [LV] Vectorizer should adjust trip count in profile information (details)
  23. Fix clang-formatting for recent commits (details)
  24. [lldb/DWARF] Simplify DWARFDebugInfoEntry::LookupAddress (details)
  25. Make SymbolFileDWARF::ParseLineTable use std::sort instead of insertion (details)
  26. Fix the invisible-traversal to ignore more nodes (details)
  27. [lldb] Don't process symlinks deep inside DWARFUnit (details)
  28. [lldb] Allow loading of minidumps with no process id (details)
  29. [AArch64][SVE] Extend int_aarch64_sve_ld1_gather_imm (details)
  30. [mlir] Add in-dialect lowering of gpu.all_reduce. (details)
  31. [llvm-profdata] Fix hint message since argument format has changed (details)
  32. [ARM,MVE] Fix confusing MC names for MVE VMINA/VMAXA insns. (details)
  33. [mlir] clarify LangRef wording around control flow in regions (details)
  34. [lldb] Mark the implicit copy constructor as deleted when a move (details)
  35. [SCEV] Swap guards estimation sequence. NFC (details)
  36. [InstSimplify] fold select of vector constants that include undef (details)
  37. [lldb][NFC] Add test for iterator invalidation during code completion. (details)
  38. [ms] [llvm-ml] Add placeholder for llvm-ml, based on llvm-mc (details)
  39. [ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ intrinsics' (details)
  40. [Alignment][NFC] Use Align with CreateElementUnorderedAtomicMemCpy (details)
  41. [libomptarget] Implement smid for amdgcn (details)
  42. Fix build - removing legacy target reference. (details)
Commit fc817b09e25d3b3e0a9cab77f59c5804ffcb6494 by aminim
[mlir] NFC: Fix trivial typos in comments
Differential Revision: https://reviews.llvm.org/D73012
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/lib/IR/StandardTypes.cpp
The file was modifiedmlir/lib/IR/Visitors.cpp
The file was modifiedmlir/include/mlir/Dialect/LoopOps/LoopOps.td
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/docs/Dialects/Vector.md
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
The file was modifiedmlir/tools/mlir-tblgen/RewriterGen.cpp
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorTransforms.cpp
The file was modifiedmlir/tools/mlir-tblgen/SPIRVUtilsGen.cpp
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
The file was modifiedmlir/test/Dialect/SPIRV/target-env.mlir
The file was modifiedmlir/tools/mlir-tblgen/LLVMIRIntrinsicGen.cpp
The file was modifiedmlir/docs/ConversionToLLVMDialect.md
The file was modifiedmlir/include/mlir/IR/StandardTypes.h
The file was modifiedmlir/include/mlir/Support/STLExtras.h
The file was modifiedmlir/test/lib/TestDialect/TestPatterns.cpp
The file was modifiedmlir/docs/ShapeInference.md
Commit eaab1bf21e1d6803fd217fe6052537fc33b06837 by i
[StackColoring] Remap FixedStackPseudoSourceValue frame index referenced
by MachineMemOperand
StackColoring::remapInstructions() remaps MachineOperand frame index
(e.g. %stack.1 -> %stack.0) but does not remap
FixedStackPseudoSourceValue frame index (e.g. store 4 into
%stack.1.ap2.i.i) referenced by MachineMemoryOperand.
This can cause an assertion failure when LiveDebugValues references a
dead stack object.
It is difficult to craft a test case. -g, va_copy and stack-coloring are
required. I can only reproduce it on ppc32.
The file was modifiedllvm/lib/CodeGen/StackColoring.cpp
The file was addedllvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir
The file was modifiedllvm/include/llvm/CodeGen/PseudoSourceValue.h
Commit 5e51f755421761b56453d756e5a89bbed784141a by david.green
[ARM] Favour post inc for MVE loops
We were previously not necessarily favouring postinc for the MVE loads
and stores, leading to extra code prior to the loop to set up the
preinc. MVE in general can benefit from postinc (as we don't have
unrolled loops), and certain instructions like the VLD2's only post-inc
versions are available.
Differential Revision: https://reviews.llvm.org/D70790
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmla.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-float-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shifts-scalar.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vldst4.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
Commit d6075726b90184c2f3ff111991e92b21ee6b1475 by david.green
[ARM] MVE VLDn post inc tests. NFC
The file was addedllvm/test/CodeGen/Thumb2/mve-vst4-post.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-vld4-post.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-vld2-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-intrinsics/vld24.ll
The file was addedllvm/test/CodeGen/Thumb2/mve-vst2-post.ll
Commit ff2e67a4f708e786b8c39f35756d843ed6a822e7 by david.green
[ARM] MVE VLDn postinc
This adds Post inc variants of the VLD2/4 and VST2/4 instructions in
MVE. It uses the same mechanism/nodes as Neon, transforming the
intrinsic+add pair into a ARMISD::VLD2_UPD, which gets selected to a
post-inc instruction. The code to do that is mostly taken from the
existing Neon code, but simplified as less variants are needed.
It also fills in some getTgtMemIntrinsic for the arm.mve.vld2/4
instrinsics, which allow the nodes to have MMO's, calculated as the full
length to the memory being loaded/stored.
Differential Revision: https://reviews.llvm.org/D71194
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld2-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-multivec-spill.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-intrinsics/vld24.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst4-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld2.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsARM.td
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld4-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst2-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst2.ll
The file was modifiedllvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
Commit 345e8ed4fcfe5d0c8f457f0ff0096889aec3114f by i
[LLVMgold][test] Fix llvm-nm test after D72658
Differential Revision: https://reviews.llvm.org/D73014
The file was modifiedllvm/test/tools/gold/X86/thinlto.ll
Commit 11e8e324441a875f1346972384be8b5609aa10c8 by grimar
[llvm-mc] - Produce R_X86_64_PLT32 relocation for branches with JCC
opcodes too.
The idea is to produce R_X86_64_PLT32 instead of R_X86_64_PC32 for
branches.
It fixes https://bugs.llvm.org/show_bug.cgi?id=44397.
This patch teaches MC to do that for JCC (jump if condition is met)
instructions. The new behavior matches modern GNU as. It is similar to
D43383, which did the same for "call/jmp foo", but missed JCC cases.
Differential revision: https://reviews.llvm.org/D72831
The file was modifiedllvm/test/MC/ELF/basic-elf-64.s
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp
Commit 854f7be20a0cb1a95671a16d6cc8200107ee25f4 by i
[test] Simplify CodeGen/PowerPC/stack-coloring-vararg.mir
The file was modifiedllvm/test/CodeGen/PowerPC/stack-coloring-vararg.mir
Commit 93175a5caa08360ca60b417cc04c094e1ed05c76 by sjoerd.meijer
[IndVarSimplify][LoopUtils] rewriteLoopExitValues. NFCI
This moves `rewriteLoopExitValues()` from IndVarSimplify to LoopUtils
thus making it a generic loop utility function.  This allows to rewrite
loop exit values by just calling this function without running the whole
IndVarSimplify pass.
We use this in D72714 to rematerialise the iteration count in exit
blocks, so that we can clean-up loop update expressions inside the
hardware-loops later.
Differential Revision: https://reviews.llvm.org/D72602
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Scalar/IndVarSimplify.cpp
Commit 547530cc6a82879c9f777d9c1035a8f0ebcb3cfe by grimar
[llvm-objdump] - Fix the indentation when printing dynamic tags.
We have a bug currently: printed tag names might overlap the value
column. It happens for MIPS now.
This patch adds a logic to calculate the size of indentation on fly to
fix such issues.
Differential revision: https://reviews.llvm.org/D72838
The file was modifiedllvm/test/tools/llvm-objdump/elf-dynamic-section-machine-specific.test
The file was modifiedllvm/tools/llvm-objdump/ELFDump.cpp
The file was modifiedllvm/test/tools/llvm-objdump/elf-dynamic-section.test
Commit 84c4c87e04a48628259e920780623f427a9fd9b1 by SourabhSingh.Tomar
Recommit "[DWARF5][DebugInfo]: Added support for DebugInfo generation
for auto return type for C++ member functions."
Summary: This was reverted in 328e0f3dcac52171b8cdedeaba22c98e7fbb75ea
due to chromium bot failure. This revision addresses that case.
Original commit message: Summary:
   This patch will provide support for auto return type for the C++
member
   functions. Before this return type of the member function is deduced
and
   stored in the DIE.
   This patch includes llvm side implementation of this feature.
    Patch by: Awanish Pandey <Awanish.Pandey@amd.com>
    Reviewers: dblaikie, aprantl, shafik, alok, SouraVX,
jini.susan.george
    Reviewed by: dblaikie
    Differential Revision: https://reviews.llvm.org/D70524
The file was addedllvm/test/DebugInfo/X86/debug-info-auto-return.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfUnit.cpp
Commit 10357e1c89b370a18500a8a8d69a68ab72db979e by evgueni.brevnov
[LoopUtils] Better accuracy for getLoopEstimatedTripCount.
Summary: Current implementation of getLoopEstimatedTripCount returns 1
iteration less than it should. The reason is that in bottom tested loop
first iteration is executed before first back branch is taken. For
example for loop with !{!"branch_weights", i32 1 // taken, i32 1 //
exit} metadata getLoopEstimatedTripCount gives 1 while actual number of
iterations is 2.
Reviewers: Ayal, fhahn
Reviewed By: Ayal
Subscribers: mgorny, hiraditya, zzheng, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71990
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt-idom-2.ll
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt-idom.ll
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-pgo.ll
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-conditions-pgo-1.ll
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-pgo-deopt.ll
Commit 952a540b21993e44088ff2c345df884caabbb8c0 by david.spickett
[test] On Mac, don't try to use result of sysctl command if calling it
failed.
If sysctl is not found at all, let the usual exception propogate so that
the user can fix their env. If it fails because of the permissions
required to read the property then print a warning and continue.
Differential Revision: https://reviews.llvm.org/D72278
The file was modifiedllvm/test/lit.cfg.py
Commit cfe97681cdbf8c8c23caad80adeb6551911ccd6e by evgueni.brevnov
[NFC][LoopUtils] Minor change in comment according to review D71990.
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
Commit 8cba99e2aa937b8459e74e2d22d4e2c9d4bdc5d5 by sjoerd.meijer
[ARM][MVE] Tail-Predication: rematerialise iteration count in exit
blocks
This patch uses helper function rewriteLoopExitValues that is refactored
in D72602 to rematerialise the iteration count in exit blocks, so that
we can clean-up loop update expressions inside the hardware-loops later
in ARMLowOverheadLoops, which is necessary to get actual performance
gains for tail-predicated loops.
Differential Revision: https://reviews.llvm.org/D72714
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-reduce-mve-tail.ll
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/fast-fp-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vector-arith-codegen.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mve-tail-data-types.ll
Commit 06e73f071ae12dc83c102ddecdb939dea880e588 by pavel
[lldb/DWARF] Change how we construct a llvm::DWARFContext
Summary: The goal of this patch is two-fold. First, it fixes a
use-after-free in the construction of the llvm DWARFContext. This
happened because the construction code was throwing away the lldb
DataExtractors it got while reading the sections (unlike their llvm
counterparts, these are also responsible for memory ownership). In most
cases this did not matter, because the sections are just slices of the
mmapped file data. But this isn't the case for compressed elf sections,
in which case the section is decompressed into a heap buffer. A similar
thing also happen with object files which are loaded from process
memory.
The second goal is to make it explicit which sections go into the llvm
DWARFContext -- any access to the sections through both DWARF parsers
carries a risk of parsing things twice, so it's better if this is a
conscious decision. Also, this avoids loading completely irrelevant
sections (e.g. .text). At present, the only section that needs to be
present in the llvm DWARFContext is the debug_line_str. Using it through
both APIs is not a problem, as there is no parsing involved.
The first goal is achieved by loading the sections through the existing
lldb DWARFContext APIs, which already do the caching. The second by
explicitly enumerating the sections we wish to load.
Reviewers: JDevlieghere, aprantl
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72917
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFContext.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/debug-names-compressed.cpp
Commit eaa4548459026707c909884219b5a5ca56678560 by llvm-dev
[X86][SSE] Add PACKSS SimplifyMultipleUseDemandedBits 'sign bit'
handling.
Attempt to use SimplifyMultipleUseDemandedBits to simplify PACKSS if
we're only after the sign bit.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
The file was modifiedllvm/test/CodeGen/X86/vec_int_to_fp.ll
Commit 61b563408012d17e7e619dedfefac5f38dc2d1d9 by hokein.wu
[clangd] Remove a stale FIXME, NFC.
The file was modifiedclang-tools-extra/clangd/refactor/Rename.cpp
Commit 514e3c3694a3457ea5c1b89420246fd845791afd by steveire
Add missing tests for parent traversal
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
Commit 122443a950521c5d99a0d0479daf57fbd1de2ac2 by steveire
Compare traversal for memoization before bound nodes container
The file was modifiedclang/lib/ASTMatchers/ASTMatchFinder.cpp
Commit 1f946ee2faba5395a04a081fbe561e3d91aa2b3d by kadircet
[clang][CodeComplete] Propogate printing policy to FunctionDecl
Summary: Printing policy was not propogated to functiondecls when
creating a completion string which resulted in canonical template
parameters like
`foo<type-parameter-0-0>`. This patch propogates printing policy to
those as well.
Fixes https://github.com/clangd/clangd/issues/76
Reviewers: ilya-biryukov
Subscribers: jkorous, arphaman, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D72715
The file was modifiedclang-tools-extra/clangd/unittests/CodeCompleteTests.cpp
The file was addedclang/test/CodeCompletion/ctor-signature.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
Commit af7e1588727c691ae07e286c94dbcbf31060e876 by evgueni.brevnov
[LV] Vectorizer should adjust trip count in profile information
Summary: Vectorized loop processes VFxUF number of elements in one
iteration thus total number of iterations decreases proportionally. In
addition epilog loop may not have more than VFxUF - 1 iterations. This
patch updates profile information accordingly.
Reviewers: hsaito, Ayal, fhahn, reames, silvas, dcaballe, SjoerdMeijer,
mkuper, DaniilSuchkov
Reviewed By: Ayal, DaniilSuchkov
Subscribers: fedor.sergeev, hiraditya, rkruppe, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67905
The file was modifiedllvm/test/Transforms/LoopVectorize/tripcount.ll
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was addedllvm/test/Transforms/LoopVectorize/check-prof-info.ll
Commit 8248190a730cd62850afe9bef731ce6726778b4b by steveire
Fix clang-formatting for recent commits
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
The file was modifiedclang/lib/ASTMatchers/ASTMatchFinder.cpp
Commit b7af1bfa6e31a2a896e8a94a7f086914719e7d5d by pavel
[lldb/DWARF] Simplify DWARFDebugInfoEntry::LookupAddress
Summary: This method was doing a lot more than it's only caller needed
(DWARFDIE::LookupDeepestBlock) needed, so I inline it into the caller,
and remove any code which is not actually used. This includes code for
searching for the deepest function, and the code for working around
incomplete DW_AT_low_pc/high_pc attributes on a compile unit DIE (modern
compiler get this right, and this method is called on function DIEs
anyway).
This also improves our llvm consistency, as llvm::DWARFDebugInfoEntry is
just a very simple struct with no nontrivial logic.
Reviewers: JDevlieghere, aprantl
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72920
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.cpp
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDebugInfoEntry.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFDIE.cpp
Commit 39f1335486eae355b2259d59549382e5cee9e38f by pavel
Make SymbolFileDWARF::ParseLineTable use std::sort instead of insertion
sort
Summary: Motivation: When setting breakpoints in certain projects line
sequences are frequently being inserted out of order.
Rather than inserting sequences one at a time into a sorted line table,
store all the line sequences as we're building them up and sort and
flatten afterwards.
Reviewers: jdoerfert, labath
Reviewed By: labath
Subscribers: teemperor, labath, mgrang, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72909
The file was modifiedlldb/include/lldb/Symbol/LineTable.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/source/Symbol/LineTable.cpp
Commit 9a3ff478235ccbda23df01a99c5a86eedba54cac by steveire
Fix the invisible-traversal to ignore more nodes
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/unittests/AST/ASTTraverserTest.cpp
Commit 27df2d9f556c3199601ecd1f15c1b37cd49ed9df by pavel
[lldb] Don't process symlinks deep inside DWARFUnit
Summary: This code is handling debug info paths starting with
/proc/self/cwd, which is one of the mechanisms people use to obtain
"relocatable" debug info (the idea being that one starts the debugger
with an appropriate cwd and things "just work").
Instead of resolving the symlinks inside DWARFUnit, we can do the same
thing more elegantly by hooking into the existing Module path remapping
code. Since llvm::DWARFUnit does not support any similar functionality,
doing things this way is also a step towards unifying llvm and lldb
dwarf parsers.
Reviewers: JDevlieghere, aprantl, clayborg, jdoerfert
Subscribers: lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D71770
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFUnit.cpp
The file was modifiedlldb/include/lldb/Core/ModuleList.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangModulesDeclVendor.cpp
The file was modifiedlldb/include/lldb/Core/Module.h
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARFProperties.td
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h
The file was modifiedlldb/source/Core/CoreProperties.td
The file was modifiedlldb/source/Core/ModuleList.cpp
The file was modifiedlldb/packages/Python/lldbsuite/test/functionalities/breakpoint/comp_dir_symlink/TestCompDirSymLink.py
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangExpressionParser.cpp
Commit 468ca490c6030462066f8e731902d81bab11c356 by pavel
[lldb] Allow loading of minidumps with no process id
Summary: Normally, on linux we retrieve the process ID from the
LinuxProcStatus stream (which is just the contents of /proc/%d/status
pseudo-file).
However, this stream is not strictly required (it's a breakpad
extension), and we are encountering a fair amount of minidumps which do
not have it present. It's not clear whether this is the case with all
these minidumps, but the two known situations where this stream can be
missing are:
- /proc filesystem not mounted (or something to that effect)
- process crashing after exhausting (almost) all file descriptors (so
the minidump writer may not be able to open the /proc file)
Since this is a corner case which will become less and less relevant
(crashpad-generated minidumps should not suffer from this problem), I
work around this problem by hardcoding the PID to 1 in these cases. The
same thing is done by the gdb plugin when talking to a stub which does
not report a process id (e.g. a hardware probe).
Reviewers: jingham, clayborg
Subscribers: markmentovai, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D70238
The file was addedlldb/test/Shell/Minidump/no-process-id.yaml
The file was modifiedlldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
Commit 7e717b3990554f0fde43e3747529477a70072cfe by andrzej.warzynski
[AArch64][SVE] Extend int_aarch64_sve_ld1_gather_imm
The ACLE distinguishes between the following addressing modes for gather
loads:
* "scalar base, vector offset", and
* "vector base, scalar offset". For the "vector base, scalar offset"
case, the
`int_aarch64_sve_ld1_gather_imm` intrinsic was added in 79f2422d.
Currently, that intrinsic assumes that the scalar offset is passed as an
immediate.  As a result, it does not cater for cases where scalar offset
is stored in a register.
In this patch `int_aarch64_sve_ld1_gather_imm` is extended so that all
cases are covered:
* `int_aarch64_sve_ld1_gather_imm` is renamed as
`int_aarch64_sve_ld1_gather_scalar_offset`
* new DAG combine rules are added for GLD1_IMM for scenarios where the
offset is a non-immediate scalar or an out-of-range immediate
* sve-intrinsics-gather-loads-vector-base.ll is renamed as
sve-intrinsics-gather-loads-vector-base-imm-offset.ll
* sve-intrinsics-gather-loads-vector-base-scalar-offset.ll is added to
test
file for non-immediate offsets
Similar changes are made for scatter store intrinsics.
Reviewed By: sdesmalen, efriedma
Differential Revision: https://reviews.llvm.org/D71773
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/test/CodeGen/AArch64/sve-gather-scatter-dag-combine.ll
The file was removedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base.ll
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-scalar-offset.ll
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-imm-offset.ll
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-gather-loads-vector-base-scalar-offset.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was removedllvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base.ll
The file was addedllvm/test/CodeGen/AArch64/sve-intrinsics-scatter-stores-vector-base-imm-offset.ll
Commit 8b2eb7c494b296deb1792eed75bb56024bbf1e2b by csigg
[mlir] Add in-dialect lowering of gpu.all_reduce.
Reviewers: ftynse, nicolasvasilache, herhut
Reviewed By: ftynse, herhut
Subscribers: liufengdb, aartbik, herhut, merge_guards_bot, mgorny,
mehdi_amini, rriddle, jpienaar, burmako, shauheen, antiagainst,
nicolasvasilache, arpith-jacob, mgester, lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72129
The file was modifiedmlir/include/mlir/IR/Block.h
The file was addedmlir/test/lib/Transforms/TestAllReduceLowering.cpp
The file was modifiedmlir/include/mlir/Dialect/GPU/Passes.h
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/lib/Dialect/GPU/CMakeLists.txt
The file was addedmlir/test/Dialect/GPU/all-reduce.mlir
The file was modifiedmlir/lib/IR/Block.cpp
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
The file was addedmlir/lib/Dialect/GPU/Transforms/AllReduceLowering.cpp
Commit 01bfb366acf3650b91a80b922f2fc7b6e660f686 by yikong
[llvm-profdata] Fix hint message since argument format has changed
"-sample" option is now changed to "--sample".
The file was modifiedllvm/test/tools/llvm-profdata/text-format-errors.test
The file was modifiedllvm/tools/llvm-profdata/llvm-profdata.cpp
Commit f3e73e88fdd63e3342977873a5f2c3f870a2497a by simon.tatham
[ARM,MVE] Fix confusing MC names for MVE VMINA/VMAXA insns.
Summary: A recent commit accidentally defined names like `MVE_VMAXAs8`
as instances of the multiclass `MVE_VMINA`, and vice versa. This has no
effect on the test suite, because nothing directly refers to those
instruction names (the isel patterns are generated in Tablegen using
`!cast<Instruction>(NAME)` inside a lower-level multiclass). But it
means that `llvm-mc -show-inst` was listing VMAXA as VMINA, and it would
also affect any further draft code gen patches that use those
instruction ids.
Reviewers: MarkMurrayARM, dmgreen, miyuki, ostannard
Reviewed By: dmgreen
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73034
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
Commit f63f5a228f30199ed04f9a862e6125ccb977e530 by zinenko
[mlir] clarify LangRef wording around control flow in regions
It was unclear what "exiting a region" meant in the existing
formulation. Phrase it in terms of control flow transfer to the
operation enclosing the region.
Discussion:
https://groups.google.com/a/tensorflow.org/d/msg/mlir/73d2O8gjTuA/xVj1KoCTBAAJ
The file was modifiedmlir/docs/LangRef.md
Commit 22447a61d405a9e279c7dad72b342dcc6e8b1b4b by Raphael Isemann
[lldb] Mark the implicit copy constructor as deleted when a move
constructor is provided.
Summary: CXXRecordDecls that have a move constructor but no copy
constructor need to have their implicit copy constructor marked as
deleted (see C++11 [class.copy]p7, p18) Currently we don't do that when
building an AST with ClangASTContext which causes Sema to realise that
the AST is malformed and asserting when trying to create an implicit
copy constructor for us in the expression:
``` Assertion failed: ((data().DefaultedCopyConstructorIsDeleted ||
needsOverloadResolutionForCopyConstructor())
   && "Copy constructor should not be deleted"), function
setImplicitCopyConstructorIsDeleted, file include/clang/AST/DeclCXX.h,
line 828.
```
In the test case there is a class `NoCopyCstr` that should have its copy
constructor marked as deleted (as it has a move constructor). When we
end up trying to tab complete in the
`IndirectlyDeletedCopyCstr` constructor, Sema realises that the
`IndirectlyDeletedCopyCstr` has no implicit copy constructor and tries
to create one for us. It then realises that
`NoCopyCstr` also has no copy constructor it could find via lookup.
However because we haven't marked the FieldDecl as having a deleted copy
constructor the
`needsOverloadResolutionForCopyConstructor()` returns false and the
assert fails.
`needsOverloadResolutionForCopyConstructor()` would return true if
during the time we added the `NoCopyCstr` FieldDecl to
`IndirectlyDeletedCopyCstr` we would have actually marked it as having a
deleted copy constructor (which would then mark the copy constructor of
`IndirectlyDeletedCopyCstr ` as needing overload resolution and Sema is
happy).
This patch sets the correct mark when we complete our CXXRecordDecls
(which is the time when we know whether a copy constructor has been
declared). In theory we don't have to do this if we had a Sema around
when building our debug info AST but at the moment we don't have this so
this has to do the job for now.
Reviewers: shafik
Reviewed By: shafik
Subscribers: aprantl, JDevlieghere, lldb-commits
Tags: #lldb
Differential Revision: https://reviews.llvm.org/D72694
The file was modifiedlldb/source/Symbol/ClangASTContext.cpp
The file was modifiedlldb/unittests/Symbol/TestClangASTContext.cpp
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/completion-crash1/TestCompletionCrash1.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/deleting-implicit-copy-constructor/TestDeletingImplicitCopyConstructor.py
The file was removedlldb/packages/Python/lldbsuite/test/commands/expression/completion-crash1/main.cpp
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/deleting-implicit-copy-constructor/main.cpp
Commit de34b54edce4b7b4e4a68a02fae10283b3e2d7ea by dfukalov
[SCEV] Swap guards estimation sequence. NFC
Summary: Loop unroll spends a lot of time in SCEVs processing in case
when a function contains hundreds of simple 'for' loops with a quite
complex arrays indexes like
  for (int i = 0; i < 8; ++i) {
   for (int j = 0; j < 32; ++j) {
     C[j*8+i] = B[j*32+i+128] + A[i*64+128];
   }
}
for (int i = 0; i < 8; ++i) {
   for (int j = 0; j < 8; ++j) {
     for (int k = 0; k < 32; ++k) {
       D[k*64+i*8+j] = D[k*64+i*8+j] + E[i+16] * C[k*8+j+256];
     }
   }
}
The patch improves loop unroll speed since isLoopBackedgeGuardedByCond
takes much less time than isLoopEntryGuardedByCond in the edge case.
Reviewers: skatkov, sanjoy, mkazantsev
Reviewed By: sanjoy
Subscribers: fhahn, hiraditya, javed.absar, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72929
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp
Commit da9c93f330e0e4bb12972ee7c67229c36943a0c1 by spatel
[InstSimplify] fold select of vector constants that include undef
elements
As mentioned in D72643, we'd like to be able to assert that any select
of equivalent constants has been removed before we're deep into
InstCombine.
But there's a loophole in that assertion for vectors with undef elements
that don't match exactly.
This patch should close that gap. If we have undefs, we can't safely
propagate those unless both constants elements for that lane are undef.
Differential Revision: https://reviews.llvm.org/D72958
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp
The file was modifiedllvm/test/Transforms/InstSimplify/select.ll
Commit 65bab53afb8be61cddae4d8a08dd3d9572de1f66 by Raphael Isemann
[lldb][NFC] Add test for iterator invalidation during code completion.
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/completion-crash-invalid-iterator/Makefile
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/completion-crash-invalid-iterator/TestInvalidIteratorCompletionCrash.py
The file was addedlldb/packages/Python/lldbsuite/test/commands/expression/completion-crash-invalid-iterator/main.cpp
Commit 5f6dfa800e0b9c337921e188bd171b9765bfbe89 by epastor
[ms] [llvm-ml] Add placeholder for llvm-ml, based on llvm-mc
As discussed on the mailing list, I plan to introduce an ml-compatible
MASM assembler as part of providing more of the Windows build tools.
This will be similar to llvm-mc, but with different command-line
parameters.
This placeholder is purely a stripped-down version of llvm-mc; we'll
eventually add support for the Microsoft-style command-line flags, and
back it with a MASM parser.
Relanding this revision after fixing ARM-compatibility issues.
Reviewers: rnk, thakis, RKSimon
Reviewed By: thakis, RKSimon
Differential Revision: https://reviews.llvm.org/D72679
The file was addedllvm/tools/llvm-ml/CMakeLists.txt
The file was addedllvm/tools/llvm-ml/llvm-ml.cpp
The file was addedllvm/tools/llvm-ml/Disassembler.h
The file was addedllvm/test/tools/llvm-ml/run.test
The file was addedllvm/tools/llvm-ml/Disassembler.cpp
The file was addedllvm/test/tools/llvm-ml/basic.test
The file was modifiedllvm/utils/gn/secondary/llvm/test/BUILD.gn
The file was addedllvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
The file was modifiedllvm/test/CMakeLists.txt
Commit b10a0eb04adfc4186cc6198cf8231358b2b04d89 by mark.murray
[ARM][MVE][Intrinsics] Take abs() of VMINNMAQ, VMAXNMAQ intrinsics'
first arguments.
Summary: Fix VMINNMAQ, VMAXNMAQ intrinsics; BOTH arguments have the
absolute values taken.
Reviewers: dmgreen, simon_tatham
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D72830
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c
The file was modifiedllvm/test/CodeGen/Thumb2/mve-intrinsics/vmaxnmaq.ll
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td
The file was modifiedclang/include/clang/Basic/arm_mve.td
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c
The file was modifiedllvm/test/CodeGen/Thumb2/mve-intrinsics/vminnmaq.ll
Commit 46b9563cf68a8a094276b471632fa15eec954d53 by gchatelet
[Alignment][NFC] Use Align with CreateElementUnorderedAtomicMemCpy
Summary: This is patch is part of a series to introduce an Alignment
type. See this thread for context:
http://lists.llvm.org/pipermail/llvm-dev/2019-July/133851.html See this
patch for the introduction of the type: https://reviews.llvm.org/D64790
Reviewers: courbet, nicolasvasilache
Subscribers: hiraditya, jfb, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, csigg, arpith-jacob, mgester, lucyrfox, herhut,
liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73041
The file was modifiedllvm/include/llvm/IR/IRBuilder.h
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
The file was modifiedllvm/lib/IR/IRBuilder.cpp
Commit 03c2a59cd696135d79528d39e8e82ee59c1fcf97 by jonathanchesterfield
[libomptarget] Implement smid for amdgcn
Summary:
[libomptarget] Implement smid for amdgcn
Implementation is in a new file as it uses an intrinsic with complicated
encoding that warranted substantial comments.
Reviewers: jdoerfert, grokos, ABataev, ronlieb
Reviewed By: jdoerfert
Subscribers: jvesely, mgorny, openmp-commits
Tags: #openmp
Differential Revision: https://reviews.llvm.org/D72956
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/CMakeLists.txt
The file was addedopenmp/libomptarget/deviceRTLs/amdgcn/src/amdgcn_smid.hip
Commit 6ccebe004446b2b7362f96dd5cf7cbc2ed3facde by epastor
Fix build - removing legacy target reference.
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-ml/BUILD.gn
The file was modifiedllvm/tools/llvm-ml/CMakeLists.txt