FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [VE] fp32/64 fadd/fsub/fdiv/fmul isel patterns (details)
  2. [lldb] More windows StringRef fixes (details)
  3. [DebugInfo] Make most debug line prologue errors non-fatal to parsing (details)
  4. [AArch64][SVE] Add SVE2 intrinsics for pairwise arithmetic (details)
  5. [ARM] Add documentation for -march= and -mfpu= command line options (details)
  6. Fix an implicit conversion in clang-tidy. GCC 5 complains about it. (details)
  7. [clangd][Hover] Make tests hermetic by setting target triplet (details)
  8. [clangd] Get rid of delayed template parsing (details)
  9. [MLIR] Add OpenMP dialect with barrier operation (details)
  10. [LLD][ELF][ARM] Do not substitute BL/BLX for non STT_FUNC symbols. (details)
  11. [clangd] add CODE_OWNERS (details)
  12. [clangd] Go-to-definition on 'override' jumps to overridden method(s) (details)
  13. [clangd] Replace raw lexer code with token buffer in prepare rename. (details)
  14. [clangd][vscode] Update lsp dependencies to pickup the progress support (details)
  15. [NFC][ARM] Add test (details)
  16. [AArch64][SVE] Add SVE2 intrinsics for uniform DSP operations (details)
  17. clang-format: insert trailing commas into containers. (details)
  18. [yaml2obj][obj2yaml] - Add lost test cases. (details)
  19. Add TagDecl AST matcher (details)
  20. Fix clang test build (details)
  21. Regenerate aarch64-neon-2velem.c CHECK lines (details)
  22. [VE] Isel patterns for fp32/64 and i32/64 conversion (details)
  23. [MVE][MC] evaluateBranch: add missing MVE opcode (details)
  24. [AArch64] Add IR intrinsics for sq(r)dmulh_lane(q) (details)
  25. [InstCombine] canonicalize splat shuffle after cmp (details)
  26. [clangd] Remove the temporary alias for clangd::DiagnosticConsumer. (details)
  27. AMDGPU: Fix handling of infinite loops in fragment shaders (details)
  28. AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns (details)
  29. More fixes of implicit std::string conversions (details)
  30. GlobalISel: Lower G_WRITE_REGISTER (details)
  31. Analysis: Add max recursison to isDereferenceableAndAlignedPointer (details)
  32. AMDGPU/GlobalISel: Manually select scalar f64 G_FNEG (details)
  33. [mlir][Linalg] Introduce folding patterns to remove certain MemRefCastOp (details)
  34. [libc] Fix benchmarks CMakeLists.txt (details)
  35. [VE] udiv/sdiv/urem/srem/mul isel patterns (details)
  36. [LoopFusion] Move instructions from FC1.Preheader to FC0.Preheader when (details)
  37. [Analyzer] Split container modeling from iterator modeling (details)
  38. Revert "AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal (details)
  39. Revert "AMDGPU: Fix handling of infinite loops in fragment shaders" (details)
  40. [gn build] Port 9a08a3fab99 (details)
  41. LLT: Add changeNumElements (details)
  42. Work around PR44697 in CrashRecoveryContext (details)
  43. Fix MSVC lamdba default capture mode warning. NFCI. (details)
  44. [clang-tidy] Initialize token before handing it to the lexer (details)
  45. AMDGPU/GlobalISel: Rewrite fadd select tests (details)
  46. GlobalISel: Assert on invalid bitcast in MIRBuilder (details)
  47. [AMDGPU] override isHighLatencyDef (details)
  48. AMDGPU/GlobalISel: Look through copies for source modifiers (details)
  49. AMDGPU: Fix handling of infinite loops in fragment shaders (details)
  50. [PassManagerBuilder] Remove global extension when a plugin is unloaded (details)
  51. AMDGPU/GlobalISel: Handle LDS with relocations case (details)
  52. [MachineScheduler] Ignore artificial edges when forming store chains (details)
  53. AMDGPU: Directly select 16-bank LDS case of llvm.amdgcn.interp.p1.f16 (details)
  54. GlobalISel: Fix mask computation in lowerInsert (details)
  55. [VE] (conditional) branch modification & isel patterns (details)
  56. Add a test extracted from D69557 "AsmParser: Allow FMF on varargs call" (details)
  57. AMDGPU/GlobalISel: Fix tablegen selection for scalar bin ops (details)
  58. [X86] Use a shorter sequence to implement FLT_ROUNDS (details)
  59. [DAGCombiner] visitIMINMAX - use general (details)
  60. [DAGCombiner] Sub/SUBSAT - use general (details)
  61. [Clang][Bundler] Add 'exclude' flag to target objects sections (details)
  62. [AMDGPU] Cluster FLAT instructions with both vaddr and saddr (details)
  63. [llvm][docs] LangRef for IR attribute `vector-function-abi-variant`. (details)
  64. [X86] Custom lower ISD::FROUND with SSE4.1 to avoid a libcall. (details)
  65. [lldb/Reproducers] Add logging to the string template specialization (details)
  66. [scudo] Skip building scudo standalone if sys/auxv.h can't be found (details)
  67. [InstCombine] Regenerate test checks; NFC (details)
  68. Fix switch covers all cases static analyzer warning. NFCI. (details)
  69. [DAGCombiner] ISD::MUL - use general (details)
  70. [ELF] Mention symbol name in reportRangeError() (details)
  71. Add dwarfdump support for DW_OP_regval_type. (details)
  72. [libcxx] Add a std::string_view pretty printer for libcxx. (details)
  73. [AArch64] Fix data race on RegisterBank initialization. (details)
  74. [AMDGPU] Fix data race on RegisterBank initialization. (details)
  75. [ARM] Fix data race on RegisterBank initialization. (details)
  76. [SmallString] Add explicit conversion to std::string (details)
  77. DwarfExpression: Factor out getOrCreateBaseType() (NFC) (details)
  78. Run clang-format on DwarfExpression (NFC) (details)
  79. [lldb/Host] Fix implicit StringRef to std::string conversion (details)
  80. [AMDGPU][GlobalISel] Select 8-byte LDS Ops with 4-byte alignment (details)
  81. [clangd] Don't mmap source files on all platforms --> don't crash on git (details)
  82. [ConstantFold][SVE] Fix constant folding for scalable vector binary (details)
  83. [DAGCombiner] ISD::SHL/SRA/SRL - use general (details)
  84. Handle non-absolute include dirs properly for both dwarf4 and dwarf5. (details)
  85. [AsmPrinter][ELF] Define local aliases (.Lfoo$local) for GlobalObjects (details)
  86. Revert "[ARM] Fix data race on RegisterBank initialization." (details)
  87. Revert "[AMDGPU] Fix data race on RegisterBank initialization." (details)
  88. Revert "[AArch64] Fix data race on RegisterBank initialization." (details)
  89. attempt to fix symbolize-paths.s on windows (details)
  90. attempt to fix symbolize-paths.s everywhere after cd68f4 (details)
  91. [GlobalISel][IRTranslator] Follow convention and put constant offset of (details)
  92. [InstCombine] Add undef/non-splat tests for add/sub + icmp eq; NFC (details)
  93. [InstCombine] Support non-splat vectors in icmp eq + add/sub fold (details)
  94. [build] Fix runtimes build after 2e745ba6b0ba (details)
  95. Print discriminators when printing .debug_line in GNU style. (details)
  96. Add IntegerAttr::verifyConstructionInvariants. (details)
  97. AMDGPU/GlobalISel: Fix tests in release build (details)
  98. [libcxx] [Windows] Store the lconv struct returned from localeconv in (details)
  99. [InstCombine] add splat binop tests; NFC (details)
  100. Rewrite test not to rely on StrEq with StringRef (details)
  101. [PowerPC][Future] Add prefixed loads and stores for future CPU (details)
  102. [NFCI][AArch64][SVE] Set default DestructiveInstType in AArch64Inst (details)
  103. [Loads] Handle simple cases with same base pointer with constant offsets (details)
  104. [gn build] Port 24962ced814 (details)
  105. [AArch64][GlobalISel] Fix TBNZ/TBZ opcode selection (details)
  106. Revert "[llvm-objcopy] Initial support for wasm in llvm-objcopy" (details)
  107. [lldb] Fix build break in ProcessDebugger due to StringRef usage changes (details)
  108. [gn build] Port 5ea83eef4d6 (details)
  109. [libc] Fix build after 777180a32b61070a10dd330b4f038bf24e916af1. (details)
  110. [GlobalISel] Add new combine to convert scalar G_MUL to G_SHL. (details)
  111. [build] Fix LLVM_ENABLE_RUNTIMES override condition (details)
  112. [NFC][AArch64][SVE] Rename Destructive enumerator from (details)
  113. [libc] Add a library of standalone C++ utilities. (details)
  114. [SmallString] Remove StringRef indirection for std::string conversion. (details)
  115. [scudo][standalone] Revert some perf-degrading changes (details)
  116. [lldb/Reproducers] Add (de)serialization overload for char** (details)
  117. [opt viewer] Python compat - decode/encode string (details)
  118. AMDGPU/GlobalISel: Select permlane16/permlanex16 (details)
  119. [compiler-rt][profile] fix test/instrprof-set-filename.c on windows (details)
  120. GlobalISel: Add observer argument to legalizeIntrinsic (details)
  121. [mlir] [VectorOps] consolidate all vector utilities to one header/cc (details)
  122. [X86] Fix the cost model for v16i16->v16i32 zero_extend/sign_extend with (details)
  123. [X86] Improve X86 cmpps/cmppd/cmpss/cmpsd intrinsics with strictfp (details)
  124. [LTO] Add optimization remarks for removed functions (details)
  125. [gn build] add a FIXME about using /Gw on win (details)
  126. [lldb/Reproducers] Account for char** being a nullptr (details)
  127. [lldb/Reproducers] Add unittest for char** (de)serializer (details)
  128. [Attributor] Fix TODO to avoid recomputation of results (details)
  129. [libc++] Explicitly specify LIBCXX_ENABLE_SHARED to try and fix CI (details)
  130. [llvm-objcopy] Initial support for wasm in llvm-objcopy (details)
  131. [gn build] Port f2af0607000 (details)
  132. [Attributor] Pointer privatization attribute (argument promotion) (details)
  133. [CMake][libcxx] Don't wrap __config_site path in quotes on Windows (details)
  134. [llvm][docs] Fix formatting in LangRef. [NFC] (details)
  135. [llvm][NFC] Rename CallAnalyzer::onCommonInstructionSimplification (details)
  136. [llvm] Replace SmallStr.str().str() with std::string conversion (details)
  137. [clang] Replace SmallStr.str().str() with std::string conversion (details)
  138. [lld] Replace SmallStr.str().str() with std::string conversion operator. (details)
  139. [X86] Don't exit from foldOffsetIntoAddress if the Offset is 0, but (details)
  140. [lldb] Replace SmallStr.str().str() with std::string conversion (details)
  141. [lldb/Reproducers] Assert when trying to get object for invalid index. (details)
  142. [lldb/Reproducers] Fix reproducer instrumentation formatting (NFC) (details)
  143. [llvm][VectorUtils] Tweak VFShape for scalable vector functions. (details)
  144. Revert "[lldb/Reproducers] Assert when trying to get object for invalid (details)
  145. [X86] Add function isPrefix() (details)
  146. Even more fixes of implicit std::string conversions (details)
  147. Revert "[X86] Don't exit from foldOffsetIntoAddress if the Offset is 0, (details)
  148. Define _LIBCPP_HAS_TIMESPEC_GET for FreeBSD when appropriate (details)
  149. [AArch64][GlobalISel] During ISel try to convert G_PTR_ADD to G_ADD. (details)
  150. [mlir][NFC] Explicitly initialize dynamic legality when setting op (details)
  151. Add GDB pretty printers for llvm::ilist, llvm::simple_ilist, and (details)
  152. [InstCombine] Process newly inserted instructions in the correct order (details)
  153. [InstCombine] Add SetVector.h include (details)
  154. [InstCombine] Update SimplifyCFG test (details)
  155. [ARM][LowOverheadLoops] Check scalar predicates (details)
  156. [X86][Sched] A bunch of fixes to the Zen2 sched model latencies. (details)
  157. Inline debug variable. (details)
  158. [DebugInfo] Fix DebugLine::Prologue::getLength (details)
  159. [InstCombine][AMDGPU] Trim components of s_buffer_load (details)
  160. AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns (details)
  161. [ASTMatchers] Add hasPlacementArg and hasAnyPlacementArg traversal (details)
  162. [clangd][vscode] Get rid of the deprecated vscode module in the (details)
  163. Add lowering of STRICT_FSETCC and STRICT_FSETCCS (details)
  164. [clangd] Bump vscode-clangd v0.0.20 (details)
  165. [llvm-readobj] - Add a few warnings for --gnu-hash-table. (details)
  166. [lldb][NFC] Remove TypeSystemClang::GetASTContext calls in IRForTarget (details)
  167. [clangd] Log directory when a CDB is loaded (details)
  168. [llvm-readobj] - Improve error message reported by DynRegionInfo. (details)
  169. Add 'gpu.terminator' operation. (details)
  170. [clangd] Make go-to-def jumps to overriden methods on `final` specifier. (details)
  171. [yaml2obj] - Add a way to set sh_entsize for relocation sections. (details)
  172. [ARM][LowOverheadLoops] Skip debug values (details)
  173. [MLIR] Added llvm.invoke and llvm.landingpad (details)
  174. [DAGCombiner] ISD::SDIV/UDIV/SREM/UREM - use general (details)
  175. [DAGCombiner] ISD::AND/OR/XOR - use general (details)
  176. [libc++] [P0325] Implement to_array from LFTS with updates. (details)
  177. [AVR] Recognize the AVR architecture in lldb (details)
  178. [FPEnv][AArch64] Add lowering and instruction selection for (details)
  179. [PowerPC][Future] Prefixed Instructions 64 Byte Boundary Support (details)
  180. [gn build] Port f00be8da62b (details)
  181. Activate extension loading test on Darwin now that the underlying fix (details)
  182. [Linalg] Format Linalg/fusion.mlir. (details)
  183. AMDGPU/GlobalISel: Select llvm.amdgcn.buffer.atomic.cmpswap (details)
  184. test-release.sh: Add MLIR to the projects list (details)
  185. [GlobalISel] (fix) Use pointer type size for offset constant when (details)
  186. AMDGPU/GlobalISel: Only map VOP operands to VGPRs (details)
  187. AMDGPU/GlobalISel: Legalize unpacked d16 image operations (details)
  188. AMDGPU/GlobalISel: Custom lower G_LOG/G_LOG10 (details)
  189. [clang-format] Improve support for multiline C# strings (details)
  190. AMDGPU/GlobalISel: Handle s64->s64 G_FPTOSI/G_FPTOUI (details)
  191. GlobalISel: Implement s32->s64 G_FPTOSI lowering (details)
  192. [FPEnv][AArch64] Add lowering and instruction selection for strict (details)
  193. Drop arm triple from test/CodeGen/AArch64/global-merge-hidden-minsize.ll (details)
  194. Fix helptext for opt/llc after 14fc20ca6 (details)
  195. Changed wrong ROCDL instructions in GPU lowering. (details)
  196. AMDGPU/GlobalISel: Don't use pointless getConstantVRegVal (details)
  197. [InstCombine][DebugInfo] Fold constants wrapped in metadata (details)
  198. [PowerPC][Future] Branch Distance Estimation For Prefixed Instructions (details)
  199. Bring back the tests for update_cc_tests_checks.py (details)
  200. [analyzer] DynamicSize: Remove 'getExtent()' from regions (details)
  201. [gn build] Port 601687bf731 (details)
  202. [mlir][spirv] Add GroupNonUniform min and max operations. (details)
  203. [analyzer] DynamicSize: Remove 'getSizeInElements()' from store (details)
  204. [XCOFF][AIX] Support basic relocation type on AIX (details)
  205. [mlir] EnumsGen: dissociate string form of integer enum from C++ symbol (details)
  206. [analyzer] CheckerContext: Make the Preprocessor available (details)
  207. [MLIR] Add the sqrt operation to mlir. (details)
  208. [Clang][Bundler] Reduce fat object size (details)
  209. [BPF] fix a bug in BPFMISimplifyPatchable pass with -O0 (details)
  210. [OPENMP50]Handle lastprivate conditionals passed as shared in inner (details)
  211. [NFC][IndVarSimplify] Autogenerate exit_value_test2.ll check lines (details)
  212. [libc] Add a missing `this->` in __llvm_libc::cpp:MutableArrayRef::end. (details)
  213. [NFC] small refactor on RenamerClangTidyCheck.cpp (details)
  214. [AArch64][ARM] Always expand ordered vector reductions (PR44600) (details)
  215. [LoopFusion] Move instructions from FC1.GuardBlock to FC0.GuardBlock and (details)
  216. [libcxxabi] Insert padding in __cxa_exception struct for compatibility (details)
  217. [ThinLTO] Disable "Always import constants" due to compile time issues (details)
  218. [Clang][Driver] Disable llvm passes for the first host OpenMP offload (details)
  219. [AArch64][SVE] Add remaining SVE2 mla indexed intrinsics. (details)
  220. [ConstantFold][SVE] Fix constant folding for scalable vector unary (details)
  221. [Concept] Fix incorrect check for containsUnexpandedParameterPack in CSE (details)
  222. [Concepts] Add check for dependent RC when checking function constraints (details)
  223. [Concepts] Add 'this' context to instantiation of member requires clause (details)
  224. [ConstantFold][SVE][NFC] Add test for select instruction in scalable (details)
  225. Speed up compilation of ASTImporter (details)
  226. [AArch64] -fpatchable-function-entry=N,0: place patch label after BTI (details)
  227. [AIX] Minor cleanup in AsmPrinter. [NFC] (details)
  228. [lldb/Reproducers] Fix API boundary tracking bug (details)
  229. [mlir] Add initial support for parsing a declarative operation assembly (details)
  230. [mlir] Add support for generating the parser/printer from the (details)
  231. [mlir] Update various operations to declaratively specify their assembly (details)
  232. [mlir][NFC] Use declarative format for several operations in LLVM and (details)
  233. [mlir][NFC] Update several SPIRV operations to use declarative parsers. (details)
  234. [libc] Add [EXPECT|ASSERT]_[TRUE|FALSE] unittest macros. (details)
  235. [libc++abi] Bump PACKAGE_VERSION (details)
  236. [AMDGPU] Add file headers for few files where it is missing. (details)
  237. [Clang][Bundler][NFC] Replace SmallString<...> with StringRef (details)
  238. [mlir] LLVM dialect: Generate conversions between EnumAttrCase and LLVM (details)
  239. [lldb][NFC] LLDB_LOGF to LLDB_LOG conversion in ClangASTImporter (details)
  240. [scudo][standalone] Release secondary memory on purge (details)
  241. Move verification of Sema::MaximumAlignment to a .cpp file (details)
  242. [InstCombine] Create new insts in foldICmpEqIntrinsicWithConstant; NFCI (details)
  243. [InstCombine] Remove unnecessary worklist add; NFCI (details)
  244. AMDGPU: Don't use separate cache arguments for s_buffer_load node (details)
  245. AMDGPU: Replace subtarget check with an assert (details)
  246. MSVC Buggy version detection: turn pre-processor error into CMake (details)
  247. [NFC] Fix check prefix add in fcanonicalize-elimination.ll (details)
  248. [Fuchsia] Never link in implicit "system dependencies" of sanitizer (details)
  249. [InstCombine] Remove unnecessary worklist add; NFCI (details)
  250. [AArch64][GlobalISel] Disallow vectors in convertPtrAddToAdd. (details)
  251. [AArch64][GlobalISel] Fold in G_ANYEXT/G_ZEXT into TB(N)Z (details)
  252. CodeGen: Use Register (details)
  253. AMDGPU: Cleanup and fix SMRD offset handling (details)
  254. Revert "MSVC Buggy version detection: turn pre-processor error into (details)
  255. Revert "AMDGPU: Cleanup and fix SMRD offset handling" (details)
  256. [lldb/Reproducers] Use LLDB_RECORD_DUMMY for GetStopDescription (details)
  257. [lldb/Reproducers] Fix typo in CMake so we actually replay. (details)
  258. [SafeStack][DebugInfo] Insert DW_OP_deref in correct location (details)
Commit f6bb58542aca5959acd1ab2e6ec757570df534e2 by simon.moll
[VE] fp32/64 fadd/fsub/fdiv/fmul isel patterns
Summary: fp32/64 fadd/fsub/fdiv/fmul isel patterns and tests.
Reviewers: arsenm, craig.topper, rengolin, k-ishizaka
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Differential Revision: https://reviews.llvm.org/D73540
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was addedllvm/test/CodeGen/VE/fp_div.ll
The file was addedllvm/test/CodeGen/VE/fp_add.ll
The file was addedllvm/test/CodeGen/VE/fp_mul.ll
The file was addedllvm/test/CodeGen/VE/fp_sub.ll
Commit 7a6ebb5ba3cefef1865a2e0c5f9196101cbd2733 by pavel
[lldb] More windows StringRef fixes
I don't have a windows build around, so I am just going by the buildbot
messages.
The file was modifiedlldb/source/Host/windows/PipeWindows.cpp
The file was modifiedlldb/source/Host/windows/ConnectionGenericFileWindows.cpp
Commit 7116e431c0ab4194907bbaf73482ac05d923787f by james.henderson
[DebugInfo] Make most debug line prologue errors non-fatal to parsing
Many of the debug line prologue errors are not inherently fatal. In most
cases, we can make reasonable assumptions and carry on. This patch does
exactly that. In the case of length problems, the approach of "assume
stated length is correct" is taken which means the offset might need
adjusting.
This is a relanding of b94191fe, fixing an LLD test and the LLDB build.
Reviewed by: dblaikie, labath
Differential Revision: https://reviews.llvm.org/D72158
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/Inputs/debug_line_malformed.s
The file was modifiedlld/test/ELF/undef.s
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFContext.cpp
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/debug_line_invalid.test
The file was modifiedlld/test/ELF/Inputs/undef-bad-debug.s
Commit bd33a46213d3cccf8924d33f26c1cf6a8e4c2879 by kerry.mclaughlin
[AArch64][SVE] Add SVE2 intrinsics for pairwise arithmetic
Summary: Implements the following intrinsics:
- addp
- smaxp, sminp, umaxp & uminp
- sadalp & uadalp
Reviewers: dancgr, efriedma, sdesmalen, c-rhodes
Reviewed By: c-rhodes
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl,
cameron.mcinally, cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73347
The file was addedllvm/test/CodeGen/AArch64/sve2-intrinsics-widening-pairwise-arith.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve2-intrinsics-non-widening-pairwise-arith.ll
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
Commit ac215354607450191b9d63be72c00efe36b53a1c by momchil.velikov
[ARM] Add documentation for -march= and -mfpu= command line options
Differential Revision: https://reviews.llvm.org/D73459
The file was modifiedclang/docs/ClangCommandLineReference.rst
Commit 0ee4b027d37e45391bdd872911c61756d0958722 by benny.kra
Fix an implicit conversion in clang-tidy. GCC 5 complains about it.
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.h
Commit 55b0e9c9d5de7c5d70552ac9ca9ffc14097e983b by kadircet
[clangd][Hover] Make tests hermetic by setting target triplet
Summary: Fixes https://bugs.llvm.org/show_bug.cgi?id=44696
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73613
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
Commit 7830c2d44f531bbe09f997436b6608a140db46fb by kadircet
[clangd] Get rid of delayed template parsing
Summary: No need to pass fno-delayed-template-parsing as the opposite
flag is only passed to cc1 when abi is set to msvc. Sending as a
follow-up to D73613 to keep changes in the release branch minimal.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73615
The file was modifiedclang-tools-extra/clangd/unittests/HoverTests.cpp
Commit 63c8972562a4cf38b6e2e39da20f86ceabfb71e4 by david.truby
[MLIR] Add OpenMP dialect with barrier operation
Summary: Barrier is a simple operation that takes no arguments and
returns nothing, but implies a side effect (synchronization of all
threads)
Reviewers: jdoerfert
Subscribers: mgorny, guansong, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, nicolasvasilache, arpith-jacob, mgester,
lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72400
The file was addedmlir/include/mlir/Dialect/OpenMP/OpenMPDialect.h
The file was addedmlir/include/mlir/Dialect/OpenMP/OpenMPOps.td
The file was modifiedmlir/tools/mlir-opt/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/CMakeLists.txt
The file was modifiedmlir/lib/Dialect/CMakeLists.txt
The file was addedmlir/include/mlir/Dialect/OpenMP/CMakeLists.txt
The file was addedmlir/lib/Dialect/OpenMP/CMakeLists.txt
The file was addedmlir/test/Dialect/OpenMP/ops.mlir
The file was addedmlir/lib/Dialect/OpenMP/IR/OpenMPDialect.cpp
Commit 0b4a047bfbd11fe1f5abda8da0e2391c1918162a by peter.smith
[LLD][ELF][ARM] Do not substitute BL/BLX for non STT_FUNC symbols.
D73474 disabled the generation of interworking thunks for branch
relocations to non STT_FUNC symbols. This patch handles the case of BL
and BLX instructions to non STT_FUNC symbols. LLD would normally look at
the state of the caller and the callee and write a BL if the states are
the same and a BLX if the states are different.
This patch disables BL/BLX substitution when the destination symbol does
not have type STT_FUNC. This brings our behavior in line with GNU ld
which may prevent difficult to diagnose runtime errors when switching to
lld.
Differential Revision: https://reviews.llvm.org/D73542
The file was modifiedlld/test/ELF/arm-thumb-undefined-weak.s
The file was modifiedlld/ELF/Arch/ARM.cpp
The file was modifiedlld/test/ELF/arm-undefined-weak.s
The file was modifiedlld/test/ELF/arm-thumb-interwork-notfunc.s
Commit 6f6952780ba92782c38b37b7bf65a079c1d1215f by sam.mccall
[clangd] add CODE_OWNERS
Reviewers: klimek
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73537
The file was modifiedclang-tools-extra/CODE_OWNERS.TXT
Commit bcb3e42fdfb30f516fefd56609a969059b60a982 by sam.mccall
[clangd] Go-to-definition on 'override' jumps to overridden method(s)
Reviewers: kadircet
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73367
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
Commit e864f937669c996b4dc15db7d0ebe4073527c165 by hokein.wu
[clangd] Replace raw lexer code with token buffer in prepare rename.
Summary: there is a slight behavior change in this patch:
- before: `in^t a;`, returns our internal error message (no symbol at
given location)
- after: `in^t a, returns null, and client displays their message (e.g.
  e.g. "the element can't be renamed" in vscode).
both are sensible according LSP, and we'd save one `rename` call in the
later case.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73610
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/test/rename.test
Commit 17fadeffcce97d79f5f132dacb143364622b6428 by hokein.wu
[clangd][vscode] Update lsp dependencies to pickup the progress support
in LSP 3.15
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73612
The file was modifiedclang-tools-extra/clangd/clients/clangd-vscode/package.json
Commit dc0d84f09e7472a0abe6f84985c247592cb78f35 by sam.parker
[NFC][ARM] Add test
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/unrolled-and-vector.mir
Commit 3cf80822a9064e9ae137f486bc321671842f3fd0 by kerry.mclaughlin
[AArch64][SVE] Add SVE2 intrinsics for uniform DSP operations
Summary: Implements the following intrinsics:
- sqrdmlah, sqrdmlsh, sqrdmulh & sqdmulh
- [s|u]hadd, [s|u]hsub, [s|u]rhadd & [s|u]hsubr
- urecpe, ursqrte, sqabs & sqneg
Reviewers: sdesmalen, efriedma, dancgr, cameron.mcinally
Reviewed By: efriedma
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, psnobl,
cfe-commits, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73493
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was addedllvm/test/CodeGen/AArch64/sve2-intrinsics-uniform-dsp.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
Commit a324fcf1ae62d065b957e66a9d2f5c18b6259d27 by martin
clang-format: insert trailing commas into containers.
Summary: This change adds an option to insert trailing commas into
container literals. For example, in JavaScript:
    const x = [
     a,
     b,
      ^~~~~ inserted if missing.
   ]
This is implemented as a seperate post-processing pass after formatting
(because formatting might change whether the container literal does or
does not wrap). This keeps the code relatively simple and orthogonal,
though it has the notable drawback that the newly inserted comma is not
taken into account for formatting decisions (e.g. it might exceed the 80
char limit). To avoid exceeding the ColumnLimit, a comma is only
inserted if it fits into the limit.
Trailing comma insertion conceptually conflicts with argument
bin-packing: inserting a comma disables bin-packing, so we cannot do
both. clang-format rejects FormatStyle configurations that do both with
this change.
Reviewers: krasimir, MyDeveloperDay
Subscribers: cfe-commits
Tags: #clang
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/unittests/Format/FormatTestJS.cpp
Commit e6b55cbcdc4c5a831c7d6e568506b0d7f6dee2a3 by grimar
[yaml2obj][obj2yaml] - Add lost test cases.
It is a part of https://reviews.llvm.org/D71872 which was lost somehow
during relanding after being reverted:
https://reviews.llvm.org/rG7570d387c21935b58afa67cb9ee17250e38721fa
The file was addedllvm/test/tools/obj2yaml/relr-section.yaml
The file was addedllvm/test/tools/yaml2obj/ELF/relr-section.yaml
Commit d5dfd1350efb80f9674db322999dd883fb36a6ad by aaron
Add TagDecl AST matcher
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNarrowingTest.cpp
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersNodeTest.cpp
The file was modifiedclang/lib/ASTMatchers/ASTMatchersInternal.cpp
The file was modifiedclang/docs/LibASTMatchersReference.html
Commit 4ec2a267321124a7fe8efe794ce40da67ce1d6bd by Sanne.Wouda
Fix clang test build
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit cbc45e4e7521411a36f8ba216932aa3592d86e8a by Sanne.Wouda
Regenerate aarch64-neon-2velem.c CHECK lines
The file was modifiedclang/test/CodeGen/aarch64-neon-2velem.c
Commit 6b587ee23c621767634a686310225d8c03528022 by simon.moll
[VE] Isel patterns for fp32/64 and i32/64 conversion
Summary: fp32/64 <> signed/unsigned i32/64 conversion isel patterns and
tests
(This patch depends on `fsub` implemented by
https://reviews.llvm.org/D73540 )
Reviewers: arsenm, craig.topper, rengolin, k-ishizaka
Reviewed By: arsenm
Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits
Tags: #ve, #llvm
Differential Revision: https://reviews.llvm.org/D73544
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was addedllvm/test/CodeGen/VE/int_to_fp.ll
The file was modifiedllvm/test/CodeGen/VE/cast.ll
The file was addedllvm/test/CodeGen/VE/fp_to_int.ll
The file was addedllvm/test/CodeGen/VE/bitcast.ll
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
Commit f719b0ba13f4373721473f4189070207613498ce by sjoerd.meijer
[MVE][MC] evaluateBranch: add missing MVE opcode
This adds some missing MVE opcodes to evaluateBranch, which results in
llvm-objdump being able to print the PC relative branch target as an
annotation.
Differential Revision: https://reviews.llvm.org/D73553
The file was modifiedllvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp
The file was addedllvm/test/MC/Disassembler/ARM/mve-lol.txt
Commit 2939fc13c8f6a5dbd1be77c1d19dc2720253b8c5 by Sanne.Wouda
[AArch64] Add IR intrinsics for sq(r)dmulh_lane(q)
Summary: Currently, sqdmulh_lane and friends from the ACLE (implemented
in arm_neon.h), are represented in LLVM IR as a (by vector) sqdmulh and
a vector of (repeated) indices, like so:
   %shuffle = shufflevector <4 x i16> %v, <4 x i16> undef, <4 x i32>
<i32 3, i32 3, i32 3, i32 3>
  %vqdmulh2.i = tail call <4 x i16> @llvm.aarch64.neon.sqdmulh.v4i16(<4
x i16> %a, <4 x i16> %shuffle)
When %v's values are known, the shufflevector is optimized away and we
are no longer able to select the lane variant of sqdmulh in the backend.
This defeats a (hand-coded) optimization that packs several constants
into a single vector and uses the lane intrinsics to reduce register
pressure and trade-off materialising several constants for a single
vector load from the constant pool, like so:
   int16x8_t v = {2,3,4,5,6,7,8,9};
  a = vqdmulh_laneq_s16(a, v, 0);
  b = vqdmulh_laneq_s16(b, v, 1);
  c = vqdmulh_laneq_s16(c, v, 2);
  d = vqdmulh_laneq_s16(d, v, 3);
  [...]
In one microbenchmark from libjpeg-turbo this accounts for a 2.5% to 4%
performance difference.
We could teach the compiler to recover the lane variants, but this would
likely require its own pass.  (Alternatively, "volatile" could be used
on the constants vector, but this is a bit ugly.)
This patch instead implements the following LLVM IR intrinsics for
AArch64 to maintain the original structure through IR optmization and
into instruction selection:
- sqdmulh_lane
- sqdmulh_laneq
- sqrdmulh_lane
- sqrdmulh_laneq.
These 'lane' variants need an additional register class.  The second
argument must be in the lower half of the 64-bit NEON register file, but
only when operating on i16 elements.
Note that the existing patterns for shufflevector and sqdmulh into
sqdmulh_lane
(etc.) remain, so code that does not rely on NEON intrinsics to generate
these instructions is not affected.
This patch also changes clang to emit these IR intrinsics for the
corresponding NEON intrinsics (AArch64 only).
Reviewers: SjoerdMeijer, dmgreen, t.p.northover, rovka, rengolin,
efriedma
Reviewed By: efriedma
Subscribers: kristof.beyls, hiraditya, jdoerfert, cfe-commits,
llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D71469
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
The file was modifiedclang/include/clang/Basic/arm_neon.td
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
The file was modifiedclang/test/CodeGen/aarch64-neon-2velem.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/arm64-neon-2velem.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
Commit 87f6314f8cd1fd5bb0ce04eff6c5843529c6ab53 by spatel
[InstCombine] canonicalize splat shuffle after cmp
cmp (splat V1, M), SplatC --> splat (cmp V1, SplatC'), M
As discussed in PR44588: https://bugs.llvm.org/show_bug.cgi?id=44588
...we try harder to push shuffles after binops than after compares.
This patch handles the special (but presumably most common case) of
splat shuffles. If both operands are splats, then we can do the
comparison on the non-splat inputs followed by splat of the compare.
That should take care of the regression noted in D73411.
There's another potential fold requested in PR37463 to scalarize the
compare, but that's another patch (and it's not clear if we can do that
without the ability to undo it later):
https://bugs.llvm.org/show_bug.cgi?id=37463
Differential Revision: https://reviews.llvm.org/D73575
The file was modifiedllvm/test/Transforms/InstCombine/icmp-vec.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/getelementptr.ll
The file was modifiedllvm/test/Transforms/InstCombine/gep-inbounds-null.ll
Commit fce8983a3c03b41c3ba4bdaef72e64e29ff9ecc0 by hokein.wu
[clangd] Remove the temporary alias for clangd::DiagnosticConsumer.
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73619
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
Commit 0994c485e61322a04e580d83617eab547292aba2 by cwabbott0
AMDGPU: Fix handling of infinite loops in fragment shaders
Summary: Due to the fact that kill is just a normal intrinsic, even
though it's supposed to terminate the thread, we can end up with
provably infinite loops that are actually supposed to end successfully.
The AMDGPUUnifyDivergentExitNodes pass breaks up these loops, but
because there's no obvious place to make the loop branch to, it just
makes it return immediately, which skips the exports that are supposed
to happen at the end and hangs the GPU if all the threads end up being
killed.
While it would be nice if the fact that kill terminates the thread were
modeled in the IR, I think that the structurizer as-is would make a mess
if we did that when the kill is inside control flow. For now, we just
add a null export at the end to make sure that it always exports
something, which fixes the immediate problem without penalizing the more
common case. This means that we sometimes do two "done" exports when
only some of the threads enter the discard loop, but from tests the
hardware seems ok with that.
This fixes dEQP-VK.graphicsfuzz.while-inside-switch with radv.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye,
hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70781
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
The file was addedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
Commit 323bfde20c5f3e63db3d6b385b394ed38542abe6 by cwabbott0
AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns
Summary: The code was assuming in a few places that if there was only
one exit from the function that it was a normal return, which is
invalid. It could be an infinite loop, in which case we still need to
insert the usual fake edge so that the null export happens. This fixes
shaders that end with an infinite loop that discards.
Reviewers: arsenm, nhaehnle, critson
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye,
hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71192
The file was modifiedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
Commit 2103e08b3f611e6208de01dc84baa022dd39240a by uabelho
More fixes of implicit std::string conversions
The file was modifiedclang-tools-extra/clang-tidy/cppcoreguidelines/SpecialMemberFunctionsCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidy.cpp
The file was modifiedclang-tools-extra/clang-doc/HTMLGenerator.cpp
Commit c5c1bb33747a556a4d3cd12eeaba9146e7c6068f by Matthew.Arsenault
GlobalISel: Lower G_WRITE_REGISTER
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-fallback.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/write_register.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
Commit a9af1dc34d33762751958a91aa8b82b856c2077a by Matthew.Arsenault
Analysis: Add max recursison to isDereferenceableAndAlignedPointer
Fixes stack overflow in test/CodeGen/X86/large-gep-chain.ll when store
lowering starts adding dereferenceable flags.
The file was modifiedllvm/lib/Analysis/Loads.cpp
Commit 02adfb5155e5ee1bb94b9b196db57b9902ae8278 by Matthew.Arsenault
AMDGPU/GlobalISel: Manually select scalar f64 G_FNEG
This should be no problem to support with a pattern, but it turns out
there are just too many yaks to shave. The main problem is in the DAG
emitter, which I have no desire to sink effort into fixing.
If we had a bit to disable patterns in the DAG importer, fixing the
GlobalISelEmitter is more manageable.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fneg.mir
Commit ea1e3369f7a8aa9729f8e2fc208b8f6a79392874 by ntv
[mlir][Linalg] Introduce folding patterns to remove certain MemRefCastOp
Summary: Canonicalization and folding patterns in StandardOps may
interfere with the needs of Linalg. This revision introduces specific
foldings for dynamic memrefs that can be proven to be static.
Very concretely:
Determines whether it is possible to fold it away in the parent Linalg
op:
```mlir
%1 = memref_cast %0 : memref<8x16xf32> to memref<?x?xf32>
%2 = linalg.slice %1 ... : memref<?x?xf32> ...
// or
%1 = memref_cast %0 : memref<8x16xf32, affine_map<(i, j)->(16 * i +
j)>>
        to memref<?x?xf32>
linalg.generic(%1 ...) : memref<?x?xf32> ...
```
into
```mlir
%2 = linalg.slice %0 ... : memref<8x16xf32> ...
// or
linalg.generic(%0 ... : memref<8x16xf32, affine_map<(i, j)->(16 * i +
j)>>
```
Reviewers: ftynse, aartbik, jsetoain, tetuante, asaadaldien
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73565
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was addedmlir/test/Dialect/Linalg/canonicalize.mlir
Commit c2dcdf95eba0d8210bf456821b8afff9b22a7bc9 by gchatelet
[libc] Fix benchmarks CMakeLists.txt
Summary: This is a follow up on
https://reviews.llvm.org/rGaba80d0734d1#886881.
`target_link_options` requires CMake>=3.13.
Reviewers: abrachet
Subscribers: mgorny, MaskRay, tschuett, libc-commits
Tags: #libc-project
Differential Revision: https://reviews.llvm.org/D73452
The file was modifiedlibc/utils/benchmarks/CMakeLists.txt
Commit 0bec0e71514a038f828b147725f44c5ed03a608b by simon.moll
[VE] udiv/sdiv/urem/srem/mul isel patterns
Summary: udiv/sdiv/urem/srem/mul integer isel patterns and tests.
Pretend for now that integer division were always cheap in HW.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73623
The file was addedllvm/test/CodeGen/VE/multiply.ll
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
The file was addedllvm/test/CodeGen/VE/rem.ll
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was modifiedllvm/lib/Target/VE/VEISelLowering.h
The file was addedllvm/test/CodeGen/VE/div.ll
Commit da58e68fdf1ba9efd833f8b46216a6642a139178 by whitneyt
[LoopFusion] Move instructions from FC1.Preheader to FC0.Preheader when
proven safe.
Summary: Currently LoopFusion give up when the second loop nest
preheader is not empty. For example:
for (int i = 0; i < 100; ++i) {} x+=1; for (int i = 0; i < 100; ++i) {}
The above example should be safe to fuse. This PR moves instructions in
FC1 preheader (e.g. x+=1; ) to FC0 preheader, which then LoopFusion is
able to fuse them. Reviewer: kbarton, Meinersbur, jdoerfert, dmgreen,
fhahn, hfinkel, bmahjour, etiotto Reviewed By: jdoerfert Subscribers:
hiraditya, llvm-commits Tag: LLVM Differential Revision:
https://reviews.llvm.org/D71821
The file was modifiedllvm/lib/Transforms/Scalar/LoopFuse.cpp
The file was modifiedllvm/test/Transforms/LoopFusion/simple.ll
The file was modifiedllvm/include/llvm/Transforms/Utils/CodeMoverUtils.h
The file was modifiedllvm/test/Transforms/LoopFusion/diagnostics_missed.ll
The file was modifiedllvm/lib/Transforms/Utils/CodeMoverUtils.cpp
The file was modifiedllvm/test/Transforms/LoopFusion/guarded.ll
Commit 9a08a3fab9993f9b93167de5c783dfed6dd7efc0 by adam.balogh
[Analyzer] Split container modeling from iterator modeling
Iterator modeling depends on container modeling, but not vice versa.
This enables the possibility to arrange these two modeling checkers into
separate layers.
There are several advantages for doing this: the first one is that this
way we can keep the respective modeling checkers moderately simple and
small. Furthermore, this enables creation of checkers on container
operations which only depend on the container modeling. Thus iterator
modeling can be disabled together with the iterator checkers if they are
not needed.
Since many container operations also affect iterators, container
modeling also uses the iterator library: it creates iterator positions
upon calling the `begin()` or `end()` method of a containter (but
propagation of the abstract position is left to the iterator modeling),
shifts or invalidates iterators according to the rules upon calling a
container modifier and rebinds the iterator to a new container upon
`std::move()`.
Iterator modeling propagates the abstract iterator position, handles the
relations between iterator positions and models iterator operations such
as increments and decrements.
Differential Revision: https://reviews.llvm.org/D73547
The file was modifiedclang/lib/StaticAnalyzer/Checkers/DebugIteratorModeling.cpp
The file was modifiedclang/test/Analysis/debug-iterator-modeling.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td
The file was addedclang/test/Analysis/debug-container-modeling.cpp
The file was modifiedclang/test/Analysis/iterator-modelling.cpp
The file was addedclang/lib/StaticAnalyzer/Checkers/DebugContainerModeling.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/Iterator.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/Iterator.h
The file was addedclang/lib/StaticAnalyzer/Checkers/ContainerModeling.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp
The file was addedclang/test/Analysis/container-modeling.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CMakeLists.txt
Commit 13ab22ab22de7795a1e18683f018b556c1df6f1b by cwabbott0
Revert "AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal
returns"
This reverts commit 323bfde20c5f3e63db3d6b385b394ed38542abe6.
The file was modifiedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
Commit 08b205bb480807bcd1e0fc7497d443785f656144 by cwabbott0
Revert "AMDGPU: Fix handling of infinite loops in fragment shaders"
This reverts commit 0994c485e61322a04e580d83617eab547292aba2.
The file was removedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
Commit df8f2774b6aaf4f1e1448a5bdebe7d71e296ad8f by llvmgnsyncbot
[gn build] Port 9a08a3fab99
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Checkers/BUILD.gn
Commit 24ab761a60b14cd8824be8d0769d842172ed0334 by Matthew.Arsenault
LLT: Add changeNumElements
This is the element analog of changeElementType/changeElementSize
The file was modifiedllvm/include/llvm/Support/LowLevelTypeImpl.h
The file was modifiedllvm/unittests/CodeGen/LowLevelTypeTest.cpp
Commit 31e07692d7f2b383bd64c63cd2b5c35b6503cf3a by hans
Work around PR44697 in CrashRecoveryContext
The file was modifiedllvm/lib/Support/CrashRecoveryContext.cpp
Commit 79748add70d2d24c48c8d77cc777d855a939576e by llvm-dev
Fix MSVC lamdba default capture mode warning. NFCI.
The file was modifiedllvm/lib/Transforms/Utils/CodeMoverUtils.cpp
Commit 01213f90700dbb98a0dbcc01da8fdb89f6db5617 by benny.kra
[clang-tidy] Initialize token before handing it to the lexer
Found by msan.
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseTrailingReturnTypeCheck.cpp
Commit 752e2e245ab6bfb6203c226bbe295ddf4e018830 by Matthew.Arsenault
AMDGPU/GlobalISel: Rewrite fadd select tests
Convert to the style most others use with one test instruction per
function, and use an implicit use to ensure the result register class is
constrained.
Change-Id: I6109148b0e3c80aa5535796a37abca583c19a936
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s16.mir
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.mir
Commit f717483acd5e7d278ecd54ae80d2c1138fb51d06 by Matthew.Arsenault
GlobalISel: Assert on invalid bitcast in MIRBuilder
The other casts validate, so this should too.
The file was modifiedllvm/lib/CodeGen/GlobalISel/MachineIRBuilder.cpp
Commit c2ad7ee1a9add223f8c9cdb5761c71cfdcda9136 by Stanislav.Mekhanoshin
[AMDGPU] override isHighLatencyDef
SIMachineScheduler uses isHighLatencyInstruction with the same
sematincs, but TargetInstrInfo has virtual isHighLatencyDef method, so
override it instead.
Added FLAT to the list of high latency opcodes and a check for mayLoad
since stores are not technically high latency in terms of data
dependency.
This change did not produce any visible impact on our tests.
Differential Revision: https://reviews.llvm.org/D73582
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
Commit 94e8ef4d4c7f608a2cc9673e7a1a0937f6b7935d by Matthew.Arsenault
AMDGPU/GlobalISel: Look through copies for source modifiers
When all VOP instructions are legalized to VGPRs, any SGPR source
modifiers will have a copy in the way.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s32.mir
Commit 87d98c149504f9b0751189744472d7cc94883960 by cwabbott0
AMDGPU: Fix handling of infinite loops in fragment shaders
Summary: Due to the fact that kill is just a normal intrinsic, even
though it's supposed to terminate the thread, we can end up with
provably infinite loops that are actually supposed to end successfully.
The AMDGPUUnifyDivergentExitNodes pass breaks up these loops, but
because there's no obvious place to make the loop branch to, it just
makes it return immediately, which skips the exports that are supposed
to happen at the end and hangs the GPU if all the threads end up being
killed.
While it would be nice if the fact that kill terminates the thread were
modeled in the IR, I think that the structurizer as-is would make a mess
if we did that when the kill is inside control flow. For now, we just
add a null export at the end to make sure that it always exports
something, which fixes the immediate problem without penalizing the more
common case. This means that we sometimes do two "done" exports when
only some of the threads enter the discard loop, but from tests the
hardware seems ok with that.
This fixes dEQP-VK.graphicsfuzz.while-inside-switch with radv.
Reviewers: arsenm, nhaehnle
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye,
hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70781
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
The file was addedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
Commit ab2300bc154f7bed43f85f74fd3fe31be71d90e0 by aminim
[PassManagerBuilder] Remove global extension when a plugin is unloaded
This commit fixes PR39321.
GlobalExtensions is not guaranteed to be destroyed when optimizer
plugins are unloaded. If it is indeed destroyed after a plugin is
dlclose-d, the destructor of the corresponding ExtensionFn is not mapped
anymore, causing a call to unmapped memory during destruction.
This commit guarantees that extensions coming from external plugins are
removed from GlobalExtensions when the plugin is unloaded if
GlobalExtensions has not been destroyed yet.
Differential Revision: https://reviews.llvm.org/D71959
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/PassManagerBuilder.h
Commit 96352e0a1bda0fc04729ff90d0d576e8f366760f by Matthew.Arsenault
AMDGPU/GlobalISel: Handle LDS with relocations case
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-relocs.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-zero-initializer.ll
Commit 0d7bd343127ee161a01a1509effba0fdd480c9e1 by jay.foad
[MachineScheduler] Ignore artificial edges when forming store chains
Summary: BaseMemOpClusterMutation::apply forms store chains by looking
for control (i.e. non-data) dependencies from one mem op to another.
In the test case, clusterNeighboringMemOps successfully clusters the
loads, and then adds artificial edges to the loads' successors as
described in the comment:
     // Copy successor edges from SUa to SUb. Interleaving computation
     // dependent on SUa can prevent load combining due to register
reuse. The effect of this is that *data* dependencies from one load to a
store are copied as *artificial* dependencies from a different load to
the same store.
Then when BaseMemOpClusterMutation::apply looks at the stores, it finds
that some of them have a control dependency on a previous load, which
breaks the chains and means that the stores are not all considered part
of the same chain and won't all be clustered.
The fix is to only consider non-artificial control dependencies when
forming chains.
Subscribers: MatzeB, jvesely, nhaehnle, hiraditya, javed.absar,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71717
The file was addedllvm/test/CodeGen/AMDGPU/cluster_stores.ll
The file was modifiedllvm/lib/CodeGen/MachineScheduler.cpp
Commit 68b102b97ac340698e31ab5af0c4394a9789a49c by Matthew.Arsenault
AMDGPU: Directly select 16-bank LDS case of llvm.amdgcn.interp.p1.f16
Manually select this is as a tablegen workraound. Both SelectionDAG and
GlobalISel end up misplacing the copy to m0 when both instructions in
the output need it. Neither considers that both output instructions
depend on m0. I don't know of any other pattern we need to handle this
case, so it's less effort to just workaround this for now.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
Commit b63629a58d72cb881e79cbabe8a56da90d68ae5b by Matthew.Arsenault
GlobalISel: Fix mask computation in lowerInsert
This is supposed to be the high bit index, not the width. Use the
wrapping form of getBitsSet and avoid the bitflip.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-insert.mir
Commit fef80a2946e5d910deea818ae6db3ef0c4845a5b by simon.moll
[VE] (conditional) branch modification & isel patterns
Summary: InstInfo for branch modification, (conditional) branch isel
patterns and tests.
Reviewed By: arsenm
Differential Revision: https://reviews.llvm.org/D73632
The file was addedllvm/test/CodeGen/VE/branch1.ll
The file was modifiedllvm/lib/Target/VE/VEISelLowering.h
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.h
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.td
The file was modifiedllvm/lib/Target/VE/VEISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/VE/VEInstrInfo.cpp
The file was modifiedllvm/lib/Target/VE/VEISelLowering.cpp
Commit b136238bb4e502a46b720d6002cd5b7c248486c2 by jay.foad
Add a test extracted from D69557 "AsmParser: Allow FMF on varargs call"
The file was modifiedllvm/test/Assembler/fast-math-flags.ll
Commit 62129878a66b2935bdab1aabfa6261dd7d25c81e by Matthew.Arsenault
AMDGPU/GlobalISel: Fix tablegen selection for scalar bin ops
Fixes selection for scalar G_SMULH/G_UMULH. Also switches to using
tablegen selected add/sub, which switch to the signed version of the
opcode. This matches the current DAG behavior. We can't drop the manual
selection for add/sub yet, because it's still both for VALU add/sub and
for G_PTR_ADD.
The file was modifiedllvm/lib/Target/AMDGPU/SOPInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-insert-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-extract-vector-elt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ctpop.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
Commit e5edd641fde0d3fae96593e02ef9453dffa5754a by craig.topper
[X86] Use a shorter sequence to implement FLT_ROUNDS
This code needs to map from the FPCW 2-bit encoding for rounding mode to
the 2-bit encoding defined for FLT_ROUNDS. The previous implementation
did some clever swapping of bits and adding 1 modulo 4 to do the
mapping.
This patch instead uses an 8-bit immediate as a lookup table of four
2-bit values. Then we use the 2-bit FPCW encoding to index the lookup
table by using a right shift and an AND. This requires extracting the
2-bit value from FPCW and multipying it by 2 to make it usable as a
shift amount. But still results in less code.
Differential Revision: https://reviews.llvm.org/D73599
The file was modifiedllvm/test/CodeGen/X86/flt-rounds.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 48bd6a0986853662393188072c6211acda413ddf by llvm-dev
[DAGCombiner] visitIMINMAX - use general
SelectionDAG::FoldConstantArithmetic
This handles all the constant splat / opaque testing for us instead of
the ConstantSDNode variant where we have to do it ourselves.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 4b04e117357553205b9c9a95da7e44f026cd842f by llvm-dev
[DAGCombiner] Sub/SUBSAT - use general
SelectionDAG::FoldConstantArithmetic
This handles all the constant splat / opaque testing for us.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 6e82d0dfd8dfaebc3985e73740a020b273a2dd31 by serguei.n.dmitriev
[Clang][Bundler] Add 'exclude' flag to target objects sections
Summary: This flag tells link editor to exclude section from linker
inputs when linking executable or shared library.
Reviewers: ABataev, alexshap, jdoerfert
Reviewed By: ABataev
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73408
The file was modifiedclang/test/Driver/clang-offload-bundler.c
The file was modifiedclang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
Commit d07a7895792a0ef9ea2c4466b62b1471579afc8b by jay.foad
[AMDGPU] Cluster FLAT instructions with both vaddr and saddr
Reviewers: rampitec, arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73634
The file was modifiedllvm/test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr.ll
Commit 4bc07c332a2fe657b7ce3f01cdc2e73b096e2154 by francesco.petrogalli
[llvm][docs] LangRef for IR attribute `vector-function-abi-variant`.
Reviewers: jdoerfert, andwar, simoll, rengolin, hfinkel, xtian
Reviewed By: jdoerfert
Subscribers: llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72798
The file was modifiedllvm/docs/LangRef.rst
Commit 90c31b0f428fe911255277a60782ea9114700475 by craig.topper
[X86] Custom lower ISD::FROUND with SSE4.1 to avoid a libcall.
ISD::FROUND is defined to round to nearest with ties rounding away from
0. This mode isn't supported in hardware on X86.
But as long as we aren't compiling with trapping math, we can emulate
this with floor(X + copysign(nextafter(0.5, 0.0), X)).
We have to use nextafter to avoid some corner cases that adding 0.5
would have. For example, if X is nextafter(0.5, 0.0) it should round to
0.0, but adding 0.5 would need one extra bit of mantissa than can be
stored so it rounds to 1.0. Adding nextafter(0.5, 0.0) instead will just
increase the exponent by 1 and leave the mantissa as all 1s. This would
be nextafter(1.0, 0.0) which will floor to 0.0.
Techically this requires -fno-trapping-math which isn't our default. But
if we care about exceptions we should be using constrained intrinsics.
Constrained intrinsics would use STRICT_FROUND which won't go through
this code.
Fixes PR42195.
Differential Revision: https://reviews.llvm.org/D73607
The file was modifiedllvm/test/CodeGen/X86/vec-libcalls.ll
The file was modifiedllvm/test/CodeGen/X86/extractelement-fp.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was removedllvm/test/CodeGen/X86/vec_round.ll
Commit 33fa6727b7ce1c3aad6ef4bb24dff2ce3e3b2c7a by Jonas Devlieghere
[lldb/Reproducers] Add logging to the string template specialization
Only the templated function had logging for deserialization. The string
deserializer is implemented as a specialization and now prints to the
log as well.
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
Commit f4ca2ac8225e090a7c351c7e1219bcae8838d4e0 by bjorn.a.pettersson
[scudo] Skip building scudo standalone if sys/auxv.h can't be found
Summary: Since commit c299d1981deaf822dfaa06c791f3158bd6801e20 scudo
standalone can't be built without including sys/auxv.h. I do not have
that file on my system, and my builds have failed when trying to simply
build "all" runtimes. Assuming that "all" means "all possible given the
current environment" we need to guard the setting of
COMPILER_RT_HAS_SCUDO_STANDALONE=TRUE by first checking if sys/auxv.h
can be found.
Reviewers: pcc, cryptoad
Reviewed By: pcc
Subscribers: mgorny, #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73631
The file was modifiedcompiler-rt/cmake/config-ix.cmake
Commit 6a74641e723be430b05c45b240f897ab1d566e68 by nikita.ppv
[InstCombine] Regenerate test checks; NFC
The file was modifiedllvm/test/Transforms/InstCombine/demorgan.ll
The file was modifiedllvm/test/Transforms/InstCombine/pr25342.ll
The file was modifiedllvm/test/Transforms/InstCombine/minmax-fold.ll
Commit 8093d37ed2548ff5c8d6d7c51bd0431afbbf4209 by llvm-dev
Fix switch covers all cases static analyzer warning. NFCI.
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
Commit 25b8e96388197147a14413c0b53c41f918fb49c0 by llvm-dev
[DAGCombiner] ISD::MUL - use general
SelectionDAG::FoldConstantArithmetic
This handles all the constant splat / opaque testing for us.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 4a4ce14eb2c6b35719d57c2c25cbee7e79d19cb0 by maskray
[ELF] Mention symbol name in reportRangeError()
For an out-of-range relocation referencing a non-local symbol, report
the symbol name and the object file that defines the symbol. As an
example:
``` t.o:(function func: .text.func+0x3): relocation R_X86_64_32S out of
range: -281474974609120 is not in [-2147483648, 2147483647]
```
=>
``` t.o:(function func: .text.func+0x3): relocation R_X86_64_32S out of
range: -281474974609120 is not in [-2147483648, 2147483647]; references
func
>>> defined in t1.o
```
Reviewed By: grimar
Differential Revision: https://reviews.llvm.org/D73518
The file was modifiedlld/test/ELF/aarch64-abs32.s
The file was modifiedlld/test/ELF/riscv-hi20-lo12.s
The file was modifiedlld/test/ELF/aarch64-abs16.s
The file was modifiedlld/test/ELF/i386-reloc-16.s
The file was modifiedlld/ELF/Target.h
The file was modifiedlld/test/ELF/hexagon-jump-error.s
The file was modifiedlld/test/ELF/riscv-branch.s
The file was modifiedlld/test/ELF/aarch64-prel32.s
The file was modifiedlld/test/ELF/riscv-call.s
The file was modifiedlld/test/ELF/x86-64-reloc-error.s
The file was modifiedlld/ELF/Relocations.cpp
The file was modifiedlld/test/ELF/riscv-pcrel-hilo.s
The file was modifiedlld/test/ELF/x86-64-reloc-error2.s
The file was modifiedlld/test/ELF/aarch64-prel16.s
The file was modifiedlld/test/ELF/i386-reloc-range.s
The file was modifiedlld/test/ELF/ppc64-reloc-addr.s
The file was modifiedlld/test/ELF/i386-reloc-8.s
The file was modifiedlld/test/ELF/riscv-jal.s
Commit aa6ec19c5f428b4355885796da196e802d1f32ae by Adrian Prantl
Add dwarfdump support for DW_OP_regval_type.
Differential Revision: https://reviews.llvm.org/D73598
The file was addedllvm/test/tools/llvm-dwarfdump/X86/dw_op_regval_type.s
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFExpression.cpp
Commit b4c911eccc4cccdd8cb536dc003ff9d4eb3bdc70 by eric
[libcxx] Add a std::string_view pretty printer for libcxx.
This adds a std::string_view pretty printer for libcxx and updates the
gdb pretty printer test.
Patch by Ali Tamur (tamur@google.com) Reviewed as
https://reviews.llvm.org/D73514
The file was modifiedlibcxx/utils/gdb/libcxx/printers.py
The file was modifiedlibcxx/test/pretty_printers/gdb_pretty_printer_test.sh.cpp
Commit a5a4a47d691459afffc552bd3be7abfc86a49793 by huihuiz
[AArch64] Fix data race on RegisterBank initialization.
Summary: The initialization of RegisterBank needs to be done only once.
The logic of AlreadyInit has a data race, use llvm::call_once instead.
This issue was identified through thread sanitizer.
Reviewers: efriedma, apazos, qcolombet, dsanders
Reviewed By: efriedma
Subscribers: arsenm, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73587
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
Commit 8bb6c8a22af845618cfd6c27853dca1b48d30ce0 by huihuiz
[AMDGPU] Fix data race on RegisterBank initialization.
Summary: The initialization of RegisterBank needs to be done only once.
The logic of AlreadyInit has data race, use llvm::call_once instead.
This is continuing work of D73587.
Reviewers: arsenm, tstellar, ronlieb, efriedma, apazos, nhaehnle
Reviewed By: nhaehnle
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73604
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit 91618d940ea3009d7e1489df4c8ca12017a0f612 by huihuiz
[ARM] Fix data race on RegisterBank initialization.
Summary: The initialization of RegisterBank needs to be done only once.
The logic of AlreadyInit has data race, use llvm::call_once instead.
This is continuing work of D73587.
Reviewers: arsenm, rovka, dsanders, t.p.northover, efriedma, apazos
Reviewed By: arsenm
Subscribers: wdng, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73605
The file was modifiedllvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
Commit d7049213d0fcda691c9e79f9b41e357198d99738 by Jonas Devlieghere
[SmallString] Add explicit conversion to std::string
With the conversion between StringRef and std::string now being
explicit, converting SmallStrings becomes more tedious. This patch adds
an explicit operator so you can write std::string(Str) instead of
Str.str().str().
Differential revision: https://reviews.llvm.org/D73640
The file was modifiedllvm/unittests/ADT/SmallStringTest.cpp
The file was modifiedllvm/include/llvm/ADT/SmallString.h
Commit 816ee8a4239cb0a1bc475e134ae6b24b3d92765d by Adrian Prantl
DwarfExpression: Factor out getOrCreateBaseType() (NFC)
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
Commit 18dbe1b279c344f600b1fd7dd6f6bbd3dd08f1de by Adrian Prantl
Run clang-format on DwarfExpression (NFC)
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/DwarfExpression.h
Commit ce07cdea336619c308c3130e936944c67774549d by Jonas Devlieghere
[lldb/Host] Fix implicit StringRef to std::string conversion
lldb\source\Host\windows\Host.cpp(228): error C2440: 'initializing':
cannot convert from 'llvm::StringRef' to
'std::basic_string<char,std::char_traits<char>,std::allocator<char>>'
The file was modifiedlldb/source/Host/windows/Host.cpp
Commit 2605adb69c6f1f95c709c21560add8230e30e60b by Austin.Kerbow
[AMDGPU][GlobalISel] Select 8-byte LDS Ops with 4-byte alignment
Reviewers: arsenm
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, rovka,
dstuttard, tpr, t-tye, hiraditya, Petar.Avramovic, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73585
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/DSInstructions.td
Commit b500c49cd4f81f067cda721049cb1fd72a5e7bf5 by sam.mccall
[clangd] Don't mmap source files on all platforms --> don't crash on git
checkout
Summary: Previously we mmapped on unix and not on windows: on windows
mmap takes an exclusive lock on the file and prevents the user saving
changes!
The failure mode on linux is a bit more subtle: if the file is changed
on disk but the SourceManager sticks around, then subsequent operations
on the SourceManager will fail as invariants are violated (e.g.
null-termination).
This commonly manifests as crashes after switching git branches with
many files open in clangd.
Nominally mmap is for performance here, and we should be willing to give
some up to stop crashing. Measurements on my system (linux+desktop+SSD)
at least show no measurable regression on an a fairly IO-heavy workload:
drop disk caches, open SemaOverload.cpp, wait for first diagnostics.
for i in `seq 100`; do
for variant in mmap volatile; do
   echo 3 | sudo tee /proc/sys/vm/drop_caches
   /usr/bin/time --append --quiet -o ~/timings -f "%C %E" \
   bin/clangd.$variant -sync -background-index=0 < /tmp/mirror >
/dev/null
done done
bin/clangd.mmap -sync -background-index=0 0:07.60 bin/clangd.volatile
-sync -background-index=0 0:07.89 bin/clangd.mmap -sync
-background-index=0 0:07.44 bin/clangd.volatile -sync
-background-index=0 0:07.89 bin/clangd.mmap -sync -background-index=0
0:07.42 bin/clangd.volatile -sync -background-index=0 0:07.50
bin/clangd.mmap -sync -background-index=0 0:07.90 bin/clangd.volatile
-sync -background-index=0 0:07.53 bin/clangd.mmap -sync
-background-index=0 0:07.64 bin/clangd.volatile -sync
-background-index=0 0:07.55 bin/clangd.mmap -sync -background-index=0
0:07.75 bin/clangd.volatile -sync -background-index=0 0:07.47
bin/clangd.mmap -sync -background-index=0 0:07.90 bin/clangd.volatile
-sync -background-index=0 0:07.50 bin/clangd.mmap -sync
-background-index=0 0:07.81 bin/clangd.volatile -sync
-background-index=0 0:07.95 bin/clangd.mmap -sync -background-index=0
0:07.55 bin/clangd.volatile -sync -background-index=0 0:07.65
bin/clangd.mmap -sync -background-index=0 0:08.15 bin/clangd.volatile
-sync -background-index=0 0:07.54 bin/clangd.mmap -sync
-background-index=0 0:07.78 bin/clangd.volatile -sync
-background-index=0 0:07.61 bin/clangd.mmap -sync -background-index=0
0:07.78 bin/clangd.volatile -sync -background-index=0 0:07.55
bin/clangd.mmap -sync -background-index=0 0:07.41 bin/clangd.volatile
-sync -background-index=0 0:07.40 bin/clangd.mmap -sync
-background-index=0 0:07.54 bin/clangd.volatile -sync
-background-index=0 0:07.42 bin/clangd.mmap -sync -background-index=0
0:07.45 bin/clangd.volatile -sync -background-index=0 0:07.49
bin/clangd.mmap -sync -background-index=0 0:07.95 bin/clangd.volatile
-sync -background-index=0 0:07.66 bin/clangd.mmap -sync
-background-index=0 0:08.04
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73617
The file was modifiedclang-tools-extra/clangd/FSProvider.h
The file was modifiedclang-tools-extra/clangd/FSProvider.cpp
Commit d2e2fc450e7a25ba71ffec2914262bfd85b8c5bd by huihuiz
[ConstantFold][SVE] Fix constant folding for scalable vector binary
operations.
Summary: Scalable vector should not be evaluated element by element. Add
support to handle scalable vector UndefValue.
Reviewers: sdesmalen, huntergr, spatel, lebedev.ri, apazos, efriedma,
willlovett
Reviewed By: efriedma
Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71445
The file was modifiedllvm/lib/IR/ConstantFold.cpp
The file was addedllvm/test/Analysis/ConstantFolding/vscale.ll
Commit f7245ef8976d9dc85aab0bd86770ef46947629a0 by llvm-dev
[DAGCombiner] ISD::SHL/SRA/SRL - use general
SelectionDAG::FoldConstantArithmetic
This handles all the constant splat / opaque testing for us.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 0758ac4e0cfbce67223ce2304e3b4b96c5006010 by saugustine
Handle non-absolute include dirs properly for both dwarf4 and dwarf5.
Summary: Add test case for the same. This test case will also serve as a
starting point for later symbolizer tests.
Reviewers: dblaikie, jdoerfert
Subscribers: hiraditya, llvm-commits, jhenderson
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73583
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
The file was addedllvm/test/DebugInfo/symbolize-paths.s
Commit 8903e61b66112941513449e32e65a7ea85ea31fc by maskray
[AsmPrinter][ELF] Define local aliases (.Lfoo$local) for GlobalObjects
For `MC_GlobalAddress` operands referencing **certain** GlobalObjects,
we can lower them to STB_LOCAL aliases to avoid costs brought by
assembler/linker's conservative decisions about symbol interposition:
* An assembler conservatively assumes a global default visibility symbol
interposable (ELF
semantics). So relocations in object files are needed even if the code
generator assumed
the definition exact and non-interposable.
* The relocations can cause the creation of PLT entries on some targets
for -shared links.
A linker conservatively assumes a global default visibility symbol
interposable (if not
otherwise constrained by -Bsymbolic/--dynamic-list/VER_NDX_LOCAL/etc).
"certain" refers to GlobalObjects in the intersection of
`hasExactDefinition() and !isInterposable()`: `external`, `appending`,
`internal`, `private`. Local linkages (`internal` and `private`) cannot
be interposed. `appending` is for very few objects LLVM interpret
specially.  So the set just includes `external`.
This patch emits STB_LOCAL aliases (.Lfoo$local) for such GlobalObjects,
so that targets can lower MC_GlobalAddress operands to STB_LOCAL aliases
if applicable. We may extend the scope and include GlobalAlias in the
future.
LLVM's existing -fno-semantic-interposition behaviors give us license to
do such optimizations:
* Various optimizations (ipconstprop, inliner, sccp, sroa, etc) treat
normal ExternalLinkage
GlobalObjects as non-interposable.
* Before D72197, MC resolved a PC-relative VK_None fixup to a non-local
symbol at assembly time (no
outstanding relocation), if the target is defined in the same section.
Put it simply, even if IR
optimizations failed to optimize and allowed interposition for the
function call in
`void foo() {} void bar() { foo(); }`, the assembler would disallow it.
This patch sets up AsmPrinter infrastructure to make
-fno-semantic-interposition more so. With and without the patch, the
object file output should be identical:
`.Lfoo$local` does not take a symbol table entry.
Reviewed By: sfertile
Differential Revision: https://reviews.llvm.org/D73228
The file was modifiedllvm/test/CodeGen/ARM/emutls.ll
The file was modifiedllvm/include/llvm/CodeGen/AsmPrinter.h
The file was modifiedllvm/test/CodeGen/X86/emutls.ll
The file was modifiedllvm/test/CodeGen/X86/linux-preemption.ll
The file was modifiedllvm/test/CodeGen/AArch64/emutls.ll
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/AArch64/machine-outliner-retaddr-sign-sp-mod.ll
Commit 2ec954579a65b8adf9ec6fb99df40ad0c78a6ce1 by huihuiz
Revert "[ARM] Fix data race on RegisterBank initialization."
There looks to be buildbot failure related.
This reverts commit 91618d940ea3009d7e1489df4c8ca12017a0f612.
The file was modifiedllvm/lib/Target/ARM/ARMRegisterBankInfo.cpp
Commit af620fc36a2c7f60a88236a573326b6f1ffa1d79 by huihuiz
Revert "[AMDGPU] Fix data race on RegisterBank initialization."
There looks to be buildbot failure related.
This reverts commit 8bb6c8a22af845618cfd6c27853dca1b48d30ce0.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit 8f6761aa41251e0e86273df30d84c6fcb29bc4df by huihuiz
Revert "[AArch64] Fix data race on RegisterBank initialization."
Buildbot failure, revert first while looking at the issue.
This reverts commit a5a4a47d691459afffc552bd3be7abfc86a49793.
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
Commit cd68f4beaa2459c0faa6fad128b116ffa442900b by thakis
attempt to fix symbolize-paths.s on windows
The file was modifiedllvm/test/DebugInfo/symbolize-paths.s
Commit b998d481daf211b77494c74637aeabbf8b56ccfc by thakis
attempt to fix symbolize-paths.s everywhere after cd68f4
The file was modifiedllvm/test/DebugInfo/symbolize-paths.s
Commit 0da937bb5c2bf60a539515975c72a06e59d10c4b by Amara Emerson
[GlobalISel][IRTranslator] Follow convention and put constant offset of
getelementptr arithmetic on RHS.
We were needlessly putting known constant values on the LHS of a G_MUL,
which is suboptimal.
Differential Revision: https://reviews.llvm.org/D73650
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/ptr-add.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-getelementptr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-switch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator-gep.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
The file was modifiedllvm/test/CodeGen/X86/GlobalISel/add-ext.ll
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/translate-gep.ll
Commit 5171587a5f50aecb43e6241c3dbc36f2cf615749 by nikita.ppv
[InstCombine] Add undef/non-splat tests for add/sub + icmp eq; NFC
The file was modifiedllvm/test/Transforms/InstCombine/icmp-sub.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-add.ll
Commit e086e23024e4fb202628e988f691c158eebf095c by nikita.ppv
[InstCombine] Support non-splat vectors in icmp eq + add/sub fold
For the
    icmp eq (add X, C1), C2 => icmp eq X, C2-C1
   icmp eq (sub C1, X), C2 => icmp eq X, C1-C2
folds, this allows C1 to be non-splat and contain undefs. C2 is still
splat, due to the structure of the code.
This is to address the remaining part of the regression in D73411, where
demanded element analysis replaces some elements with undef.
Differential Revision: https://reviews.llvm.org/D73647
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/test/Transforms/InstCombine/icmp-add.ll
The file was modifiedllvm/test/Transforms/InstCombine/icmp-sub.ll
Commit fa44d72b9e433c6c8d696f08bf138284f91b6958 by smeenai
[build] Fix runtimes build after 2e745ba6b0ba
I missed the NOT in the condition; this part is actually responsible for
passing LLVM_ENABLE_RUNTIMES to the per-target runtime configures, which
in turn makes them actually build.
I'll put up a more general solution for review, but restore this in the
meantime to fix the runtimes build.
The file was modifiedllvm/runtimes/CMakeLists.txt
Commit c64b56617da293685d6467bd38ad000f8c4fd75e by saugustine
Print discriminators when printing .debug_line in GNU style.
Summary: gnu addr2line prints DWARF line table discriminators like so:
<file>:<line> (discriminator <Number>)
This matches that behavior.
Document how and when --output-style=GNU prints discriminators
Add test for new GNU-style discriminator printing.
Reviewers: rupprecht, labath, jhenderson
Subscribers: aprantl, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73318
The file was modifiedllvm/docs/CommandGuide/llvm-symbolizer.rst
The file was addedllvm/test/tools/llvm-symbolizer/discriminator.test
The file was modifiedllvm/lib/DebugInfo/Symbolize/DIPrinter.cpp
Commit 9accbd58fb3f1dc824a7e43aef5c14b60b7dcefb by silvasean
Add IntegerAttr::verifyConstructionInvariants.
Summary: This will help catch improper use of the MLIR API's. In
particular, this catches an error that was manifesting as
nondeterministic assertion failures (the nondeterminism was due to the
failure happening only when the StorageUniquer's DenseMap's probing
happened to compare two specific keys).
No test. The fact that all the existing tests pass with this additional
invariant gives confidence that it is correct/useful.
Differential Revision: https://reviews.llvm.org/D73645
The file was modifiedmlir/include/mlir/IR/Attributes.h
The file was modifiedmlir/lib/IR/Attributes.cpp
Commit d3cea95475756e1d08cdfe40dd8df8bc4b4eec22 by Matthew.Arsenault
AMDGPU/GlobalISel: Fix tests in release build
Irritatingly the failure output is different in release vs. debug
because of the legality check is removed without asserts, so a register
ends up constrained only in release builds.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-global.s96.mir
Commit 7db4f2c6945a24a7d81dad3362700353e2ec369e by martin
[libcxx] [Windows] Store the lconv struct returned from localeconv in
locale_t
This fixes using non-default locales, which currently can crash when
e.g. formatting numbers.
Within the localeconv_l function, the per-thread locale is temporarily
changed with __libcpp_locale_guard, then localeconv() is called,
returning an lconv * struct pointer.
When localeconv_l returns, the __libcpp_locale_guard dtor restores the
per-thread locale back to the original. This invalidates the contents of
the earlier returned lconv struct, and all C strings that are pointed to
within it are also invalidated.
Thus, to have an actually working localeconv_l function, the function
needs to allocate some sort of storage for the returned contents, that
stays valid for as long as the caller needs to use the returned struct.
Extend the libcxx/win32 specific locale_t class with storage for a deep
copy of a lconv struct, and change localeconv_l to take a reference to
the locale_t, to allow it to store the returned lconv struct there.
This works fine for libcxx itself, but wouldn't necessarily be right for
a caller that uses libcxx's localeconv_l function.
This fixes around 11 of libcxx's currently failing tests on windows.
Differential Revision: https://reviews.llvm.org/D69505
The file was modifiedlibcxx/include/support/win32/locale_win32.h
The file was modifiedlibcxx/src/support/win32/locale_win32.cpp
Commit 89195638bf9c2a27f10f88e3c783236c25d67b3a by spatel
[InstCombine] add splat binop tests; NFC
The file was modifiedllvm/test/Transforms/InstCombine/vec_shuffle.ll
Commit c2b7e4e88a1a19b2a51f120716118aad130f4279 by benny.kra
Rewrite test not to rely on StrEq with StringRef
StrEq has some magic inside that should do the explicit conversion from
StringRef to std::string, but apparently this doesn't work with GCC 5.
Just use EXPECT_EQ, it does the same thing with less magic.
The file was modifiedmlir/unittests/TableGen/EnumsGenTest.cpp
Commit 1492b70a03d51e63c474598fc4a4fee79a24d3ae by wei.huang
[PowerPC][Future] Add prefixed loads and stores for future CPU
A previous patch should have added pld and pstd and any support code in
the backend that is required for prefixed load and store type
operations. This patch adds a number of additional prefixed load and
store type instructions for the future CPU.
Differential Revision: https://reviews.llvm.org/D72577
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/test/MC/Disassembler/PowerPC/future-invalid.txt
The file was modifiedllvm/test/MC/Disassembler/PowerPC/futureinsts.txt
The file was modifiedllvm/test/MC/PowerPC/future-errors.s
The file was modifiedllvm/test/MC/PowerPC/future.s
Commit 00c2249910a17eee9c5a23bc82f2d2f5e1b6c867 by mcinally
[NFCI][AArch64][SVE] Set default DestructiveInstType in AArch64Inst
class
Some housekeeping for the DestructiveInstType enum before a larger set
of patches to support prefixing destructive oeprations with MOVPRFX.
Differential Revision: https://reviews.llvm.org/D73141
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
Commit 24962ced814123195be1a8cb41b615f255da824f by yamauchi
[Loads] Handle simple cases with same base pointer with constant offsets
in FindAvailableLoadedValue when AA is null.
Summary: This will help with devirtualization (store forwarding with
vtable pointers in the presence of other stores into members in the
constructor.) During inlining, we don't have AA.
Reviewers: davidxl
Subscribers: mgorny, Prazek, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71307
The file was addedllvm/unittests/Analysis/LoadsTest.cpp
The file was modifiedllvm/unittests/Analysis/CMakeLists.txt
The file was modifiedllvm/lib/Analysis/Loads.cpp
Commit 363289b542d170e761b385ffad6bfbd0bf5da498 by llvmgnsyncbot
[gn build] Port 24962ced814
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/Analysis/BUILD.gn
Commit 050cd443ca7c9dc9da9d2dcdfb4070bee7185c4e by Jessica Paquette
[AArch64][GlobalISel] Fix TBNZ/TBZ opcode selection
When the bit is <= 32, we have to use the W register variant for TB(N)Z.
This is because of the way the instruction is encoded.
Differential Revision: https://reviews.llvm.org/D73660
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/opt-and-tbnz-tbz.mir
Commit 5ea83eef4d6c70d49cd32474be3f0a1b2e81a901 by dschuff
Revert "[llvm-objcopy] Initial support for wasm in llvm-objcopy"
This reverts commit a928d127a52a061733d2e42c4c9159a267f7dbd4.
It seems to cause issues with big-endian architectures.
The file was modifiedllvm/tools/llvm-objcopy/llvm-objcopy.cpp
The file was removedllvm/tools/llvm-objcopy/wasm/Reader.h
The file was removedllvm/tools/llvm-objcopy/wasm/Object.h
The file was removedllvm/tools/llvm-objcopy/wasm/WasmObjcopy.h
The file was removedllvm/test/tools/llvm-objcopy/wasm/basic-archive-copy.test
The file was removedllvm/test/tools/llvm-objcopy/wasm/basic-copy.test
The file was modifiedllvm/tools/llvm-objcopy/CMakeLists.txt
The file was removedllvm/tools/llvm-objcopy/wasm/WasmObjcopy.cpp
The file was removedllvm/tools/llvm-objcopy/wasm/Reader.cpp
The file was removedllvm/tools/llvm-objcopy/wasm/Writer.h
The file was modifiedllvm/include/llvm/Object/Wasm.h
The file was removedllvm/tools/llvm-objcopy/wasm/Writer.cpp
Commit a111ffbb03f7a9e61bfb2dc29689234887e30014 by stilis
[lldb] Fix build break in ProcessDebugger due to StringRef usage changes
The file was modifiedlldb/source/Plugins/Process/Windows/Common/ProcessDebugger.cpp
Commit e8e6e13176ebdfea7c3bdb00c57976e53d0b0f27 by llvmgnsyncbot
[gn build] Port 5ea83eef4d6
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
Commit b9826408e4f6634b3777f08b44fc69610cb22583 by sivachandra
[libc] Fix build after 777180a32b61070a10dd330b4f038bf24e916af1.
Implicit conversion from llvm::StringRef to std::string was made
explicit in the above commit.
The file was modifiedlibc/utils/HdrGen/PublicAPICommand.cpp
The file was modifiedlibc/utils/HdrGen/Generator.cpp
The file was modifiedlibc/utils/HdrGen/Main.cpp
Commit c12f046eb96f8462b3fd3889344ba344de5ace1f by Amara Emerson
[GlobalISel] Add new combine to convert scalar G_MUL to G_SHL.
For pow2 constants we should use G_SHL for pattern matching (and perf)
purposes later.
Vector support not yet implemented.
Differential Revision: https://reviews.llvm.org/D73659
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/combine-mul-to-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-relocs.ll
Commit 0423ddfb817a982e8e1055f94698af1f336686f5 by smeenai
[build] Fix LLVM_ENABLE_RUNTIMES override condition
I forgot to add parentheses in fa44d72b9e43, though I prefer the
expanded form anyway.
The file was modifiedllvm/runtimes/CMakeLists.txt
Commit 4f2e2acc4b2d175037d438f4c6c172b948579777 by mcinally
[NFC][AArch64][SVE] Rename Destructive enumerator from
DestructiveInstType
Rename Destructive enumerator in preparation for a larger set of patches
to support prefixing destructive oeprations with MOVPRFX.
Differential Revision: https://reviews.llvm.org/D73212
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
Commit c6bc10636cf3c48c947a4759d2e9648639cdfa71 by sivachandra
[libc] Add a library of standalone C++ utilities.
Some of the existing utils in utils/UnitTest/Test.h have been moved to
this new library.
Reviewers: abrachet, gchatelet
Tags: #libc-project
Differential Revision: https://reviews.llvm.org/D73530
The file was modifiedlibc/cmake/modules/LLVMLibCRules.cmake
The file was modifiedlibc/utils/UnitTest/Test.cpp
The file was modifiedlibc/utils/UnitTest/Test.h
The file was addedlibc/utils/CPP/ArrayRef.h
The file was addedlibc/utils/CPP/CMakeLists.txt
The file was addedlibc/utils/CPP/StringRef.h
The file was addedlibc/utils/CPP/TypeTraits.h
The file was modifiedlibc/utils/CMakeLists.txt
The file was addedlibc/utils/CPP/README.md
The file was modifiedlibc/utils/UnitTest/CMakeLists.txt
The file was modifiedlibc/CMakeLists.txt
The file was addedlibc/utils/CPP/Array.h
Commit d88a5c398776ed6e4b36b58b79c1b4b56f413f35 by Jonas Devlieghere
[SmallString] Remove StringRef indirection for std::string conversion.
There's no need to go through StringRef to convert a SmallString to a
std::string, the conversion operator can create a std::string directly.
Differential revision: https://reviews.llvm.org/D73640
The file was modifiedllvm/include/llvm/ADT/SmallString.h
Commit 6cb830de6e4f963f2e5e5f0aba23b2af3341e776 by kostyak
[scudo][standalone] Revert some perf-degrading changes
Summary: A couple of seemingly innocuous changes ended up having a large
impact on the 32-bit performance. I still have to make those
configurable at some point, but right now it will have to do.
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73658
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
Commit 91aa67bf290bc7f877b1b90128284863bc31aa43 by Jonas Devlieghere
[lldb/Reproducers] Add (de)serialization overload for char**
This patch adds an overload to serialize and deserialize char** types.
This is necessary for things like the SBLaunchInfo ctor. We serialize
the array length followed by each individual item.
The file was modifiedlldb/include/lldb/Utility/ReproducerInstrumentation.h
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
Commit 43d9f2d1e8ae2765c1fc02b7cf757c9c05761ac0 by Yuanfang Chen
[opt viewer] Python compat - decode/encode string
Summary: Use io.open instead of codecs.open according to here
https://stackoverflow.com/questions/10971033/backporting-python-3-openencoding-utf-8-to-python-2
Add `u` prefix to string literal to make them utf-8 in python2.
Reviewers: anemet, serge-sans-paille
Reviewed by: serge-sans-paille
Differential Revision: https://reviews.llvm.org/D73011
The file was modifiedllvm/tools/opt-viewer/opt-viewer.py
The file was modifiedllvm/tools/opt-viewer/optrecord.py
Commit 7f3280ecddbe574d8693b45fa0851e828db22636 by arsenm2
AMDGPU/GlobalISel: Select permlane16/permlanex16
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.permlane.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.permlane.ll
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SMInstructions.td
Commit 29181e5426219ee16b709d1d22b7295f9816ce40 by Yuanfang Chen
[compiler-rt][profile] fix test/instrprof-set-filename.c on windows
Summary: `.cmd` is interpreted as script in windows console.
Reviewers: davidxl, rnk
Reviewed By: davidxl
Differential Revision: https://reviews.llvm.org/D73327
The file was modifiedcompiler-rt/test/profile/instrprof-set-filename.c
Commit c5fffa4da35f0fcc89b5ea88cc1bc60bc475a18e by arsenm2
GlobalISel: Add observer argument to legalizeIntrinsic
This is passed to legalizeCustom, but not intrinsic. Also remove the MRI
argument, since you can get that from the MachineIRBuilder.
I'm not sure why MachineIRBuilder has a private observer member, and
this is passed separately.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.h
The file was modifiedllvm/lib/Target/Mips/MipsLegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64LegalizerInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was modifiedllvm/lib/Target/X86/X86LegalizerInfo.h
The file was modifiedllvm/lib/Target/X86/X86LegalizerInfo.cpp
Commit 228ea1a46cc82aed60b1b3c8263bed60c4d48f05 by ajcbik
[mlir] [VectorOps] consolidate all vector utilities to one header/cc
file
Reviewers: nicolasvasilache, andydavis1, dcaballe
Reviewed By: andydavis1, dcaballe
Subscribers: dcaballe, merge_guards_bot, mgorny, mehdi_amini, rriddle,
jpienaar, burmako, shauheen, antiagainst, arpith-jacob, mgester,
lucyrfox, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73593
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/VectorTransforms.cpp
The file was modifiedmlir/lib/Dialect/VectorOps/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorUtils.h
The file was addedmlir/lib/Dialect/VectorOps/VectorUtils.cpp
The file was removedmlir/lib/Analysis/VectorAnalysis.cpp
The file was modifiedmlir/lib/Analysis/CMakeLists.txt
Commit 35625464c6ddef557c2369946681be5cfb42d5c1 by craig.topper
[X86] Fix the cost model for v16i16->v16i32 zero_extend/sign_extend with
AVX2
We seem to be inheriting the cost from sse4.1. But if we have 256-bit
registers we should be able to do this with just one extract to split
the 16i16 and two v8i16->v8i32 operations so our cost should be 3 not 4.
Differential Revision: https://reviews.llvm.org/D73646
The file was modifiedllvm/test/Analysis/CostModel/X86/cast.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/extend.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/min-legal-vector-width.ll
The file was modifiedllvm/lib/Target/X86/X86TargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-overflow.ll
The file was modifiedllvm/test/Analysis/CostModel/X86/arith-fix.ll
Commit a10cec02f79082a1da571e44e68800025b7e6554 by craig.topper
[X86] Improve X86 cmpps/cmppd/cmpss/cmpsd intrinsics with strictfp
The constrained fcmp intrinsics don't allow the TRUE/FALSE predicates.
Using them will assert. To workaround this I'm emitting the old X86
specific intrinsics that were never removed from the backend when we
switched to using fcmp in IR. We have no way to mark them as being
strict, but that's true of all target specific intrinsics so doesn't
seem like we need to solve that here.
I've also added support for selecting between signaling and quiet.
Still need to support SAE which will require using a target specific
intrinsic. Also need to fix masking to not use an AND instruction after
the compare.
Differential Revision: https://reviews.llvm.org/D72906
The file was addedclang/test/CodeGen/avx512f-builtins-constrained-cmp.c
The file was addedclang/test/CodeGen/sse-builtins-constrained-cmp.c
The file was addedclang/test/CodeGen/avx-builtins-constrained-cmp.c
The file was addedclang/test/CodeGen/avx512vl-builtins-constrained-cmp.c
The file was addedclang/test/CodeGen/sse2-builtins-constrained-cmp.c
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp
Commit 31ae0165c3519cc27989b3e4bd71845593e08cfe by xazax
[LTO] Add optimization remarks for removed functions
This only works with regular LTO for now.
Differential Revision: https://reviews.llvm.org/D73597
The file was modifiedllvm/lib/LTO/LTO.cpp
The file was modifiedllvm/test/LTO/Resolution/X86/dead-strip-fulllto.ll
The file was modifiedllvm/lib/IR/DiagnosticInfo.cpp
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedllvm/include/llvm/LTO/LTOBackend.h
Commit 442d8e7a91c8f8841a22dcbee596b156fca2111d by thakis
[gn build] add a FIXME about using /Gw on win
The file was modifiedllvm/utils/gn/build/BUILD.gn
Commit 446e4e4cf6d1126b4dc2fe816d4bb01b184b2e64 by Jonas Devlieghere
[lldb/Reproducers] Account for char** being a nullptr
The file was modifiedlldb/include/lldb/Utility/ReproducerInstrumentation.h
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
Commit 91f863be4f04337da19c26c4fbda4ce10bfc0668 by Jonas Devlieghere
[lldb/Reproducers] Add unittest for char** (de)serializer
The file was modifiedlldb/unittests/Utility/ReproducerInstrumentationTest.cpp
Commit 791c9f1145f89d0ad8daddcc2207a8cdacbadaa0 by johannes
[Attributor] Fix TODO to avoid recomputation of results
The helpers AAReturnedFromReturnedValues and
AACallSiteReturnedFromReturned are useful not only to avoid code
duplication but also to avoid recomputation of results. If we have N
call sites we should not recompute the function return information N
times but once. These are mostly straightforward usages with some minor
improvements on the helpers and addition of a new one
(IRPosition::getAssociatedType) that knows about function return types.
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
Commit 93cdd310e16ec57efd4a93886dd3b71ea4cf8183 by Louis Dionne
[libc++] Explicitly specify LIBCXX_ENABLE_SHARED to try and fix CI
Configuring libc++abi with LIBCXX_ENABLE_STATIC=OFF is broken since
https://reviews.llvm.org/D71894, so this patch fixes the issue for Apple
platforms to unblock our CI.
The file was modifiedlibcxx/cmake/caches/Apple.cmake
Commit f2af0607000cb18bf9292457ea247bb6602b4cdb by dschuff
[llvm-objcopy] Initial support for wasm in llvm-objcopy
Currently only supports simple copying, other operations to follow.
Reviewers: sbc100, alexshap, jhenderson
Differential Revision: https://reviews.llvm.org/D70930
This is a reland of a928d127a with a one-line fix to ensure that the
wasm version number is written as little-endian (it's the only field in
all of the binary format that's not a single byte or an LEB, but we may
have to watch out more when we start handling the linking section).
The file was modifiedllvm/tools/llvm-objcopy/CMakeLists.txt
The file was addedllvm/tools/llvm-objcopy/wasm/Writer.h
The file was addedllvm/tools/llvm-objcopy/wasm/Object.h
The file was modifiedllvm/tools/llvm-objcopy/llvm-objcopy.cpp
The file was addedllvm/tools/llvm-objcopy/wasm/WasmObjcopy.h
The file was addedllvm/tools/llvm-objcopy/wasm/Writer.cpp
The file was addedllvm/tools/llvm-objcopy/wasm/Reader.cpp
The file was addedllvm/tools/llvm-objcopy/wasm/Reader.h
The file was modifiedllvm/include/llvm/Object/Wasm.h
The file was addedllvm/test/tools/llvm-objcopy/wasm/basic-archive-copy.test
The file was addedllvm/tools/llvm-objcopy/wasm/WasmObjcopy.cpp
The file was addedllvm/test/tools/llvm-objcopy/wasm/basic-copy.test
Commit f0654875fb240ed9d4b2718cfa5f5c7f9d9daef3 by llvmgnsyncbot
[gn build] Port f2af0607000
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-objcopy/BUILD.gn
Commit 89c2e733e80ee35921ad4aff8058c3ff9d933c54 by johannes
[Attributor] Pointer privatization attribute (argument promotion)
A pointer is privatizeable if it can be replaced by a new, private one.
Privatizing pointer reduces the use count, interaction between unrelated
code parts. This is a first step towards replacing argument promotion.
While we can already handle recursion (unlike argument promotion!) we
are restricted to stack allocations for now because we do not analyze
the uses in the callee.
Reviewed By: uenoku
Differential Revision: https://reviews.llvm.org/D68852
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/byval.ll
The file was modifiedllvm/test/Transforms/Attributor/IPConstantProp/PR16052.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/byval-2.ll
The file was modifiedllvm/include/llvm/Transforms/IPO/ArgumentPromotion.h
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/attrs.ll
The file was addedllvm/test/Transforms/Attributor/ArgumentPromotion/alignment.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/control-flow2.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/fp80.ll
The file was modifiedllvm/lib/Transforms/IPO/ArgumentPromotion.cpp
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/inalloca.ll
The file was modifiedllvm/test/Transforms/Attributor/IPConstantProp/2009-09-24-byval-ptr.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/profile.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/2008-02-01-ReturnAttrs.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/tail.ll
The file was modifiedllvm/test/Transforms/Attributor/internal-noalias.ll
The file was modifiedllvm/test/Transforms/Attributor/callbacks.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/basictest.ll
Commit 7f49dc496682e38335b204bbae371a0ca5057719 by phosek
[CMake][libcxx] Don't wrap __config_site path in quotes on Windows
This is failing to compile on Windows because clang-cl is trying to use
the path with quotes, dropping them resolves the issue.
Differential Revision: https://reviews.llvm.org/D73525
The file was modifiedlibcxx/CMakeLists.txt
Commit fa14522c219f500e46751d51f6219e2b9523d7bf by francesco.petrogalli
[llvm][docs] Fix formatting in LangRef. [NFC]
The syntax of the call site attribute "vector-function-abi-variant" is
rendered with fixed size fonts (verbatim text).
The file was modifiedllvm/docs/LangRef.rst
Commit 14a16fae434a86890546e5e0364086e231e7667e by mtrofin
[llvm][NFC] Rename CallAnalyzer::onCommonInstructionSimplification
Summary: It is called when instructions aren't simplified, and the
implementation is expected to account for a penalty. Renamed to
onCommonInstructionMissedSimplification.
Reviewers: davidxl, eraman
Reviewed By: davidxl
Subscribers: hiraditya, baloghadamsoftware, haicheng, a.sidorin,
Szelethus, donat.nagy, dkrupp, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73662
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
Commit b2924d9956fd9a8ebe09145ff102b12d34c5edf2 by Jonas Devlieghere
[llvm] Replace SmallStr.str().str() with std::string conversion
operator.
Use the std::string conversion operator introduced in
d7049213d0fcda691c9e79f9b41e357198d99738.
The file was modifiedllvm/tools/sancov/sancov.cpp
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedllvm/unittests/ADT/APIntTest.cpp
The file was modifiedllvm/lib/Support/YAMLParser.cpp
The file was modifiedllvm/lib/ToolDrivers/llvm-lib/LibDriver.cpp
The file was modifiedllvm/tools/dsymutil/SymbolMap.cpp
The file was modifiedllvm/unittests/Support/FileUtilitiesTest.cpp
The file was modifiedllvm/lib/ProfileData/GCOV.cpp
The file was modifiedllvm/unittests/Support/VirtualFileSystemTest.cpp
Commit 509e21a1b9debc7fcbfb3eaf56a5dcf57de55e0e by Jonas Devlieghere
[clang] Replace SmallStr.str().str() with std::string conversion
operator.
Use the std::string conversion operator introduced in
d7049213d0fcda691c9e79f9b41e357198d99738.
The file was modifiedclang/lib/CrossTU/CrossTranslationUnit.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SarifDiagnostics.cpp
The file was modifiedclang/lib/Driver/Driver.cpp
The file was modifiedclang/unittests/Frontend/FrontendActionTest.cpp
The file was modifiedclang/unittests/Driver/SanitizerArgsTest.cpp
The file was modifiedclang/lib/CodeGen/CoverageMappingGen.cpp
The file was modifiedclang/lib/Lex/HeaderSearch.cpp
The file was modifiedclang/tools/clang-refactor/TestSupport.cpp
The file was modifiedclang/lib/AST/Expr.cpp
Commit 3e24242a7dc99ef04676cc7e227bd3652e80c975 by Jonas Devlieghere
[lld] Replace SmallStr.str().str() with std::string conversion operator.
Use the std::string conversion operator introduced in
d7049213d0fcda691c9e79f9b41e357198d99738.
The file was modifiedlld/MinGW/Driver.cpp
The file was modifiedlld/COFF/Driver.cpp
The file was modifiedlld/ELF/DriverUtils.cpp
The file was modifiedlld/wasm/Driver.cpp
Commit 1ef8e8b41429a1c2440ddbbcb1fc19ba1e8fcc57 by craig.topper
[X86] Don't exit from foldOffsetIntoAddress if the Offset is 0, but
AM.Disp is non-zero.
This is an alternate fix for the issue D73606 was trying to solve.
The main issue here is that we bailed out of foldOffsetIntoAddress if
Offset is 0. But if we just found a symbolic displacement and AM.Disp
became non-zero earlier, we still need to validate that AM.Disp with the
symbolic displacement.
This passes fold-add-pcrel.ll.
Differential Revision: https://reviews.llvm.org/D73608
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit e28d8f9069b92f5c20416c575f49727daf5adb1a by Jonas Devlieghere
[lldb] Replace SmallStr.str().str() with std::string conversion
operator.
Use the std::string conversion operator introduced in
d7049213d0fcda691c9e79f9b41e357198d99738. The SmallString in the log
statement doesn't require conversion at all when using the variadic log
macro.
The file was modifiedlldb/unittests/Expression/CppModuleConfigurationTest.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangHost.cpp
Commit 056f01f895615686e63b9729096f7eb98b47223f by Jonas Devlieghere
[lldb/Reproducers] Assert when trying to get object for invalid index.
Assert when trying to get an object for an index we haven't seen before.
This will crash anyway, the assertion is just a bit more informative.
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
Commit 12c185ac5e5c396018c60565eff50187bace7011 by Jonas Devlieghere
[lldb/Reproducers] Fix reproducer instrumentation formatting (NFC)
The file was modifiedlldb/include/lldb/Utility/ReproducerInstrumentation.h
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
Commit 623cff81fef3cc6fb7c619fb7366803864f63dc6 by francesco.petrogalli
[llvm][VectorUtils] Tweak VFShape for scalable vector functions.
Summary: This patch makes sure that the field VFShape.VF is greater than
zero when demangling the vector function name of scalable vector
functions encoded in the "vector-function-abi-variant" attribute.
This change is required to be able to provide instances of VFShape that
can be used to query the VFDatabase for the vectorization passes, as
such passes always require a positive value for the Vectorization Factor
(VF) needed by the vectorization process.
It is not possible to extract the value of VFShape.VF from the mangled
name of scalable vector functions, because it is encoded as
`x`. Therefore, the VFABI demangling function has been modified to
extract such information from the IR declaration of the vector function,
under the assumption that _all_ vectors in the signature of the vector
function have the same number of lanes. Such assumption is valid because
it is also assumed by the Vector Function ABI specifications supported
by the demangling function (x86, AArch64, and LLVM internal one).
The unit tests that demangle scalable names have been modified by adding
the IR module that carries the declaration of the vector function name
being demangled.
In particular, the demangling function fails in the following cases:
1. When the declaration of the scalable vector function is not
   present in the module.
2. When the value of VFSHape.VF is not greater than 0.
Reviewers: jdoerfert, sdesmalen, andwar
Reviewed By: jdoerfert
Subscribers: mgorny, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73286
The file was modifiedllvm/tools/vfabi-demangle-fuzzer/vfabi-demangler-fuzzer.cpp
The file was modifiedllvm/lib/Analysis/VectorUtils.cpp
The file was modifiedllvm/lib/Transforms/Utils/ModuleUtils.cpp
The file was modifiedllvm/unittests/Analysis/VectorFunctionABITest.cpp
The file was modifiedllvm/tools/vfabi-demangle-fuzzer/CMakeLists.txt
The file was modifiedllvm/lib/Analysis/VFABIDemangling.cpp
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
Commit 0e67212416f6f27b9a6270a73cf95e71cabef524 by Jonas Devlieghere
Revert "[lldb/Reproducers] Assert when trying to get object for invalid
index."
Apparently this is not doing what I thought it was doing...
The file was modifiedlldb/source/Utility/ReproducerInstrumentation.cpp
Commit eb054577e9dd18dc99cc757307c1218b8e321a43 by shengchen.kan
[X86] Add function isPrefix()
Currently some prefixes are emitted as instructions, to distinguish them
from real instruction, fuction isPrefix() is added. The kinds of prefix
are consistent with X86GenInstrInfo.inc.
Differential Revision: https://reviews.llvm.org/D73013
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h
Commit 635fbcdd1bd01d6b5ba17b342e8834ff30e7e36d by uabelho
Even more fixes of implicit std::string conversions
The file was modifiedclang-tools-extra/clangd/unittests/IndexActionTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/ClangdTests.cpp
Commit 007a6a155c7ecaebb26fec9e18303b7419c7bffe by craig.topper
Revert "[X86] Don't exit from foldOffsetIntoAddress if the Offset is 0,
but AM.Disp is non-zero."
Possibly causing build bot failures.
The file was modifiedllvm/lib/Target/X86/X86ISelDAGToDAG.cpp
Commit 5e416ba943b7c737deb8eca62756f7b4fa925845 by dimitry
Define _LIBCPP_HAS_TIMESPEC_GET for FreeBSD when appropriate
Summary: FreeBSD got `timespec_get` support somewhere in the 12.x
timeframe, but the C++ version check in its system headers was written
incorrectly. This has now been fixed for both FreeBSD 13 and 12.
Add checks for the corresponding `__FreeBSD_version` values, to define
`_LIBCPP_HAS_TIMESPEC_GET` when the function is supported.
Reviewers: emaste, EricWF, ldionne, mclow.lists
Reviewed By: ldionne
Subscribers: arichardson, krytarowski, christof, dexonsmith,
libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D71522
The file was modifiedlibcxx/include/__config
Commit 610f1d22f149790bebc6bee9e3d5f3b4c07b84ec by Amara Emerson
[AArch64][GlobalISel] During ISel try to convert G_PTR_ADD to G_ADD.
This lowering tries to look for G_PTR_ADD instructions and then converts
them to a standard G_ADD with a COPY on the source, and G_INTTOPTR on
the result. This is ok for address space 0 on AArch64 as p0 can be
treated as s64.
The motivation behind this is to expose the add semantics to the
imported tablegen patterns. We shouldn't need to check for uses being
loads/stores, because the selector works bottom up, uses before defs. By
the time we end up trying to select a G_PTR_ADD, we should have already
attempted to fold this into addressing modes and were therefore
unsuccessful.
This gives some performance and code size improvements across the board.
Differential Revision: https://reviews.llvm.org/D73673
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/load-addressing-modes.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
Commit 6b9e2be8ec322b631a91dca3c503b0850cdc0970 by riddleriver
[mlir][NFC] Explicitly initialize dynamic legality when setting op
action.
The file was modifiedmlir/lib/Transforms/DialectConversion.cpp
Commit a03ec58da60c044dc3be7cbb0fcd7912769b05ef by csigg
Add GDB pretty printers for llvm::ilist, llvm::simple_ilist, and
llvm::ilist_node.
Reviewers: dblaikie
Reviewed By: dblaikie
Subscribers: merge_guards_bot, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72589
The file was modifiedllvm/utils/gdb-scripts/prettyprinters.py
The file was modifieddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.cpp
The file was modifieddebuginfo-tests/llvm-prettyprinters/gdb/prettyprinters.gdb
Commit 80581966771a6d705daddbbf640a91c94652ceb5 by nikita.ppv
[InstCombine] Process newly inserted instructions in the correct order
InstCombine operates on the basic premise that the operands of the
currently processed instruction have already been simplified. It
achieves this by pushing instructions to the worklist in reverse program
order, so that instructions are popped off in program order. The
worklist management in the main combining loop also makes sure to uphold
this invariant.
However, the same is not true for all the code that is performing manual
worklist management. The largest problem (addressed in this patch) are
instructions inserted by InstCombine's IRBuilder. These will be pushed
onto the worklist in order of insertion (generally matching program
order), which means that a) the users of the original instruction will
be visited first, as they are pushed later in the main loop and b) the
newly inserted instructions will be visited in reverse program order.
This causes a number of problems: First, folds operate on instructions
that have not had their operands simplified, which may result in
optimizations being missed (ran into this in
https://reviews.llvm.org/D72048#1800424, which was the original
motivation for this patch). Additionally, this increases the amount of
folds InstCombine has to perform, both within one iteration, and by
increasing the number of total iterations.
This patch addresses the issue by adding a Worklist.AddDeferred()
method, which is used for instructions inserted by IRBuilder. These will
only be added to the real worklist after the combine finished, and in
reverse order, so they will end up processed in program order. I should
note that the same should also be done to nearly all other uses of
Worklist.Add(), but I'm starting with just this occurrence, which has by
far the largest test fallout.
Most of the test changes are due to
https://bugs.llvm.org/show_bug.cgi?id=44521 or other cases where we
don't canonicalize something. These are neutral. One regression has been
addressed in D73575 and D73647. The remaining regression in an shl+sdiv
fold can't really be fixed without dropping another transform, but does
not seem particularly problematic in the first place.
Differential Revision: https://reviews.llvm.org/D73411
The file was modifiedllvm/test/Transforms/InstCombine/pr38915.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub-ashr-and-to-icmp-select.ll
The file was modifiedllvm/test/Transforms/InstCombine/or.ll
The file was modifiedllvm/test/Transforms/InstCombine/xor.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub-gep.ll
The file was modifiedllvm/test/Transforms/InstCombine/vec_sext.ll
The file was modifiedllvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-negative-and-positive-thresholds.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-cmp-br.ll
The file was modifiedllvm/include/llvm/Transforms/InstCombine/InstCombineWorklist.h
The file was modifiedllvm/test/Transforms/InstCombine/demorgan.ll
The file was modifiedllvm/test/Transforms/InstCombine/getelementptr.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub-ashr-or-to-icmp-select.ll
The file was modifiedllvm/test/Transforms/InstCombine/select-pr39595.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/InstCombine/load.ll
The file was modifiedllvm/test/Transforms/InstCombine/logical-select.ll
The file was modifiedllvm/test/Transforms/InstCombine/canonicalize-clamp-like-pattern-between-zero-and-positive-threshold.ll
The file was modifiedllvm/test/Transforms/InstCombine/div.ll
The file was modifiedllvm/test/Transforms/InstCombine/max-of-nots.ll
The file was modifiedllvm/test/Transforms/InstCombine/sub-minmax.ll
The file was modifiedllvm/test/Transforms/InstCombine/pr44245.ll
Commit 61ba477525aeb056fdbf5816f1b69128bf13b600 by nikita.ppv
[InstCombine] Add SetVector.h include
Hopefully fixes the build for examples.
The file was modifiedllvm/include/llvm/Transforms/InstCombine/InstCombineWorklist.h
Commit ef052a7527e744591aa7b8164c26dbde0d598b07 by nikita.ppv
[InstCombine] Update SimplifyCFG test
This test also runs -instcombine. Here the operands in an or chain have
been reassociated.
The file was modifiedllvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll
Commit 6726d67bfd9ede4bbf323d677f3167bd508b8370 by sam.parker
[ARM][LowOverheadLoops] Check scalar predicates
When trying to remove the loop iteration count, check that the
instruction will always execute.
Differential Revision: https://reviews.llvm.org/D73682
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/dont-ignore-vctp.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit c5344d857fd6cc2693f936f9f1eff93ba0262293 by courbet
[X86][Sched] A bunch of fixes to the Zen2 sched model latencies.
Summary: As determined with `llvm-exegesis`.
Some of these look like typos/misunderstandings of the sched model td
spec:
- latency defaults to `1` when not set => Maybe we can avoid
   having a default ?
- problems with regexps not being anchored by default (XCHG matching
   CMPXHG)
Note that this is not complete, it fixes only the most obvious mistakes,
and only for latency (not uops).
Reviewers: RKSimon, GGanesh
Subscribers: hiraditya, jfb, mstojanovic, hfinkel, craig.topper,
andreadb, lebedev.ri, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73172
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-avx1.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-sse2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-sse4a.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-x86_64.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-sse3.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-ssse3.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-sse1.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-sse41.s
The file was modifiedllvm/lib/Target/X86/X86ScheduleZnver2.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Znver2/resources-avx2.s
Commit 676c29694c5444ca3c63067770dfac0f37158797 by gribozavr
Inline debug variable.
Summary: In a release build this variable becomes unused and may break
the build with `-Werror,-Wunused-variable`.
Reviewers: gribozavr2, jdoerfert, sstefan1
Reviewed By: gribozavr2
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73683
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp
Commit 021f531786df4a21c67eb7b238b97a84263e36c7 by james.henderson
[DebugInfo] Fix DebugLine::Prologue::getLength
The function a) returned 32-bits when in DWARF64, the PrologueLength
field is 64-bits in size, and b) didn't work for DWARF version 5.
Also deleted some related dead code. With this deletion, getLength is
itself dead, but another change is about to make use of it.
Reviewed by: probinson
Differential Revision: https://reviews.llvm.org/D73626
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDebugLine.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugLineTest.cpp
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDebugLine.h
Commit dd7148822bdc640f3a21a750e94b1fac0050d065 by Piotr Sobczak
[InstCombine][AMDGPU] Trim components of s_buffer_load
Summary: Add trimming of unused components of s_buffer_load.
For s_buffer_load and unformatted buffer_load also trim unused
components at the beginning of vector and update offset accordingly.
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71785
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
The file was modifiedllvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll
Commit ce06d50756e9f59db50378753a42d03b9c3369c4 by cwabbott0
AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns
Summary: The code was assuming in a few places that if there was only
one exit from the function that it was a normal return, which is
invalid. It could be an infinite loop, in which case we still need to
insert the usual fake edge so that the null export happens. This fixes
shaders that end with an infinite loop that discards.
Reviewers: arsenm, nhaehnle, critson
Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye,
hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D71192
The file was modifiedllvm/test/CodeGen/AMDGPU/update-phi.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUUnifyDivergentExitNodes.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/kill-infinite-loop.ll
Commit a156a0e28df4751f812c84437321339c2eb33af3 by n.james93
[ASTMatchers] Add hasPlacementArg and hasAnyPlacementArg traversal
matcher for CXXNewExpr
Summary: Adds new traversal matchers called `hasPlacementArg` and
`hasAnyPlacementArg` that matches on arguments to `placement new`
operators.
Reviewers: aaron.ballman
Reviewed By: aaron.ballman
Subscribers: merge_guards_bot, mehdi_amini, hiraditya, steven_wu,
dexonsmith, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73562
The file was modifiedclang-tools-extra/clang-tidy/modernize/MakeSmartPtrCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/cert/DefaultOperatorNewAlignmentCheck.cpp
The file was modifiedclang/docs/LibASTMatchersReference.html
The file was modifiedclang/include/clang/ASTMatchers/ASTMatchers.h
The file was modifiedclang/unittests/ASTMatchers/ASTMatchersTraversalTest.cpp
The file was modifiedclang/lib/ASTMatchers/Dynamic/Registry.cpp
Commit 9b71ec899a1554210ec66756681c047a52866d39 by hokein.wu
[clangd][vscode] Get rid of the deprecated vscode module in the
extension.
Summary: The vscode module has been deprecated, and it doesn't work
anymore after we require the minimal VSCode version 1.41.0, this patch
migrate to the new @type/vscode and vscode-test modules, see
https://code.visualstudio.com/api/working-with-extensions/testing-extension#migrating-from-vscode
Reviewers: sammccall
Subscribers: dschuff, ilya-biryukov, MaskRay, jkorous, arphaman,
kadircet, usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73624
The file was modifiedclang-tools-extra/clangd/clients/clangd-vscode/package.json
The file was modifiedclang-tools-extra/clangd/clients/clangd-vscode/package-lock.json
The file was addedclang-tools-extra/clangd/clients/clangd-vscode/test/runTest.ts
The file was modifiedclang-tools-extra/clangd/clients/clangd-vscode/test/index.ts
Commit 2224407ef5baf6100fa22420feb4d25af1a9493f by john.brawn
Add lowering of STRICT_FSETCC and STRICT_FSETCCS
These become STRICT_FCMP and STRICT_FCMPE, which then get selected to
the corresponding FCMP and FCMPE instructions, though the handling from
there on isn't fully correct as we don't model reads and writes to FPCR
and FPSR.
Differential Revision: https://reviews.llvm.org/D73368
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/fp-intrinsics.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit 7fd7a9a6365f8026d84a89ec3e73d328a63742a0 by hokein.wu
[clangd] Bump vscode-clangd v0.0.20
CHANGELOG:
- update lsp dependencies to pickup the latest LSP 3.15
- better support for cu files
The file was modifiedclang-tools-extra/clangd/clients/clangd-vscode/package.json
The file was modifiedclang-tools-extra/clangd/clients/clangd-vscode/package-lock.json
Commit 5f8e51a9d4a36cfd9e8f934a351865680927d10e by grimar
[llvm-readobj] - Add a few warnings for --gnu-hash-table.
The current implementation stops dumping in case of a single error it
handles, though we can continue dumping. This patch refines it: it adds
a few warnings and a few test cases.
Differential revision: https://reviews.llvm.org/D73269
The file was modifiedllvm/test/tools/llvm-readobj/ELF/gnuhash.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit df8a986f533d6b1726e79acfa53ba854943704c3 by Raphael Isemann
[lldb][NFC] Remove TypeSystemClang::GetASTContext calls in IRForTarget
Similar to previous commits, this just replaces the lookup in the global
map with the reference to the TypeSystemClang instance we already have
in this context.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/IRForTarget.cpp
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTSource.h
Commit 4fb1adcde22c06d421598ed1925ee3c7c835abc4 by kadircet
[clangd] Log directory when a CDB is loaded
Summary: Fixes https://github.com/clangd/clangd/issues/268
Reviewers: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, usaxena95,
cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73628
The file was modifiedclang-tools-extra/clangd/GlobalCompilationDatabase.cpp
Commit 2930dab31533feb3f4a4e14f8bcd9457a2388338 by grimar
[llvm-readobj] - Improve error message reported by DynRegionInfo.
DynRegionInfo is a helper class used to create memory ranges. It is used
for many things and can report errors. Errors reported currently do not
provide a good diagnostic. This patch fixes it and adds a test for each
possible case.
Differential revision: https://reviews.llvm.org/D73484
The file was modifiedllvm/test/Object/invalid.test
The file was removedllvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc-name.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/non-dynamic-in-pt-dynamic.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dynamic-not-in-pt-dynamic.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dyn-symbols.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dynamic-malformed.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was addedllvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
Commit 26927518955d7f86de2c877f3ed007c8fbac809c by herhut
Add 'gpu.terminator' operation.
Summary: The 'gpu.terminator' operation is used as the terminator for
the regions of gpu.launch. This is to disambugaute them from the return
operation on 'gpu.func' functions.
This is a breaking change and users of the gpu dialect will need to
adapt their code when producting 'gpu.launch' operations.
Reviewers: nicolasvasilache
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, csigg, arpith-jacob, mgester, lucyrfox, liufengdb,
llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73620
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp
The file was modifiedmlir/test/mlir-cuda-runner/shuffle.mlir
The file was modifiedmlir/test/Dialect/GPU/canonicalize.mlir
The file was modifiedmlir/test/Dialect/GPU/invalid.mlir
The file was modifiedmlir/test/mlir-cuda-runner/gpu-to-cubin.mlir
The file was modifiedmlir/lib/Conversion/LoopsToGPU/LoopsToGPU.cpp
The file was modifiedmlir/test/Dialect/GPU/outlining.mlir
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-region.mlir
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
The file was modifiedmlir/test/Conversion/LoopsToGPU/linalg_to_gpu.mlir
The file was modifiedmlir/test/Conversion/LoopsToGPU/step_one.mlir
The file was modifiedmlir/test/Dialect/GPU/ops.mlir
The file was modifiedmlir/test/mlir-cuda-runner/all-reduce-op.mlir
Commit 827f49e3faf59f99082d0085de06dcbc09be8ba3 by hokein.wu
[clangd] Make go-to-def jumps to overriden methods on `final` specifier.
Reviewers: sammccall
Reviewed By: sammccall
Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, kadircet,
usaxena95, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73690
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp
The file was modifiedclang-tools-extra/clangd/XRefs.cpp
Commit 1649c0098a2f94c25acd4976416d7d35aa2bc7b9 by grimar
[yaml2obj] - Add a way to set sh_entsize for relocation sections.
We are missing ability to override the sh_entsize field for SHT_REL[A]
sections. It would be useful for writing test cases.
Differential revision: https://reviews.llvm.org/D73621
The file was addedllvm/test/tools/yaml2obj/ELF/reloc-sec-entry-size.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
Commit 06e12893ffb34863eb4fc063220a4d83a94f1301 by sam.parker
[ARM][LowOverheadLoops] Skip debug values
While iterating through the loop, don't inspect any dbg values.
Differential Revision: https://reviews.llvm.org/D73688
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/skip-debug.mir
Commit d242aa245ccfaa527d27c75e50f9b73223aec14b by zinenko
[MLIR] Added llvm.invoke and llvm.landingpad
Summary: I have tried to implement `llvm.invoke` and `llvm.landingpad`.
  # `llvm.invoke` is similar to `llvm.call` with two successors added,
the first one is the normal label and the second one is unwind label.
# `llvm.launchpad` takes a variable number of args with either `catch`
or `filter` associated with them. Catch clauses are not array types and
filter clauses are array types. This is same as the criteria used by
LLVM
(https://github.com/llvm/llvm-project/blob/4f82af81a04d711721300f6ca32f402f2ea6faf4/llvm/include/llvm/IR/Instructions.h#L2866)
Examples: LLVM IR
``` define i32 @caller(i32 %a) personality i8* bitcast (i32 (...)*
@__gxx_personality_v0 to i8*) {
   invoke i32 @foo(i32 2) to label %success unwind label %fail
  success:
   ret i32 2
  fail:
   landingpad {i8*, i32} catch i8** @_ZTIi catch i8** null catch i8*
bitcast (i8** @_ZTIi to i8*) filter [1 x i8] [ i8 1 ]
   ret i32 3
}
``` MLIR LLVM Dialect
``` llvm.func @caller(%arg0: !llvm.i32) -> !llvm.i32 {
%0 = llvm.mlir.constant(3 : i32) : !llvm.i32
%1 = llvm.mlir.constant("\01") : !llvm<"[1 x i8]">
%2 = llvm.mlir.addressof @_ZTIi : !llvm<"i8**">
%3 = llvm.bitcast %2 : !llvm<"i8**"> to !llvm<"i8*">
%4 = llvm.mlir.null : !llvm<"i8**">
%5 = llvm.mlir.addressof @_ZTIi : !llvm<"i8**">
%6 = llvm.mlir.constant(2 : i32) : !llvm.i32
%7 = llvm.invoke @foo(%6) to ^bb1 unwind ^bb2 : (!llvm.i32) ->
!llvm.i32
^bb1: // pred: ^bb0
llvm.return %6 : !llvm.i32
^bb2: // pred: ^bb0
%8 = llvm.landingpad (catch %5 : !llvm<"i8**">) (catch %4 :
!llvm<"i8**">) (catch %3 : !llvm<"i8*">) (filter %1 : !llvm<"[1 x i8]">)
: !llvm<"{ i8*, i32 }">
llvm.return %0 : !llvm.i32
}
```
Signed-off-by: Shraiysh Vaishay <cs17btech11050@iith.ac.in>
Differential Revision: https://reviews.llvm.org/D72006
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/test/Target/import.ll
The file was modifiedmlir/test/Dialect/LLVMIR/roundtrip.mlir
The file was modifiedmlir/test/Target/llvmir.mlir
Commit a967aa27068467340975e7bf5b2582c920711e87 by llvm-dev
[DAGCombiner] ISD::SDIV/UDIV/SREM/UREM - use general
SelectionDAG::FoldConstantArithmetic
This handles all the constant splat / opaque testing for us.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 57b0d3322445d48b52f63309b1afce8f0ff8e480 by llvm-dev
[DAGCombiner] ISD::AND/OR/XOR - use general
SelectionDAG::FoldConstantArithmetic
This handles all the constant splat / opaque testing for us.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Commit 86aae78268f31e58b619c9ae69e8b661dfacb9f4 by marek
[libc++] [P0325] Implement to_array from LFTS with updates.
Summary: This patch implements https://wg21.link/P0325. Please mind that
at it is my first contribution to libc++, so I may have forgotten to
abide to some conventions.
Reviewers: EricWF, mclow.lists, ldionne, lichray
Reviewed By: ldionne, lichray
Subscribers: lichray, dexonsmith, zoecarver, christof, ldionne,
libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D69882
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/array.version.pass.cpp
The file was addedlibcxx/test/std/containers/sequences/array/array.creation/to_array.fail.cpp
The file was modifiedlibcxx/include/array
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
The file was modifiedlibcxx/include/version
The file was modifiedlibcxx/www/cxx2a_status.html
The file was addedlibcxx/test/std/containers/sequences/array/array.creation/to_array.pass.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
Commit 727ed11b24c08c84a608886a1716b81c93640d80 by aykevanlaethem
[AVR] Recognize the AVR architecture in lldb
This commit adds AVR support to lldb. With this change, it can load a
binary and do basic things like dump a line table.
Not much else has been implemented, that should be done in later
changes.
Differential Revision: https://reviews.llvm.org/D73539
The file was modifiedlldb/include/lldb/Utility/ArchSpec.h
The file was modifiedlldb/source/Utility/ArchSpec.cpp
The file was addedlldb/test/Shell/ObjectFile/ELF/avr-basic-info.yaml
Commit 258d8dd76afd88a12539b182a53ff21dcba16a2d by john.brawn
[FPEnv][AArch64] Add lowering and instruction selection for
STRICT_FP_ROUND
This gets selected to the appropriate fcvt instruction. Handling from
there on isn't fully correct yet, as we need to model fcvt reading and
writing to fpsr and fpcr.
Differential Revision: https://reviews.llvm.org/D73201
The file was modifiedllvm/test/CodeGen/AArch64/fp-intrinsics.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrFormats.td
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit f00be8da62b8169c6548f32834f307bb520e8754 by stefanp
[PowerPC][Future] Prefixed Instructions 64 Byte Boundary Support
A known limitation for Future CPU is that the new prefixed instructions
may not cross 64 Byte boundaries.
All instructions are already 4 byte aligned so the only situation where
this can occur is when the prefix is in one 64 byte block and the
instruction that is prefixed is at the top of the next 64 byte block. To
fix this case PPCELFStreamer was added to intercept EmitInstruction.
When a prefixed instruction is emitted we try to align it to 64 Bytes by
adding a maximum of 4 bytes. If the prefixed instruction crosses the 64
Byte boundary then the alignment would trigger and a 4 byte nop would be
added to push the instruction into the next 64 byte block.
Differential Revision: https://reviews.llvm.org/D72570
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
The file was addedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.cpp
The file was addedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFStreamer.h
The file was addedllvm/test/MC/PowerPC/ppc64-prefix-align.s
The file was addedllvm/test/MC/PowerPC/ppc64-prefix-align-labels.s
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/CMakeLists.txt
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.h
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
Commit 13e28b6a9a21530112f1a6b6803a8b5dc1b8af2c by llvmgnsyncbot
[gn build] Port f00be8da62b
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/PowerPC/MCTargetDesc/BUILD.gn
Commit 058070893428a480b76a137f647ae6b9c89ac2d4 by sguelton
Activate extension loading test on Darwin now that the underlying fix
has landed
Original bug fixed by ab2300bc154f7bed43f85f74fd3fe31be71d90e0
The file was modifiedllvm/test/Feature/load_extension.ll
Commit 9109cccb4fe6092fafa617d9aebed9b92a7eb02e by pifon
[Linalg] Format Linalg/fusion.mlir.
Differential Revision: https://reviews.llvm.org/D73689
The file was modifiedmlir/test/Dialect/Linalg/fusion.mlir
Commit b4a0766c8defafe83dcef5ceea67fb25f89162d3 by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.buffer.atomic.cmpswap
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td
Commit ef465d0ad2b98cae6fd6f6c450649f40e67fa24b by hans
test-release.sh: Add MLIR to the projects list
The file was modifiedllvm/utils/release/test-release.sh
Commit dc141af7553871b94f0d7cb4b1f2096578a923be by arsenm2
[GlobalISel] (fix) Use pointer type size for offset constant when
lowering stores
Commit 9965b12fd1b was supposed to change the offset constant when
lowering load/stores, but only introduced this change for loads. This
patch adds the same fix for stores.
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit d21182d692e8109fdc3af1eb52dd293fbb3e876f by arsenm2
AMDGPU/GlobalISel: Only map VOP operands to VGPRs
This trivially avoids violating the constant bus restriction.
Previously this was allowing one SGPR in the first source operand, which
technically also avoided violating this for most operations (but not for
special cases reading vcc).
We do need to write some new, smarter operand folds to pick the optimal
SGPR to use in some kind of post-isel fold, but that's purely an
optimization.
I was originally thinking we would pick which operands should be SGPRs
in RegBankSelect, but I think this isn't really manageable. There would
be additional complexity to handle every G_* instruction, and then any
nontrivial instruction patterns would need to know when to avoid
violating it, which is likely to be very error prone.
I think having all inputs being canonically copies to VGPRs will
simplify the operand folding logic. The current folding we do is
backwards, and only considers one operand at a time, relative to
operands it already has. It therefore poorly handles the case where
there is already a constant bus operand user. If all operands are
copies, it's somewhat simpler to consider all input operands at once to
choose the optimal constant bus user.
Since the failure mode for constant bus violations is now a verifier
error and not an selection failure, this moves towards a place where we
can turn on the fallback mode. The SGPR copy folding optimizations can
be left for later.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsqrt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fceil.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-flog2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.fmas.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fexp2.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.icmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptoui.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptosi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fpext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.div.scale.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.class.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umax.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-umin.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fadd.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/constant-bus-restriction.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fcmp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.cvt.pkrtz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.fmul.legacy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-frint.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-smulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-intrinsic-trunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fsub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgpu-ffbh-u32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-fptrunc.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-mul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-or.mir
Commit 872e899b7563a033228be935a04bfb853bd73acd by arsenm2
AMDGPU/GlobalISel: Legalize unpacked d16 image operations
On targets that don't have the normal packed f16 layout, handle these
during legalization. Directly modify the register types. We can infer
this was a d16 load based on the mem operand size during selection.
A16 operands should possibly be handled here as well, but don't worry
about that yet.
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Commit 8184176efdae14e2020cacf292b24f77844e89b2 by arsenm2
AMDGPU/GlobalISel: Custom lower G_LOG/G_LOG10
I'm pretty sure this is wrong and we should expand these in a correct
way, but this matches the existing behavior.
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog10.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-flog.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
Commit f9f0919db7ea033a205c87eb08c81c4baaecd846 by jbcoe
[clang-format] Improve support for multiline C# strings
Reviewers: krasimir
Reviewed By: krasimir
Tags: #clang-format
Differential Revision: https://reviews.llvm.org/D73622
The file was modifiedclang/unittests/Format/FormatTestCSharp.cpp
The file was modifiedclang/lib/Format/FormatTokenLexer.h
The file was modifiedclang/lib/Format/ContinuationIndenter.cpp
The file was modifiedclang/lib/Format/FormatTokenLexer.cpp
Commit b21571f4d5f96a97326b9c83d4d4ae2a694e18aa by arsenm2
AMDGPU/GlobalISel: Handle s64->s64 G_FPTOSI/G_FPTOUI
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
Commit ea956685a1974d2ba75dbb5102a8a871b605751b by arsenm2
GlobalISel: Implement s32->s64 G_FPTOSI lowering
Port directly from DAG version.
The lowering for G_FPTOUI used to fail on AMDGPU because it uses
G_FPTOSI.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptoui.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fptosi.mir
Commit 0bb9a27c9895c0fbc3f55f56ad7f1e1927398fce by john.brawn
[FPEnv][AArch64] Add lowering and instruction selection for strict
conversions
Strict fp-to-int and int-to-fp conversions can be handled in the same
way that the non-strict versions are (by using the appropriate
instruction or converting to a function call when we have no
instruction).
Differential Revision: https://reviews.llvm.org/D73625
The file was modifiedllvm/test/CodeGen/AArch64/fpconv-vector-op-scalarize-strict.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/fp-intrinsics.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 6be9acdfa814dee6c57833d5351137c72c11fbd3 by hans
Drop arm triple from test/CodeGen/AArch64/global-merge-hidden-minsize.ll
Because it's in the AArch64/ directory, it runs in cases where the arm
target may not be available, see comment on D73235.
The file was modifiedllvm/test/CodeGen/AArch64/global-merge-hidden-minsize.ll
Commit 6cc6e89c11de514fc9dfff99ca093f7013003e7f by nemanja.i.ibm
Fix helptext for opt/llc after 14fc20ca6
The commit https://reviews.llvm.org/rG14fc20ca6 added some options to
the X86 back end that cause the help text for opt/llc to become much
harder to read. The issue is that the cl::value_desc is part of the
option name and is used to compute the indentation of the description
text (i.e. the maximum length option name is what everything aligns to).
Since the commit puts a large number of characters into that text,
everything is aligned to that width.
This patch just reformats the option so that the description is
contained in the description and the list of possible values is within
the angle brackets.
Note: the readability issue of the helptext was fixed in commit
     70cbf8c71c510077baadcad305fea6f62e830b06, but the re-formatting
wasn't
     added on that commit so I am still committing this.
Differential revision: https://reviews.llvm.org/D73267
The file was modifiedllvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
Commit addc27bc437d2fb1f31d88294b227ac32be63cc5 by julian.gross
Changed wrong ROCDL instructions in GPU lowering.
Summary: In the scope of the lowering phase from GPU to ROCDL, the
intructions for the conversion patterns seems to be wrong. According to
https://github.com/ROCm-Developer-Tools/HIP/blob/master/include/hip/hcc_detail/math_fwd.h
the instructions need two underscores in the beginning instead of one.
Reviewers: nicolasvasilache, herhut, rriddle
Reviewed By: herhut, rriddle
Subscribers: merge_guards_bot, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, csigg, arpith-jacob, mgester, lucyrfox, herhut,
liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73535
The file was modifiedmlir/test/Conversion/GPUToROCDL/gpu-to-rocdl.mlir
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
Commit d6b83d6ba5a1a07e8d4398b28674e181b59c3455 by arsenm2
AMDGPU/GlobalISel: Don't use pointless getConstantVRegVal
This is always a G_CONSTANT already
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Commit b54a8ec1bcd3689771c847cb37515b627034e518 by david.stenberg
[InstCombine][DebugInfo] Fold constants wrapped in metadata
Summary: When constant folding, constants that are wrapped in metadata
were not folded. This could lead to dbg.values being the only user of a
constant expression, due to the non-dbg uses having been rewritten,
resulting in the constant later on being removed by some other pass.
This occurred with the attached test case, in which the non-rewritten
GEP in the dbg.value intrinsic was later on removed by globalopt.
This patch makes the code look through metadata and fold such constants.
I guess that we in the future may want to allow dbg.values using GEPs
and other constant expressions to be emittable even if there are no
non-dbg uses, but for example SelectionDAG does not support that.
Reviewers: jmorse, aprantl, vsk, davide
Reviewed By: aprantl, vsk, davide
Subscribers: hiraditya, llvm-commits
Tags: #debug-info, #llvm
Differential Revision: https://reviews.llvm.org/D73630
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was addedllvm/test/Transforms/InstCombine/constant-fold-metadata-wrapped.ll
Commit 9de1241bb2dd1b0e39bb695c701f2d299776ff6b by stefanp
[PowerPC][Future] Branch Distance Estimation For Prefixed Instructions
By adding the prefixed instructions the branch distances are no longer
computed correctly. Since prefixed instructions cannot cross a 64 byte
boundary we have to assume that a prefixed instruction may have a nop
prepended to it. This patch tries to take that nop into consideration
when computing the size of basic blocks.
Differential Revision: https://reviews.llvm.org/D72572
The file was addedllvm/test/CodeGen/PowerPC/alignlongjumptest.mir
The file was modifiedllvm/lib/Target/PowerPC/PPCBranchSelector.cpp
Commit 523896f64a4c4b586a5fbcf676181826d2c0fbd0 by Alexander.Richardson
Bring back the tests for update_cc_tests_checks.py
The tests were removed in 287307a0c60b68099d5f9dd22ac1db2a42593533 to
avoid a dependency on python3. update_cc_tests_checks.py also works with
python2 so restore the tests without the python3 dependency.
The file was addedllvm/test/tools/UpdateTestChecks/update_cc_test_checks/Inputs/mangled_names.c.expected
The file was addedllvm/test/tools/UpdateTestChecks/update_cc_test_checks/mangled_names.test
The file was addedllvm/test/tools/UpdateTestChecks/update_cc_test_checks/Inputs/mangled_names.c
The file was modifiedllvm/test/tools/UpdateTestChecks/lit.local.cfg
The file was addedllvm/test/tools/UpdateTestChecks/update_cc_test_checks/Inputs/mangled_names.c.funcsig.expected
The file was addedllvm/test/tools/UpdateTestChecks/update_cc_test_checks/lit.local.cfg
Commit 601687bf731a33364a7de0ece7acd1c17c9dd60d by charusso
[analyzer] DynamicSize: Remove 'getExtent()' from regions
Summary: This patch introduces a placeholder for representing the
dynamic size of regions. It also moves the `getExtent()` method of
`SubRegions` to the
`MemRegionManager` as `getStaticSize()`.
Reviewed By: NoQ
Differential Revision: https://reviews.llvm.org/D69540
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ExprInspectionChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/SymbolManager.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CastSizeChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CStringChecker.cpp
The file was addedclang/include/clang/StaticAnalyzer/Core/PathSensitive/DynamicSize.h
The file was modifiedclang/lib/StaticAnalyzer/Checkers/CheckPlacementNew.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/BuiltinFunctionChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/BugReporterVisitors.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/VLASizeChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp
The file was addedclang/lib/StaticAnalyzer/Core/DynamicSize.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/MemRegion.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/CMakeLists.txt
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/MemRegion.h
The file was modifiedclang/lib/StaticAnalyzer/Core/RegionStore.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ArrayBoundCheckerV2.cpp
Commit 8bb9642fd7cda09449af5cb0cced220e57a0011a by llvmgnsyncbot
[gn build] Port 601687bf731
The file was modifiedllvm/utils/gn/secondary/clang/lib/StaticAnalyzer/Core/BUILD.gn
Commit 4801522432a4dd6aeebf2b461744891953f7fd1d by antiagainst
[mlir][spirv] Add GroupNonUniform min and max operations.
Add GroupNonUniform atihtmetic operations: FMax, FMin, SMax, SMin, UMax,
UMin.
Differential Revision: https://reviews.llvm.org/D73563
The file was modifiedmlir/test/Dialect/SPIRV/Serialization/non-uniform-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/test/Dialect/SPIRV/non-uniform-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVNonUniformOps.td
Commit af3d0d16286aecdd19356a3505d4a87f54a2f7e9 by charusso
[analyzer] DynamicSize: Remove 'getSizeInElements()' from store
Summary: This patch uses the new `DynamicSize.cpp` to serve dynamic
information. Previously it was static and probably imprecise data.
Reviewed By: NoQ
Differential Revision: https://reviews.llvm.org/D69599
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ArrayBoundChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/RegionStore.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/DynamicSize.h
The file was modifiedclang/lib/StaticAnalyzer/Checkers/MPI-Checker/MPIChecker.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/Store.h
The file was modifiedclang/lib/StaticAnalyzer/Checkers/UndefResultChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Checkers/ReturnPointerRangeChecker.cpp
The file was modifiedclang/lib/StaticAnalyzer/Core/DynamicSize.cpp
Commit 3bbe7a681e0f98182daf268a314d1372073ea019 by jasonliu
[XCOFF][AIX] Support basic relocation type on AIX
Summary:
This patch intends to support three most common relocation type on AIX:
R_POS, R_TOC, R_RBR. These three relocation type will be needed for
object file generation on AIX for small code model. We will have follow
up patches to bring relocation support for large code model on AIX.
Reviewers: hubert.reinterpretcast, daltenty, DiggerLin
Differential Revision: https://reviews.llvm.org/D72027
The file was modifiedllvm/include/llvm/MC/MCXCOFFObjectWriter.h
The file was modifiedllvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
The file was addedllvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
The file was modifiedllvm/include/llvm/BinaryFormat/XCOFF.h
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCXCOFFObjectWriter.cpp
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modifiedllvm/lib/MC/MCXCOFFStreamer.cpp
The file was modifiedllvm/lib/MC/XCOFFObjectWriter.cpp
Commit fdc496a3d30d2d82814965a6aa987b7ef0b136ef by zinenko
[mlir] EnumsGen: dissociate string form of integer enum from C++ symbol
name
Summary: In some cases, one may want to use different names for C++
symbol of an enumerand from its string representation. In particular, in
the LLVM dialect for, e.g., Linkage, we would like to preserve the same
enumerand names as LLVM API and the same textual IR form as LLVM IR, yet
the two are different
(CamelCase vs snake_case with additional limitations on not being a C++
keyword).
Modify EnumAttrCaseInfo in OpBase.td to include both the integer value
and its string representation. By default, this representation is the
same as C++ symbol name. Introduce new IntStrAttrCaseBase that allows
one to use different names. Exercise it for LLVM Dialect Linkage
attribute. Other attributes will follow as separate changes.
Differential Revision: https://reviews.llvm.org/D73362
The file was modifiedmlir/unittests/TableGen/EnumsGenTest.cpp
The file was modifiedmlir/tools/mlir-tblgen/EnumsGen.cpp
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/unittests/TableGen/enums.td
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/lib/TableGen/Attribute.cpp
The file was modifiedmlir/include/mlir/TableGen/Attribute.h
Commit 38ab3b876baaa899b92dda9113a4d1d4b56c2e79 by charusso
[analyzer] CheckerContext: Make the Preprocessor available
Summary: This patch hooks the `Preprocessor` trough `BugReporter` to the
`CheckerContext` so the checkers could look for macro definitions.
Reviewed By: NoQ
Differential Revision: https://reviews.llvm.org/D69731
The file was modifiedclang/include/clang/StaticAnalyzer/Core/BugReporter/BugReporter.h
The file was modifiedclang/lib/StaticAnalyzer/Core/AnalysisManager.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/CheckerContext.h
The file was modifiedclang/unittests/StaticAnalyzer/Reusables.h
The file was modifiedclang/lib/StaticAnalyzer/Frontend/AnalysisConsumer.cpp
The file was modifiedclang/include/clang/StaticAnalyzer/Core/PathSensitive/AnalysisManager.h
Commit fcabccd3d965807f0a364a5eca543a86bb56557b by frank.laub
[MLIR] Add the sqrt operation to mlir.
Summary: Add and pipe through the sqrt operation for Standard and LLVM
dialects.
Reviewers: nicolasvasilache, ftynse
Reviewed By: ftynse
Subscribers: frej, ftynse, merge_guards_bot, flaub, mehdi_amini,
rriddle, jpienaar, burmako, shauheen, antiagainst, arpith-jacob,
mgester, lucyrfox, aartbik, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73571
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-to-llvmir.mlir
The file was modifiedmlir/docs/Dialects/Standard.md
The file was modifiedmlir/lib/Conversion/StandardToLLVM/ConvertStandardToLLVM.cpp
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Ops.td
The file was modifiedmlir/test/Target/llvmir-intrinsics.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
Commit c53cb2bdc78ee3d3eec8c30821480b390b0eb145 by serguei.n.dmitriev
[Clang][Bundler] Reduce fat object size
Summary: Fat object size has significantly increased after D65819 which
changed bundler tool to add host object as a normal bundle to the fat
output which almost doubled its size. That patch was fixing the
following issues
1. Problems associated with the partial linking - global constructors
were not called for partially linking objects which clearly resulted in
incorrect behavior. 2. Eliminating "junk" target object sections from
the linked binary on the host side.
The first problem is no longer relevant because we do not use partial
linking for creating fat objects anymore. Target objects sections are
now inserted into the resulting fat object with a help of llvm-objcopy
tool.
The second issue, "junk" sections in the linked host binary, has been
fixed in D73408 by adding "exclude" flag to the fat object's sections
which contain target objects. This flag tells linker to drop section
from the inputs when linking executable or shared library, therefore
these sections will not be propagated in the linked binary.
Since both problems have been solved, we can revert D65819 changes to
reduce fat object size and this patch essentially is doing that.
Reviewers: ABataev, alexshap, jdoerfert
Reviewed By: ABataev
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73642
The file was modifiedclang/test/Driver/clang-offload-bundler.c
The file was modifiedclang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
Commit 795bbb366266e83d2bea8dc04c19919b52ab3a2a by yhs
[BPF] fix a bug in BPFMISimplifyPatchable pass with -O0
The recommended optimization level for BPF programs is O2 since (1). BPF
is running inside the kernel and linux kernel won't work at -O0 level,
and (2). Verifier is not able to handle O0 code properly, e.g.,
potential large stack size and a lot of spills.
But we should keep -O0 at least compiling. This patch fixed a bug in
BPFMISimplifyPatchable phase where with -O0, a segmentation fault will
happen for a simple program like:
int test(int a, int b) { return a + b; }
A test case is added to capture such a case.
Differential Revision: https://reviews.llvm.org/D73681
The file was modifiedllvm/lib/Target/BPF/BPFMISimplifyPatchable.cpp
The file was addedllvm/test/CodeGen/BPF/optnone-1.ll
Commit 4697874c28eda11ce29266f3c6188280809b6b36 by a.bataev
[OPENMP50]Handle lastprivate conditionals passed as shared in inner
regions.
If the lastprivate conditional is passed as shared in inner region, we
shall check if it was ever changed and use this updated value after exit
from the inner region as an update value.
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
The file was modifiedclang/test/OpenMP/sections_lastprivate_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.h
The file was modifiedclang/test/OpenMP/parallel_for_lastprivate_conditional.cpp
The file was modifiedclang/lib/CodeGen/CGOpenMPRuntime.cpp
Commit 8d2e9bca7e53123ae242fe983a0cc231efcdc2b4 by lebedev.ri
[NFC][IndVarSimplify] Autogenerate exit_value_test2.ll check lines
The file was modifiedllvm/test/Transforms/IndVarSimplify/exit_value_test2.ll
Commit 3302586faebd3055647a88bdad60da080af83598 by sivachandra
[libc] Add a missing `this->` in __llvm_libc::cpp:MutableArrayRef::end.
I had removed it to verify a review comment, but forgot to put it back.
The file was modifiedlibc/utils/CPP/ArrayRef.h
Commit 3ae11b42818363f70b3c6b0246bb617e35709c58 by n.james93
[NFC] small refactor on RenamerClangTidyCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/utils/RenamerClangTidyCheck.cpp
Commit 70d345e687caba4ac1f95655c6924dfa91e0083f by nikita.ppv
[AArch64][ARM] Always expand ordered vector reductions (PR44600)
fadd/fmul reductions without reassoc are lowered to
VECREDUCE_STRICT_FADD/FMUL nodes, which don't have legalization support.
Until that is in place, expand these intrinsics on ARM and AArch64.
Other targets always expand the vector reduction intrinsics.
Additionally expand fmax/fmin reductions without nonan flag on AArch64,
as the backend asserts that the flag is present when lowering
VECREDUCE_FMIN/FMAX.
This fixes https://bugs.llvm.org/show_bug.cgi?id=44600.
Differential Revision: https://reviews.llvm.org/D73135
The file was addedllvm/test/CodeGen/ARM/vecreduce-fmul-legalization-strict.ll
The file was addedllvm/test/CodeGen/AArch64/vecreduce-fmax-legalization-nan.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.h
The file was addedllvm/test/CodeGen/AArch64/vecreduce-fadd-legalization-strict.ll
The file was addedllvm/test/CodeGen/AArch64/vecreduce-fmul-legalization-strict.ll
The file was addedllvm/test/CodeGen/ARM/vecreduce-fadd-legalization-strict.ll
Commit e44f4a8a54141d5f527ed8ee05362cc98031d723 by whitneyt
[LoopFusion] Move instructions from FC1.GuardBlock to FC0.GuardBlock and
from FC0.ExitBlock to FC1.ExitBlock when proven safe.
Summary: Currently LoopFusion give up when the second loop nest guard
block or the first loop nest exit block is not empty. For example:
if (0 < N) {
for (int i = 0; i < N; ++i) {}
x+=1;
} y+=1; if (0 < N) {
for (int i = 0; i < N; ++i) {}
} The above example should be safe to fuse. This PR moves instructions
in FC1 guard block (e.g. y+=1;) to FC0 guard block, or instructions in
FC0 exit block (e.g. x+=1;) to FC1 exit block, which then LoopFusion is
able to fuse them. Reviewer: kbarton, jdoerfert, Meinersbur, dmgreen,
fhahn, hfinkel, bmahjour, etiotto Reviewed By: jdoerfert Subscribers:
hiraditya, llvm-commits Tag: LLVM Differential Revision:
https://reviews.llvm.org/D73641
The file was modifiedllvm/test/Transforms/LoopFusion/guarded.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopFuse.cpp
The file was modifiedllvm/test/Transforms/LoopFusion/diagnostics_missed.ll
Commit f2a436058fcbc11291e73badb44e243f61046183 by Steven Wu
[libcxxabi] Insert padding in __cxa_exception struct for compatibility
Summary: Preserve the old ABI for __cxa_exception and
__cxa_dependent_exception on 64 bit platforms or ARM_EHABI platforms.
After r276215, libunwind in llvm-project labels _Unwind_Exception to be
double word aligned. That change implictly adds a padding before
unwindHeader field in __cxa_exception and __cxa_dependent_exception.
Preserve the same negative offsets in those struct by moving the padding
to the beginning of the field.
The assumption here is that if the ABI is not aware of the padding
before unwindHeader and put the referenceCount/primaryException in
there, no padding should exist before unwindHeader.
Reviewers: EricWF, mclow.lists, ldionne, jroelofs, dexonsmith, rjmccall,
compnerd, phosek, ahatanak
Reviewed By: rjmccall
Subscribers: hans, smeenai, kristof.beyls, christof, jkorous, ributzka,
libcxx-commits
Tags: #libc
Differential Revision: https://reviews.llvm.org/D72543
The file was modifiedlibcxxabi/src/cxa_exception.h
Commit c45bb326a681570b88dd315299c10c2242c143a9 by tejohnson
[ThinLTO] Disable "Always import constants" due to compile time issues
Summary: Disable the always importing of constants introduced in D70404
by default under a new internal option, since it is causing order of
magnitude compile time regressions during the thin link. Will continue
investigating why the regressions occur.
Reviewers: evgeny777, wmi
Subscribers: mehdi_amini, inglorion, hiraditya, steven_wu, dexonsmith,
arphaman, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73724
The file was modifiedllvm/test/ThinLTO/X86/import-constant.ll
The file was modifiedllvm/lib/IR/ModuleSummaryIndex.cpp
The file was modifiedllvm/test/ThinLTO/X86/referenced_by_constant.ll
Commit 36bfdb7096cfe1925448e408ec72f1a6bdc4cd2c by serguei.n.dmitriev
[Clang][Driver] Disable llvm passes for the first host OpenMP offload
compilation
Summary: With OpenMP offloading host compilation is done in two phases
to capture host IR that is passed to all device compilations as input.
But it turns out that we currently run entire LLVM optimization pipeline
on host IR on both compilations which may have unpredictable effects on
the resulting code. This patch fixes this problem by disabling LLVM
passes on the first compilation, so the host IR that is passed to device
compilations will be captured right after front end.
Reviewers: ABataev, jdoerfert, hfinkel
Reviewed By: ABataev
Subscribers: guansong, cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73721
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/test/Driver/openmp-offload.c
Commit 0610637aac9cf2dedbb92da2d52dfbfd9b6331d2 by danilo.carvalho.grael
[AArch64][SVE] Add remaining SVE2 mla indexed intrinsics.
Summary: Add remaining SVE2 mla indexed intrinsics:
- sqdmlalb, sqdmlalt, sqdmlslb, sqdmlslt
Add suffix _lanes and switch immediate types to i32 for all mla indexed
intrinsics to align with ACLE builtin definitions.
Reviewers: efriedma, sdesmalen, cameron.mcinally, c-rhodes, rengolin,
kmclaughlin
Subscribers: tschuett, kristof.beyls, hiraditya, rkruppe, arphaman,
psnobl, llvm-commits, amehsan
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73633
The file was modifiedllvm/include/llvm/IR/IntrinsicsAArch64.td
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/lib/Target/AArch64/SVEInstrFormats.td
The file was modifiedllvm/test/CodeGen/AArch64/sve2-mla-indexed.ll
Commit 34e6552dcbb4f6647746588bb35591a97a7992a3 by huihuiz
[ConstantFold][SVE] Fix constant folding for scalable vector unary
operations.
Summary: Similar to issue D71445. Scalable vector should not be
evaluated element by element. Add support to handle scalable vector
UndefValue.
Reviewers: sdesmalen, efriedma, apazos, huntergr, willlovett
Reviewed By: efriedma
Subscribers: tschuett, hiraditya, rkruppe, psnobl, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73678
The file was modifiedllvm/lib/IR/ConstantFold.cpp
The file was modifiedllvm/test/Analysis/ConstantFolding/vscale.ll
Commit c83d9bedc0cc430dc620e7a807daeb985d390325 by saar
[Concept] Fix incorrect check for containsUnexpandedParameterPack in CSE
We previously checked for containsUnexpandedParameterPack in CSEs by
observing the property in the converted arguments of the CSE. This may
not work if the argument is an expanded type-alias that contains a
pack-expansion (see added test).
Check the as-written arguments when determining
containsUnexpandedParameterPack and isInstantiationDependent.
The file was modifiedclang/include/clang/AST/ExprConcepts.h
The file was modifiedclang/test/CXX/expr/expr.prim/expr.prim.id/p3.cpp
The file was modifiedclang/lib/AST/ExprConcepts.cpp
The file was modifiedclang/lib/AST/ASTContext.cpp
Commit a424ef99e7b9821ec80564af3d3a8f091323a38c by saar
[Concepts] Add check for dependent RC when checking function constraints
Do not attempt to check a dependent requires clause in a function
constraint
(may be triggered by, for example, DiagnoseUseOfDecl).
The file was modifiedclang/lib/Sema/SemaConcept.cpp
The file was modifiedclang/lib/Sema/SemaExpr.cpp
Commit 60f5da79e3de49b2074446e656a72970499a8d78 by saar
[Concepts] Add 'this' context to instantiation of member requires clause
'this' context was missing in instantiation of member requires clause.
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Commit b0d25fff9b84ccb711c1a86ea0e606aa98c72a20 by huihuiz
[ConstantFold][SVE][NFC] Add test for select instruction in scalable
vector.
Side notes from D73669, no need to guard the iteration on vectors, as it
is explicitly looking for a ConstantVector/ConstantDataVector, which is
not expected to be scalable at the moment. So, add the test only.
The file was modifiedllvm/test/Analysis/ConstantFolding/vscale.ll
Commit af3e88495627c9b150814ff13e5749e1ed31c5d3 by rnk
Speed up compilation of ASTImporter
Avoid recursively instantiating importSeq. Use initializer list
expansion to stamp out a single instantiation of std::tuple of the
deduced sequence of types, and thread the error around that tuple type.
Avoids needlessly instantiating std::tuple N-1 times.
new time to compile: 0m25.985s old time to compile: 0m35.563s
new obj size: 10,000kb old obj size: 12,332kb
I found the slow TU by looking at ClangBuildAnalyzer results, and looked
at -ftime-trace for the file in chrome://tracing to find this.
Tested with: clang-cl, MSVC, and GCC.
Reviewed By: martong
Differential Revision: https://reviews.llvm.org/D73667
The file was modifiedclang/lib/AST/ASTImporter.cpp
Commit 06b8e32d4fd3f634f793e3bc0bc4fdb885e7a3ac by maskray
[AArch64] -fpatchable-function-entry=N,0: place patch label after BTI
Summary: For -fpatchable-function-entry=N,0 -mbranch-protection=bti,
after 9a24488cb67a90f889529987275c5e411ce01dda, we place the NOP sled
after the initial BTI.
```
.Lfunc_begin0: bti c nop nop
.section __patchable_function_entries,"awo",@progbits,f,unique,0
.p2align 3
.xword .Lfunc_begin0
```
This patch adds a label after the initial BTI and changes the
__patchable_function_entries entry to reference the label:
```
.Lfunc_begin0: bti c
.Lpatch0: nop nop
.section __patchable_function_entries,"awo",@progbits,f,unique,0
.p2align 3
.xword .Lpatch0
```
This placement is compatible with the resolution in
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92424 .
A local linkage function whose address is not taken does not need a BTI.
Placing the patch label after BTI has the advantage that code does not
need to differentiate whether the function has an initial BTI.
Reviewers: mrutland, nickdesaulniers, nsz, ostannard
Subscribers: kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73680
The file was modifiedllvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
The file was modifiedllvm/include/llvm/CodeGen/AsmPrinter.h
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
The file was modifiedllvm/test/CodeGen/AArch64/patchable-function-entry-bti.ll
Commit 8b737688c21a9755cae14cb9343930e0882164ab by sd.fertile
[AIX] Minor cleanup in AsmPrinter. [NFC]
- Extends the comments related to function descriptors, noting how they
are only used on AIX.
- Changes the condition used to gate the creation of the current
function symbol in AsmPrinter::SetupMachineFunction to reflect being AIX
specific. The creation of the symbol is different because of AIXs
linkage conventions, not because AIX uses function descriptors.
Differential Revision: https://reviews.llvm.org/D73115
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp
Commit 05badc60b7f4dff3c1b9efd5d7eea13979e255db by Jonas Devlieghere
[lldb/Reproducers] Fix API boundary tracking bug
When recording the result from the LLDB_RECORD_RESULT macro, we need to
update the boundary so we capture the copy constructor. However, when
called to record the this pointer of the (copy) constructor itself, the
boundary should not be toggled, because it is called from the
LLDB_RECORD_CONSTRUCTOR macro, which might be followed by other API
calls.
This manifested itself as an object encountered during replay that we
hadn't seen before. The index-to-object mapping would return a nullptr
and lldb would crash.
The file was modifiedlldb/include/lldb/Utility/ReproducerInstrumentation.h
Commit b3a1d09c1c7a50069941021881a8174409d90975 by riddleriver
[mlir] Add initial support for parsing a declarative operation assembly
format
Summary: This is the first revision in a series that adds support for
declaratively specifying the asm format of an operation. This revision
focuses solely on parsing the format. Future revisions will add support
for generating the proper parser/printer, as well as transitioning the
syntax definition of many existing operations.
This was originally proposed here:
https://llvm.discourse.group/t/rfc-declarative-op-assembly-format/340
Differential Revision: https://reviews.llvm.org/D73405
The file was modifiedmlir/lib/TableGen/Type.cpp
The file was addedmlir/tools/mlir-tblgen/OpFormatGen.cpp
The file was addedmlir/tools/mlir-tblgen/OpFormatGen.h
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
The file was modifiedmlir/include/mlir/TableGen/Type.h
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/tools/mlir-tblgen/CMakeLists.txt
The file was addedmlir/test/mlir-tblgen/op-format-spec.td
Commit 1c158d0f90919ba19b8749556ac3a60e9d99a312 by riddleriver
[mlir] Add support for generating the parser/printer from the
declarative operation format.
Summary: This revision add support, and testing, for generating the
parser and printer from the declarative operation format.
Differential Revision: https://reviews.llvm.org/D73406
The file was modifiedmlir/include/mlir/IR/OpImplementation.h
The file was modifiedmlir/test/lib/TestDialect/TestOps.td
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
The file was addedmlir/test/mlir-tblgen/op-format.mlir
Commit 82170d5619987aac0de1f7cc62bdcdc8a68e783c by riddleriver
[mlir] Update various operations to declaratively specify their assembly
format.
Summary: This revision switches over many operations to use the
declarative methods for defining the assembly specification. This
updates operations in the NVVM, ROCDL, Standard, and VectorOps dialects.
Differential Revision: https://reviews.llvm.org/D73407
The file was modifiedmlir/lib/Dialect/VectorOps/VectorOps.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/ROCDLOps.td
The file was modifiedmlir/include/mlir/IR/OpBase.td
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/ROCDLDialect.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/NVVMOps.td
The file was modifiedmlir/include/mlir/Dialect/VectorOps/VectorOps.td
The file was modifiedmlir/include/mlir/Dialect/StandardOps/Ops.td
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/lib/Dialect/StandardOps/Ops.cpp
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp
Commit 528adb2e48035da1f0954d09236f7a63f79feab3 by riddleriver
[mlir][NFC] Use declarative format for several operations in LLVM and
Linalg dialects
Differential Revision: https://reviews.llvm.org/D73503
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/test/Dialect/LLVMIR/global.mlir
The file was modifiedmlir/test/Dialect/LLVMIR/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
Commit 389b12621041a03d693b3f369107df8f8dccf19e by riddleriver
[mlir][NFC] Update several SPIRV operations to use declarative parsers.
Differential Revision: https://reviews.llvm.org/D73504
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVBase.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVOps.cpp
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVOps.td
The file was modifiedmlir/test/Dialect/SPIRV/control-flow-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVGroupOps.td
Commit 7f658920863bb96adc973a586cac50d9f8ad940b by sivachandra
[libc] Add [EXPECT|ASSERT]_[TRUE|FALSE] unittest macros.
Also, other EXPECT_* and ASSERT_* macros have been extended to accept
bool values.
Reviewers: abrachet, gchatelet
Subscribers: MaskRay, tschuett, libc-commits
Tags: #libc-project
Differential Revision: https://reviews.llvm.org/D73668
The file was modifiedlibc/utils/UnitTest/Test.h
The file was modifiedlibc/utils/CPP/TypeTraits.h
The file was modifiedlibc/utils/UnitTest/Test.cpp
Commit effa0bc868b077b34f67b2669c4af892e73d6d6d by apl
[libc++abi] Bump PACKAGE_VERSION
The file was modifiedlibcxxabi/CMakeLists.txt
Commit 1d9e08ec35a5979f103b876f8dd2324f77db3f6e by mahesha.comp
[AMDGPU] Add file headers for few files where it is missing.
Summary: Added file headers for files which implement iterative
lightweight scheduling strategies. Which is basically an exercise which
I undertook in order to get used to LLVM development process.
Reviewers: arsenm, vpykhtin, cdevadas
Reviewed By: vpykhtin
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr,
t-tye, hiraditya, javed.absar, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73417
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNMinRegStrategy.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.h
The file was modifiedllvm/lib/Target/AMDGPU/GCNIterativeScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNIterativeScheduler.h
Commit 5be2ca29217ad977f2479bfc530127c7fb418963 by serguei.n.dmitriev
[Clang][Bundler][NFC] Replace SmallString<...> with StringRef
Reviewers: ABataev
Reviewed By: ABataev
Subscribers: cfe-commits
Tags: #clang
Differential Revision: https://reviews.llvm.org/D73738
The file was modifiedclang/tools/clang-offload-bundler/ClangOffloadBundler.cpp
Commit eb67bd78dc1865fce0c35f241f62cf65f4452e3e by zinenko
[mlir] LLVM dialect: Generate conversions between EnumAttrCase and LLVM
API
Summary: MLIR materializes various enumeration-based LLVM IR operands as
enumeration attributes using ODS. This requires bidirectional conversion
between different but very similar enums, currently hardcoded. Extend
the ODS modeling of LLVM-specific enumeration attributes to include the
name of the corresponding enum in the LLVM C++ API as well as the names
of specific enumerants. Use this new information to automatically
generate the conversion functions between enum attributes and LLVM API
enums in the two-way conversion between the LLVM dialect and LLVM IR
proper.
Differential Revision: https://reviews.llvm.org/D73468
The file was modifiedmlir/lib/Target/LLVMIR/ModuleTranslation.cpp
The file was modifiedmlir/lib/Target/LLVMIR/ConvertFromLLVMIR.cpp
The file was modifiedmlir/tools/mlir-tblgen/LLVMIRConversionGen.cpp
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/CMakeLists.txt
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
Commit 92a42b6a4d1544acb96f334369ea6c1c948634e3 by Raphael Isemann
[lldb][NFC] LLDB_LOGF to LLDB_LOG conversion in ClangASTImporter
The file was modifiedlldb/source/Symbol/ClangASTImporter.cpp
Commit 654f5d684561d784fa8927d3de31b7dab3f28087 by kostyak
[scudo][standalone] Release secondary memory on purge
Summary: The Secondary's cache needs to be released when the Combined's
`releaseToOS` function is called (via `M_PURGE`) for example, which this
CL adds.
Additionally, if doing a forced release, we'll release the transfer
batch class as well since now we can do that.
There is a couple of other house keeping changes as well:
- read the page size only once in the Secondary Cache `store`
- remove the interval check for `CanRelease`: we are going to
make that configurable via `mallopt` so this needs not be
set in stone there.
Reviewers: cferris, hctim, pcc, eugenis
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73730
The file was modifiedcompiler-rt/lib/scudo/standalone/primary32.h
The file was modifiedcompiler-rt/lib/scudo/standalone/primary64.h
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h
The file was modifiedcompiler-rt/lib/scudo/standalone/secondary.h
Commit 01943a59f51d8b5ede062305941c1f864b8a6a13 by rnk
Move verification of Sema::MaximumAlignment to a .cpp file
Saves these transitive includes:
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/CodeGen/CGValue.h
The file was modifiedclang/lib/CodeGen/CGDecl.cpp
Commit cad91074a65ef992a230f071b77912e42eb1a908 by nikita.ppv
[InstCombine] Create new insts in foldICmpEqIntrinsicWithConstant; NFCI
In line with current conventions, create new instructions rather than
modify two operands in place and performing manual worklist management.
This should be NFC apart from possible worklist order changes.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 90b5ed996bfa97beb9cb96e013913cc956540b95 by nikita.ppv
[InstCombine] Remove unnecessary worklist add; NFCI
The IRBuilder will automatically add instructions to the worklist.
Adding it manually is unnecessary, but may mess up worklist order.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
Commit 97a1d4bc0213c36127b794a5a4a8869fe8cb8fff by Matthew.Arsenault
AMDGPU: Don't use separate cache arguments for s_buffer_load node
There's not much value to this separate node from the intrinsic. Make
the operand structure the same as the intrinsic, so we can reuse the
same pattern for GlobalISel.
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SMInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
Commit f7521dc292221e502d013e9505598df461659362 by Matthew.Arsenault
AMDGPU: Replace subtarget check with an assert
This is already checked by the pattern subtarget predicate.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Commit b4fac782462c26baa94798e5fdb58e6810bd336b by aminim
MSVC Buggy version detection: turn pre-processor error into CMake
configuration time check
This allows consumer to override in a cleaner way while still prevent
them from hitting bug without knowing they run an unsupported
configuration.
Differential Revision: https://reviews.llvm.org/D73677
The file was modifiedllvm/cmake/modules/CheckCompilerVersion.cmake
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit 809c872aae7c57afea1b00816bd99a4cd461b672 by daltenty
[NFC] Fix check prefix add in fcanonicalize-elimination.ll
The test fix added by "D39306: Fix
CodeGen/AMDGPU/fcanonicalize-elimination.ll on FreeBSD 11.0" uses a test
prefix which is not actually used in the FileCheck stanza. Thus the
problem originally encountered still exists and the tests fails for host
triples that  contain "1.0", including AIX 7.1.0.
The file was modifiedllvm/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
Commit fdf31ae32dd2bddd9cc72ee7108f0c69bb2e637f by phosek
[Fuchsia] Never link in implicit "system dependencies" of sanitizer
runtimes
This is never appropriate on Fuchsia and any future needs for system
library dependencies of compiler-supplied runtimes will be addressed via
.deplibs instead of driver hacks.
Patch By: mcgrathr
Differential Revision: https://reviews.llvm.org/D73734
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
Commit 480391035c730b7b8a58601ef54e0543824ba931 by nikita.ppv
[InstCombine] Remove unnecessary worklist add; NFCI
Again, this will already be added by IRBuilder.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineVectorOps.cpp
Commit 6170272ab9aeb4dee1cb212b88e74f0c2e4dad60 by Amara Emerson
[AArch64][GlobalISel] Disallow vectors in convertPtrAddToAdd.
Found by inspection, but there's no test for this yet because G_PTR_ADD
is currently illegal for vectors. I'll add the test at a later time when
the legalizer support has landed.
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
Commit c8c987d3105a9bc9bab241946ec96c36783ed120 by Jessica Paquette
[AArch64][GlobalISel] Fold in G_ANYEXT/G_ZEXT into TB(N)Z
This is similar to the code in getTestBitOperand in AArch64ISelLowering.
Instead of implementing all of the TB(N)Z optimizations at once, this
patch implements the simplest case first. The way that this is set up
should make it fairly easy to add the rest as we go along.
The idea here is that after determining that we can use a TB(N)Z, we can
continue looking through instructions and perform further folding.
In this case, when we have a G_ZEXT or G_ANYEXT where the extended bits
are not used, we can fold it into the TB(N)Z.
Differential Revision: https://reviews.llvm.org/D73673
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/opt-fold-ext-tbz-tbnz.mir
Commit eb7f74e300554eb20b1f256ffed7bde172a5bf69 by Matthew.Arsenault
CodeGen: Use Register
The file was modifiedllvm/lib/CodeGen/MachineRegisterInfo.cpp
The file was modifiedllvm/lib/CodeGen/LiveRangeEdit.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineRegisterInfo.h
The file was modifiedllvm/include/llvm/CodeGen/LiveRangeEdit.h
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
Commit 17dbc6611df9044d779d85b3d545bd37e5dd5200 by Matthew.Arsenault
AMDGPU: Cleanup and fix SMRD offset handling
I believe this also fixes bugs with CI 32-bit handling, which was
incorrectly skipping offsets that look like signed 32-bit values. Also
validate the offsets are dword aligned before folding.
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
Commit 1e417ba2d4d27a604d87462ff2d9e97ea9c5e770 by aminim
Revert "MSVC Buggy version detection: turn pre-processor error into
CMake configuration time check"
This reverts commit b4fac782462c26baa94798e5fdb58e6810bd336b. It broke
the MSVC bot
The file was modifiedllvm/cmake/modules/CheckCompilerVersion.cmake
The file was modifiedllvm/include/llvm/Support/Compiler.h
Commit 6a4acb9d809aaadb9304a7a2f3382d958a6c2adf by Matthew.Arsenault
Revert "AMDGPU: Cleanup and fix SMRD offset handling"
This reverts commit 17dbc6611df9044d779d85b3d545bd37e5dd5200.
A test is failing on some bots
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.s.buffer.load.ll
The file was modifiedllvm/lib/Target/AMDGPU/Utils/AMDGPUBaseInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/cgp-addressing-modes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-constant.mir
Commit 58c4fa2c538a73527aeeb4c7535016d9b9a1df18 by Jonas Devlieghere
[lldb/Reproducers] Use LLDB_RECORD_DUMMY for GetStopDescription
GetStopDescription writes to a const char* with a given length. However,
the reproducer instrumentation serialized the char pointer and length
separately.
To serialize the string, we naively look for the first null byte to
determine its length. This can lead to the method overwriting the input
buffer when the assumed string length is smaller than the actual number
of bytes written by GetStopDescription.
The real solution is to have a custom serializer that takes both
arguments into account. However, given that these are output parameters,
they don't affect replay. If the string is passed as input later, it's
is recorded as such. Therefore I've replaced the instrumentation macro
with LLDB_RECORD_DUMMY which skips the serialization.
The file was modifiedlldb/source/API/SBThread.cpp
Commit 457a6d49d565075ae99f0e5a931bbed6512dce2f by Jonas Devlieghere
[lldb/Reproducers] Fix typo in CMake so we actually replay.
The CMakeLists.txt had a typo which meant that check-lldb-repro was
capturing twice instead of capturing and then replaying. This also
uncovered a missing import in lldb-repro.py. This patch fixes both
issues.
The file was modifiedlldb/test/Shell/CMakeLists.txt
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/debug_loc.s
The file was modifiedlldb/utils/lldb-repro/lldb-repro.py
Commit fff6a1b0f1fe57b46379001db75952d2a06eab1f by leonardchan
[SafeStack][DebugInfo] Insert DW_OP_deref in correct location
This patch addresses the issue found in
https://bugs.llvm.org/show_bug.cgi?id=44585 where a DW_OP_deref was
placed at the end of a dwarf expression, resulting in corrupt symbols
when debugging.
Differential Revision: https://reviews.llvm.org/D73526
The file was modifiedllvm/test/DebugInfo/COFF/types-array-advanced.ll
The file was modifiedllvm/test/DebugInfo/X86/safestack-byval.ll
The file was addedllvm/test/DebugInfo/X86/safestack-deref.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.cpp