UnstableChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. Fix crash when emitting NullReturn guards for functions returning BOOL (details)
  2. Add Python bindings for the builtin dialect (details)
  3. [llvm-mca] Initial implementation of serialization using JSON. The views (details)
  4. [libc++abi] Simplify scan_eh_tab (details)
  5. [gn build] Port d38be2ba0e4e (details)
  6. [libc] Distinguish compiler and run failures (details)
  7. [RISCV] New vector load/store in V extension v1.0 (details)
  8. [llvm-mca] Forgot a couple of override specifiers. (details)
  9. [RISCV] Use v8-v23 as argument registers to conform to the proposal. (details)
  10. [flang] Address name resolution problems (details)
  11. [llvm-mca] Test case was missing a triple. (details)
  12. [flang] Allow NULL() actual argument for pointer dummy (details)
  13. [libcxx] Check return value for asprintf() (details)
  14. [flang] Fix bogus error message with binding (details)
  15. [NFC] [TargetRegisterInfo] add another API to get srcreg through copy. (details)
  16. [RISCV] Add a VL output to vleff intrinsics. (details)
  17. [llvm-mca] Addressing build failures due to missing override specifiers (details)
  18. [mlir] Support FuncOpSignatureConversion for more FunctionLike ops. (details)
  19. [CodeGen][ObjC] Fix broken IR generated when there is a nil receiver (details)
  20. [AMDGPU] Test case demonstrating issues with generation of .debug_frame (details)
  21. [PowerPC] Duplicate inherited heuristic from base scheduler (details)
  22. [Inlining] Delete redundant optnone/alwaysinline check (details)
  23. [RISCV] Add intrinsics for RVV 1.0 vrgatherei16 (details)
  24. [RISCV] Add intrinsics for vector unordered indexed load in RVV 1.0 (details)
  25. [RISCV] Add intrinsics for RVV1.0 VFRSQRTE7 & VFRECE7 (details)
  26. [AArch64][GlobalISel] Make G_USUBO legal and select it. (details)
  27. [RISCV] Don't create LMUL=8 pseudo instructions for ternary widening arithmetic instructions (details)
  28. [RISCV] Correct DWARF number for vector registers. (details)
  29. [NewPM][opt] Run the "default" AA pipeline by default (details)
  30. [CodeGen] Use llvm::append_range (NFC) (details)
  31. [llvm] Don't include StringSwitch.h where unnecessary (NFC) (details)
  32. [llvm] Use isDigit (NFC) (details)
  33. [mlir] Enable passing crash reproducer stream factory method (details)
  34. Revert "[NewPM][opt] Run the "default" AA pipeline by default" (details)
  35. [AMDGPU][Inliner] Remove amdgpu-inline and add a new TTI inline hook (details)
  36. [NFC] Disallow unused prefixes under llvm/test (details)
  37. [ASTReader] Allow controlling separately whether validation should be disabled for a PCH vs a module file (details)
  38. [JITLink][ELF/x86-64] Range check 32-bit relocs. (details)
  39. [NewPM][opt] Run the "default" AA pipeline by default (details)
  40. [test] Make incorrect-exit-count.ll work under NPM (details)
  41. [mlir][Linalg] Introduce linalg.pad_tensor op. (details)
  42. [mlir][StandardToSPIRV] Add support for lowering uitofp to SPIR-V (details)
  43. [AArch64][GlobalISel] Implement widenScalar for signed overflow (details)
  44. [TargetLowering] Simplify some code in SimplifySetCC that tries to handle SIGN_EXTEND_INREG operand types that should never happen. NFCI (details)
  45. [AMDGPU] Test clean up (NFC) (details)
  46. Update filename to workers.py file in documentation (details)
  47. NFC: Remove simple_ilist comment mentioning ilist/iplist allocating (details)
  48. [TargetLowering] Use getBoolConstant instead of assuming zero or one for boolean contents. (details)
  49. [clang][cli] Port visibility LangOptions to marshalling system (details)
  50. [RISCV] Fix intrinsic CodeGen test cases for vrgather (details)
  51. [AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses. (details)
  52. [APSInt][NFC] Clean up doxygen comments (details)
  53. [SVE] Add support for scalable vectorization of loops with selects and cmps (details)
  54. [LegacyPM] Update InversedLastUser on the fly. NFC. (details)
  55. [JITLink][ELF/x86-64] Add support for weak and hidden symbols. (details)
  56. Fix build failure caused by 2e080eb00ad76654313e0e119bb7fa0ffe2f9866 (details)
  57. [X86][SSE] Add v16i8 02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu shuffle test (details)
  58. [X86][SSE] Add PR48823 HSUB test case (details)
  59. [AMDGPU] Implement mir parseCustomPseudoSourceValue (details)
  60. [gn build] Port 8214982b5042 (details)
  61. [IR] Optimize adding attribute to AttributeList (NFC) (details)
  62. [ARM] Add new and regenerate SSAT tests. NFC (details)
  63. [clangd] Add documentation for building and testing clangd (details)
  64. [ARM] Adjust isSaturatingConditional to return a new SDValue. NFC (details)
  65. [X86][SSE] Don't fold shuffle(binop(),binop()) -> binop(shuffle(),shuffle()) if the shuffle are splats (details)
  66. [DAG] Commute shuffle(splat(A,u), shuffle(C,D)) -> shuffle'(shuffle(C,D), splat(A,u)) (details)
  67. [NFC] Add CMakeUserPresets.json filename to .gitignore (details)
  68. Revert "[clang] Suppress "follow-up" diagnostics on recovery call expressions." (details)
  69. Don't delete default constructor of PathDiagnosticConsumerOptions (details)
  70. [clang][Tooling] Get rid of a hack in SymbolOccurrences, NFCI (details)
  71. [SLP] do not traverse constant uses (details)
  72. [X86][AVX] combineX86ShufflesRecursively - attempt to constant fold before widening shuffle inputs (details)
  73. [clangd][SwapIndex] ensure that the old index is alive while we are using it via the function returned by `SwapIndex::indexedFiles()` call (details)
  74. [clangd] Inject context provider rather than config into ClangdServer. NFC (details)
  75. [LTO] Add support for existing Config::Freestanding option. (details)
  76. Avoid fragile type lookups in GDB pretty printer (details)
  77. [ARM] Disable sign extended SSAT pattern recognition. (details)
  78. [clang][ASTImporter] Add support for importing CXXFoldExpr. (details)
  79. [SimplifyCFG] FoldBranchToCommonDest(): don't deal with unconditional branches (details)
  80. [NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't deal with uncond branches (details)
  81. [NFC][SimplifyCFG] FoldBranchToCommonDest(): unclutter Cond/CondInPred handling (details)
  82. [NFC][SimplifyCFG] FoldBranchToCommonDest(): somewhat better structure weight updating code (details)
  83. [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract check for destination sharing into a helper function (details)
  84. [NFC][SimplifyCFG] FoldBranchToCommonDest(): extract the actual transform into helper function (details)
  85. [NFC][InstCombine] Extract freelyInvertAllUsersOf() out of canonicalizeICmpPredicate() (details)
  86. [NFC][InstCombine] Add tests for `(~x) &/| y` --> `~(x |/& (~y))` fold (details)
  87. [InstCombine] Fold `(~x) & y` --> `~(x | (~y))` iff it is free to do so (details)
  88. [InstCombine] Fold `(~x) | y` --> `~(x & (~y))` iff it is free to do so (details)
  89. Revert "[NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't deal with uncond branches" (details)
  90. [libomptarget][devicertl] Drop templated atomic functions (details)
  91. [coro.async] Make sure we process async coroutines (details)
  92. [LoopUnswitch] Add test cases with atomic loads & call (details)
  93. [LoopUnswitch] Fix logic to avoid unswitching with atomic loads. (details)
  94. [flang] Fix typo in error message (details)
  95. [X86][AVX] combineTargetShuffle - simplify the X86ISD::VPERM2X128 subvector matching (details)
  96. [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle unary vperm2x128(permute/shift(x,c),undef) cases (details)
  97. [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle vperm2x128(movddup(x),movddup(y)) cases (details)
  98. [SystemZ][z/OS] Fix No such file or directory expression error (details)
  99. [HIP] Support __managed__ attribute (details)
  100. [MLIR] Add support for extracting an integer sample point (if one exists) from an unbounded FlatAffineConstraints. (details)
  101. [mlir][StandardOps] Fix typos in the td file. (details)
  102. [ELF] --wrap: retain __wrap_foo if foo is defined in an object/bitcode file (details)
  103. [OpenMP] libomp: properly initialize buckets in __kmp_dephash_extend (details)
  104. [libc++] Fix broken build when merging libc++abi into libc++ on Apple (details)
  105. [llvm-mca] Adding local lit config file for X86 targets (details)
  106. [mlir] Add coro intrinsics operations to LLVM dialect (details)
  107. [LLDB] Fix how ObjCBOOLSummaryProvider deals with BOOL (details)
  108. [mlir][spirv] Fix script for availability autogen and refresh ops (details)
  109. [flang] Remove some needless operations in expr rewriting (details)
  110. [mlir][spirv] Define spv.IsNan/spv.IsInf and add lowerings (details)
  111. [InstCombine] add tests for abs(sext X); NFC (details)
  112. [InstCombine] narrow abs with sign-extended input (details)
  113. [flang] Correct shape analysis for transformational intrinsic functions (details)
  114. [SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests - continued (details)
  115. [flang][nfc] Fix comments, remove needless API, tweak script (details)
  116. [CSSPGO] LTO option for pseudo probe (details)
  117. [mlir][Linalg] NFC: Refactor LinalgDependenceGraphElem to allow (details)
  118. [NFC][libc++] Update the implementation status. (details)
  119. [mlir][Linalg] Extend tile+fuse to work on Linalg operation on tensors. (details)
  120. Add more explicit assert for failures (details)
  121. [libc++] Bring back mach_absolute_time implementation of steady_clock (details)
  122. [SimplifyLibCalls] Skip unused calls in sincos transform (details)
  123. Remove obsolete TODOs (details)
  124. [mlir][OpFormatGen] Add support for anchoring optional groups with types (details)
  125. [CodeGen] Use getCharWidth() more consistently in CGRecordLowering. NFC (details)
  126. [CGExpr] Use getCharWidth() more consistently in CCGExprConstant. NFC (details)
  127. [libc++] Introduce __bits (details)
  128. [NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0 (details)
  129. [Tests] Add willreturn to libcalls in some tests (details)
  130. [RISCV] Rename pcnt->cpop to match 0.93 bitmanip spec. (details)
  131. [RISCV] Remove addiwu, addwu, subwu, subuw, clmulw, clmulrw, clmulhw to match 0.93 bitmanip spec. (details)
  132. [RISCV] Swap encodings of max and minu to match 0.93 bitmanip spec. (details)
  133. [RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93 bitmanip spec. (details)
  134. [RISCV] Add Zba feature and move add.uw and slli.uw to it. (details)
  135. [RISCV] Add SH*ADD(.UW) instructions to Zba extension based on 0.93 bitmanip spec. (details)
  136. [RISCV] Move Shift Ones instructions from Zbb to Zbp to match 0.93 bitmanip spec. (details)
  137. [RISCV] Rename Zbs instructions to start with just 'b' instead of 'sb' to match 0.93 bitmanip spec. (details)
  138. [RISCV] Modify add.uw patterns to put the masked operand in rs1 to match 0.93 bitmanip spec. (details)
  139. [RISCV] Change zext.w to be an alias of add.uw rd, rs1, x0 instead of pack. (details)
  140. [RISCV] Move pack instructions to Zbp extension only. (details)
  141. [RISCV] Add zext.h instruction to Zbb. (details)
  142. [RISCV] Add support for rev8 and orc.b to Zbb. (details)
  143. [RISCV] Add xperm.* instructions to Zbp extension. (details)
  144. [RISCV] Update B extension version to 0.93. (details)
  145. [mlir][Linalg] Disable fusion of tensor_reshape op by expansion when unit-dims are involved (details)
  146. [InstSimplify] Add willreturn to more libcall tests (NFC) (details)
  147. [Analysis] Support AIX vec_malloc routines (details)
  148. [RISCV] Add isel patterns for SH*ADD(.UW) (details)
  149. [Inline] Precommit tests for dead calls and willreturn. (details)
  150. [gn build] Port 622eaa4a4cea (details)
  151. [lld-macho] Ignore -lto_library (details)
  152. [RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted in RV32. (details)
  153. [GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method (details)
  154. [VFS] Fix inconsistencies between relative paths and fallthrough. (details)
  155. [NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): fix instruction name preservation (details)
  156. [NFC][SimplifyCFG] fold-branch-to-common-dest.ll: reduce complexity of @pr48450* test (details)
  157. [NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): move instruction cloning to after CFG update (details)
  158. [SimplifyCFG] FoldBranchToCommonDest(): re-lift restrictions on liveout uses of bonus instructions (details)
  159. Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method" (details)
  160. Revert "[AArch64][GlobalISel] Implement widenScalar for signed overflow" (details)
  161. Revert "[AArch64][GlobalISel] Make G_USUBO legal and select it." (details)
  162. [Matrix] Propagate shape information through fneg (details)
  163. [mlir][Linalg] Make Fill operation work on tensors. (details)
  164. [RISCV] Add more cmov isel patterns to handle seteq/ne with a small non-zero immediate. (details)
  165. [RGT][ADT] Remove test assertion that will not be executed (details)
  166. [lldb] FixFileSystem::GetExternalPath for VFS API change (details)
  167. [RGT] Don't use EXPECT* macros in a subprocess that exits by signalling (details)
  168. [RGT][TextAPI] Remove a zero-trip loop and the assertions within it (details)
  169. [CodeComplete] Add ranged for loops code pattern. (details)
  170. PR47682: Merge the DeclContext of a merged FunctionDecl before we inherit (details)
  171. Change materializeFrameBaseRegister() to return register (details)
  172. [AMDGPU] Fix FP materialization/resolve with flat scratch (details)
  173. Change static buffer to be BSS instead of DATA in HandlePacket_qSpeedTest (details)
  174. [libomptarget] Build cuda plugin without cuda installed locally (details)
  175. ADT: Use 'using' to inherit assign and append in SmallString (details)
  176. [LoopDeletion] Handle inner loops w/untaken backedges (details)
  177. [RISCV] Implement vloxseg/vluxseg intrinsics. (details)
  178. [RISCV] Add RV32 test cases for vluxseg. (details)
  179. [RISCV] Add RV64 test cases for vluxseg. (details)
  180. [RISCV] Add RV32 test cases for vloxseg. (details)
  181. [RISCV] Add RV64 test cases for vloxseg. (details)
  182. [RISCV] Implement vsoxseg/vsuxseg intrinsics. (details)
  183. [RISCV] Add RV32 test cases for vsuxseg. (details)
  184. [RISCV] Add RV64 test cases for vsuxseg. (details)
  185. [RISCV] Add RV32 test cases for vsoxseg. (details)
  186. [RISCV] Add RV64 test cases for vsoxseg. (details)
  187. [OpenMP] Remove unnecessary pointer checks in a few locations (details)
  188. [InstCombine] remove incompatible attribute when simplifying some lib calls (details)
  189. Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it." (details)
  190. [ELF][test] Add a test about --exclude-libs applying to version symbols (details)
  191. [test] Add -mtriple (details)
  192. [LSan] Introduce a callback mechanism to allow adding data reachable from ThreadContexts to the frontier. (details)
  193. [TargetLowering] Use isOneConstant to simplify some code. NFC (details)
  194. [Coroutine] Improve coro-elide-musttail.ll test (details)
  195. [PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets (details)
  196. [Analysis] Use llvm::append_range (NFC) (details)
  197. [llvm] Use isAlpha/isAlnum (NFC) (details)
  198. [llvm] Use static_assert instead of assert (NFC) (details)
  199. [ASan] Stop blocking child thread progress from parent thread in `pthread_create` interceptor. (details)
  200. [llvm-link] Fix for an assertion when linking global with appending linkage (details)
  201. [RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer (details)
  202. [Support] TrigramIndex::insert - pass std::String argument by const reference. NFCI. (details)
  203. [InlineFunction] Use llvm.experimental.noalias.scope.decl for noalias arguments. (details)
  204. [LTO] Store target attributes as vector of strings (NFC). (details)
  205. [LSR] Add test for PR46943 (NFC) (details)
  206. [Clang] Move assembler into a separate file (details)
  207. [gn build] Port 2325157c0568 (details)
  208. [SimplifyCFG] Change 'LoopHeaders' to be ArrayRef<WeakVH>, not a naked set, thus avoiding dangling pointers (details)
  209. Revert "[Clang] Move assembler into a separate file" (details)
  210. [gn build] Port 0057cc5a215e (details)
  211. [lldb/Lua] add initial Lua typemaps (details)
  212. [lldb/Lua] add 'Lua' before naming versions (details)
  213. [AVR] Optimize 8-bit logic left/right shifts (details)
  214. [Local] Treat calls that may not return as being alive. (details)
  215. [SLP] add reduction test with mixed fast-math-flags; NFC (details)
  216. [SLP] fix fast-math-flag propagation on FP reductions (details)
  217. [AVR] Optimize 16-bit comparison with constant (details)
  218. [ASan] Fix broken Windows build due to 596d534ac3524052df210be8d3c01a33b2260a42. (details)
  219. [libc++] Implements concept destructible (details)
  220. [InstCombine] Set MadeIRChange in replaceInstUsesWith. (details)
  221. [llvm] Forward-declare ICFLoopSafetyInfo (NFC) (details)
  222. [Target] Use llvm::append_range (NFC) (details)
  223. [llvm] Use pop_back_val (NFC) (details)
  224. [Polly] Gist new access relations using the SCoP context. (details)
  225. [Polly] Clean up hasFeasibleRuntimeContext. (details)
  226. [Polly] Allow param sets for dumpPw(). (details)
  227. [Polly] Track defined behavior for PHI predecessor computation. (details)
  228. [FuzzMutate] Add mutator to modify instruction flags. (details)
  229. [libc++] Remove invalid C++20 code from a test. (details)
  230. Revert "[Target] Use llvm::append_range (NFC)" (details)
  231. [Clang][OpenMP][NVPTX] Replace `libomptarget-nvptx-path` with `libomptarget-nvptx-bc-path` (details)
  232. [SimplifyCFG] Regenerate test checks (NFC) (details)
  233. [PhaseOrdering] Add tests for PR44461 and PR48844 (NFC) (details)
  234. [libomptarget][cuda] Call v2 functions explicitly (details)
  235. [test] Pin dead-calls-willreturn.ll to legacy PM (details)
  236. [NewPM][opt] Make -enable-new-pm default to LLVM_ENABLE_NEW_PASS_MANAGER (details)
  237. [IR] Add NoAliasScopeDeclInst (NFC) (details)
  238. [NFC][SimplifyCFG] Extract PerformValueComparisonIntoPredecessorFolding() out of FoldValueComparisonIntoPredecessors() (details)
  239. [NFC][SimplifyCFG] Perform early-continue in FoldValueComparisonIntoPredecessors() per-pred loop (details)
  240. [NFC][SimplifyCFG] Extract CloneInstructionsIntoPredecessorBlockAndUpdateSSAUses() out of PerformBranchToCommonDestFolding() (details)
  241. [mlir][CAPI] Add result type inference to the CAPI. (details)
  242. [libomptarget][amdgpu][nfc] Update comments (details)
  243. [RISCV] Add isel patterns to remove (and X, 31) from sllw/srlw/sraw shift amounts. (details)
  244. [RISCV] Add test cases for SRO/SLO with shift amounts masked to bitwidth-1. NFC (details)
  245. [RISCV] Add isel patterns to remove masks on SLO/SRO shift amounts. (details)
  246. [SystemZ][ZOS] Provide PATH_MAX macro for libcxx (details)
  247. [RISCV] Group some Zbs isel patterns together and remove a stale comment. NFC (details)
  248. [OpenMPIRBuilder] Implement tileLoops. (details)
  249. [OpenMPIRBuilder] Silence compiler warning. NFC. (details)
  250. [AVR] Optimize 8-bit int shift (details)
  251. [JITLink] Use edge kind names for fixups in EHFrameEdgeFixer. (details)
  252. [RISCV] Make the code in MatchSLLIUW ignore the lower bits of the AND mask where the shift has guaranteed zeros. (details)
  253. [ValueTracking] Don't assume readonly function will return (details)
  254. [libomptarget][nvptx] Replace cuda atomic primitives with clang intrinsics (details)
  255. [examples] Fix "Target does not support MC emission!" in HowToUseJIT example. (details)
  256. [LoopUnroll] Use llvm.experimental.noalias.scope.decl for duplicating noalias metadata as needed (details)
  257. [LoopRotate] Use llvm.experimental.noalias.scope.decl for duplicating noalias metadata as needed (details)
  258. [InstCombine] Remove unused llvm.experimental.noalias.scope.decl (details)
  259. [AArch64] Saturating add cost tests. NFC (details)
  260. Fix x86 exegesis tests after c042aff8860df3cad2b274bf0a495e83ae36ddee (details)
  261. [SLP] fix fast-math requirements for fmin/fmax reductions (details)
  262. [LTO] Move DisableVerify setting to LTOCodeGenerator class (NFC). (details)
  263. [CostModel] Tests for showing the cost of intrinsics from the vectorizer. NFC (details)
  264. [Utils] Use NoAliasScopeDeclInst in a few more places (NFC) (details)
  265. [OpenMP] Fixed test environment of `check-libomptarget-nvptx` (details)
  266. [libomptarget][cuda] Fix build, change missed from D95274 (details)
  267. [RISCV] Use SRLIWPat in the PACKUW pattern. (details)
  268. [CodeGen] Forward-declare TargetMachine (NFC) (details)
  269. [Target] Use llvm::append_range (NFC) (details)
  270. [llvm] Use pop_back_val (NFC) (details)
  271. [lldb] Add -Wl,-rpath to make tests run with fresh built libc++ (details)
  272. Implement vAttachOrWait (details)
  273. [RISCV] Fix name of Zba extension (NFC) (details)
  274. [ARM] Extra MVE unaligned VLDn tests. NFC (details)
  275. [RISCV] Add test cases for missed opportunities to use fcvt.*.w(u) instructions on RV64 when input is known to be extended from i8/i16. (details)
  276. [RISCV] Add test cases for missed opportunities to use *W instructions for div/rem when inputs are sign/zero extended from i8/16 instead of i32. (details)
  277. [RISCV] Use bitsLE instead of strict == MVT::i32 in assertsexti32 and assertzexti32. (details)
  278. [RISCV] Add support for Zvamo/Zvlsseg to driver (details)
  279. [AMDGPU] Fix llvm.amdgcn.init.exec and frame materialization (details)
  280. Suppress non-conforming GNU paste extension in all standard-conforming modes (details)
  281. [PowerPC] support register pressure reduction in machine combiner. (details)
  282. Fix sign-comparison warnings in unit test EXPECTs (details)
  283. lldb: Add support for printing variables with DW_AT_ranges on DW_TAG_subprograms (details)
  284. [mlir][Python] Roll up of python API fixes. (details)
  285. [clang][AVR] Improve avr-ld command line options (details)
  286. [NFC] [DAGCombine] Correct the result for sqrt even the iteration is zero (details)
  287. [JITLink] Enable exception handling for ELF. (details)
  288. [AArch64] Merge [US]MULL with half adds and subs into [US]ML[AS]L (details)
  289. [clang][cli] NFC: Move prefix to the front of BoolOption (details)
  290. [clang][cli] NFC: Pass CC1Option explicitly to BoolOption (details)
  291. Revert "[clang][AVR] Improve avr-ld command line options" (details)
  292. [clang-format] Add the possibility to align assignments spanning empty lines or comments (details)
  293. Revert "[clang-format] Add the possibility to align assignments spanning empty lines or comments" (details)
  294. [clang-format] Add the possibility to align assignments spanning empty lines or comments (details)
  295. Fix a build-bot failure. (details)
  296. [XRay] Make __xray_customevent support non-Linux (details)
  297. [XRay] Support DW_TAG_call_site and delete unneeded PATCHABLE_EVENT_CALL/PATCHABLE_TYPED_EVENT_CALL lowering (details)
  298. [libc++] Set CMAKE_FOLDER. NFC. (details)
  299. [RISCV] Implement new architecture extension macros (details)
  300. [RISCV] Add attribute support for all supported extensions (details)
  301. [AArch64] Add Cortex CPU subtarget features for instruction fusion. (details)
  302. [mlir][Linalg] Add a padding option to Linalg tiling (details)
  303. [clang] NFC: Remove else if after return (details)
  304. [lld][ELF][test] Add testing for IE/LD TLS weak undef references (details)
  305. [clang-format] [docs] Fix RST indentation. (details)
  306. [yaml2obj, obj2yaml] - Implement section header table as a special Chunk. (details)
  307. [clang] NFC: Remove else-after-return pattern from some files (details)
  308. [ObjectYAML] - An attempt to fix BB after commit of D95140. (details)
  309. [mlir] Perfectly forward ImplicitLocOpBuilder ctors to OpBuilder (details)
  310. [llvm-dwp] Automatically set the target triple (details)
  311. [SelectionDAG] Support scalable-vector splats in more cases (details)
  312. [OpenCL][Docs] Describe tablegen BIFs declarations. (details)
  313. [InstructionCost] Prevent InstructionCost being created with CostState. (details)
  314. [TableGen] RuleMatcher::defineComplexSubOperand avoid std::string copy. NFCI. (details)
  315. [X86][AVX] combineX86ShuffleChain - avoid bitcasts around insert_subvector() shuffle patterns. (details)
  316. [flang][driver] Remove newline in CompilerInvocation (details)
  317. [clang] Fix signedness in vector bitcast evaluation (details)
  318. [X86][AVX] LowerTRUNCATE - avoid bitcasts around extract_subvectors. (details)
  319. [SLPVectorizer] NFC: Migrate getVectorCallCosts to use InstructionCost. (details)
  320. [flang][driver] Update PP tests to use the new driver (details)
  321. [mlir][Linalg] Add a hoistPaddingOnTensors transformation (details)
  322. Revert "[clang] Fix signedness in vector bitcast evaluation" (details)
  323. [InstCombine] add tests for min/max intrinsics with extended values; NFC (details)
  324. [InstCombine] narrow min/max intrinsics with extended inputs (details)
  325. Add a --use-color option to clang-query to allow forcing the behavior (details)
  326. Revert "[SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests - continued" (details)
  327. Revert "[SystemZ][z/OS] Fix No such file or directory expression error" (details)
  328. [X86][AVX] combineX86ShuffleChainWithExtract - widen to at least original root size. NFCI. (details)
  329. [mlir][Linalg] Address missed review item (details)
  330. [clang] Fix a nullptr dereference bug on invalid code (details)
  331. [mlir][Linalg] Fix incorrect erase order (details)
  332. [NFC] Fix title comment typo and provide description for LLJIT example. (details)
  333. [mlir] Generalize OpFoldResult usage in ops with offsets, sizes and operands. (details)
  334. [VPlan] Handle scalarized values in VPTransformState. (details)
  335. [Doc][NFC] Fix Kaleidoscope links, typos and add blog posts for MCJIT (details)
  336. [clangd] Fix a crash when indexing invalid ObjC method declaration (details)
  337. [clangd] Allow diagnostics to be suppressed with configuration (details)
  338. [Verifier] enable and limit llvm.experimental.noalias.scope.decl dominance checking (details)
  339. [X86][AVX] Generalize vperm2f128/vperm2i128 patterns to support all legal 256-bit vector types (details)
  340. [Verifier] disable llvm.experimental.noalias.scope.decl dominance check. (details)
  341. [LLDB] Remove leftovers and typos from RegisterInfos_arm64_sve.h (details)
  342. [LLDB] Define AUXV_AT_HWCAP2 in AuxVector.h (details)
  343. [LLDB] Skip TestPlatformProcessConnect on arm/aarch64 buildbot (details)
  344. Revert "[JITLink] Enable exception handling for ELF." (details)
  345. [AMDGPU][MC] Improved errors handling for SDWA operands (details)
  346. [libomptarget] Compile with older cuda, revert D95274 (details)
  347. [libc++] Implement P0655R1 visit<R>: Explicit Return Type for visit (details)
  348. Revert "Fix unused variable in CoroFrame.cpp when building Release with GCC 10" (details)
  349. [OpenCL] Refactor of targets OpenCL option settings (details)
  350. [scudo][standalone] Enable death tests on Fuchsia (details)
  351. [libc++][doc] Update the release notes. (details)
  352. [RISCV] Use sign extend for i32 arguments and returns in makeLibCall on RV64. (details)
  353. [OpenMP][NFC] Fix SourceInfo.h variable names (details)
  354. [ARM] Use half directly for args/return types in test. NFC (details)
  355. [clang-format] add case aware include sorting (details)
  356. [libc++] Implement [P0769] "Add shift to algorithm" (shift_left, shift_right) (details)
  357. [Sema] Fix an assertion failure in -Wcompletion-handler (details)
  358. [libc++] [P0879] constexpr std::reverse, partition, *_permutation. (details)
  359. [clang] Add -fprofile-prefix-map (details)
  360. [mlir] Use more C99 comments in C API header files (details)
  361. [PowerPC] Add missing negate for VPERMXOR on little endian subtargets (details)
  362. [lld] Consistent help text for `--save-temps` (details)
  363. [SampleFDO] Report error when reading a bad/incompatible profile instead of (details)
  364. [mlir][Affine] Add support for multi-store producer fusion (details)
  365. [Win64] Ensure all stack frames are 8 byte aligned (details)
  366. [libc++] Fix build after 51faba35fd81fbd3af407a29c136895a718ccd96 (details)
  367. [RISCV] Custom type legalize i8/i16 UDIV/UREM/SDIV on RV64 so we can use divuw/remuw/divw. (details)
  368. [clangd][NFC] Simplify handing on methods with no params (details)
  369. [OpenMP][NVPTX] Rewrite CUDA intrinsics with NVVM intrinsics (details)
  370. [mlir] Add C API for IntegerSet (details)
  371. [GVN] do not repeat PRE on failure to split critical edge (details)
  372. [ThreadPlan] fix exec on Linux (details)
  373. [VPlan] Replace uses with new value in VPInstructionsToVPRecipe (NFC). (details)
  374. [lit] Use os.cpu_count() to cleanup TODO (details)
  375. Revert "[clangd][NFC] Simplify handing on methods with no params" (details)
  376. [ObjC][ARC] Annotate calls with attributes instead of emitting retainRV (details)
  377. [clang-format] [NFC] Use some constexpr StringRef (details)
  378. [clang-format] [NFC] Restructure getLineCommentIndentPrefix (details)
  379. [clang-format] [NFC] Remove unsued arguments (details)
  380. [clang-format] PR16518 Add flag to suppress empty line insertion before access modifier (details)
  381. [clang-format] [NFC] Rerun dump_format_style.py (details)
  382. libcxx: Try to fix build after D92044 (details)
  383. [gn build] Port e123cd674c02 (details)
  384. Reland"[clangd][NFC] Simplify handing on methods with no params" (details)
  385. [vscode] Improve runInTerminal and support linux (details)
  386. Fix SBDebugger::CreateTargetWithFileAndArch to accept LLDB_ARCH_DEFAULT. (details)
  387. Revert "[IndirectFunctions] Skip propagating attributes to address taken functions" (details)
  388. Fix 0f0462cacf34aa88ae71a13c4199c1b1e70f3ee6 (details)
  389. Revert "[lit] Use os.cpu_count() to cleanup TODO" (details)
  390. [YAML I/O] Fix bug in emission of empty sequence (details)
  391. [flang] Search for #include "file" in right directory (details)
  392. [flang] Fix errors in ISO_FORTRAN_ENV module for REAL128 (details)
  393. Revert "[ObjC][ARC] Annotate calls with attributes instead of emitting retainRV" (details)
  394. Recommit "[AArch64][GlobalISel] Implement widenScalar for signed overflow" (details)
  395. [clangd] ignore parallelism level for quick tasks (details)
  396. [mlir:Async] Add intermediate async.coro and async.runtime operations to simplify Async to LLVM lowering (details)
  397. Fix 0f0462cacf34aa88ae71a13c4199c1b1e70f3ee6 (details)
  398. [RISCV] Add RVV insertelt/extractelt scalable-vector patterns (details)
  399. [LSR] Drop potentially invalid nowrap flags when switching to post-inc IV (PR46943) (details)
  400. [clangd] Allow configuration database to be specified in config. (details)
  401. Follow on to: f05dc40c31d1883b46b8bb60547087db2f4c03e3 (details)
  402. Restore GNU , ## __VA_ARGS__ behavior in MSVC mode (details)
  403. Fix runInTerminal errors on ARM (details)
  404. Fix -Wmissing-override in lldb (details)
  405. Support: Remove duplicated code in {File,clang::ModulesDependency}Collector, NFC (details)
  406. [clang][Fuchsia] Add relative-vtables + asan multilibs (details)
  407. [OpenMP][deviceRTLs] Remove omp_is_initial_device (details)
  408. [InlineAdvisor] Allow replay of inline decisions for the CGSCC inliner from optimization remarks (details)
  409. [lldb/Lua] add support for Lua function breakpoint (details)
  410. [AMDGPU] Added -mcpu=tahiti to 3 tests. NFC. (details)
  411. [NFC] Disallow unused prefixes in clang/test/Analysis (details)
  412. [lld-macho] Link against ObjCARCOpts instead of ObjCARC (details)
  413. AMDGPU: Reduce the number of expensive calls in SIFormMemoryClause (details)
  414. [RISCV] Add isel patterns to optimize slli.uw patterns without Zba extension. (details)
  415. Revert "Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method"" (details)
  416. DebugInfo: Generalize the .debug_addr minimization flag to pave the way for including other strategies (details)
  417. [libc++] Support immovable return types in std::function. (details)
  418. [TargetLowering][RISCV] Don't transform (seteq/ne (sext_inreg X, VT), C1) -> (seteq/ne (zext_inreg X, VT), C1) if the sext_inreg is cheaper (details)
  419. ExpressionParser: Migrate to FileEntryRef in ParseInternal, NFC (details)
  420. [mlir:Async] Use LLVM coro operations in async.coro lowering (details)
  421. [JITLink] Re-apply 6884fbc2c4f (ELF eh support) with fix for broken test case. (details)
  422. SourceManager: Unify FileEntry/FileEntryRef versions of createFileID (details)
  423. SourceManager: Migrate to FileEntryRef in getOrCreateContentCache, NFC (details)
  424. [x86] Fix trivial typo in emmintrin.h (details)
  425. [lit] Update lit.py shebang for Python3 (details)
  426. [GlobalISel][Localizer] Don't localize phi operands which are used more than once in the phi. (details)
  427. Frontend: Take VFS and MainFileBuffer by reference in PrecompiledPreamble::CanReuse, NFC (details)
  428. [libcxx] random_device, for OpenBSD specify optimal entropy properties (details)
  429. Revert "Fix SBDebugger::CreateTargetWithFileAndArch to accept LLDB_ARCH_DEFAULT." (details)
  430. [llvm-link] Fix crash when materializing appending global (details)
  431. [X86] Correct some cross references in avxintrin.h. (details)
  432. [libomptarget][cuda] Gracefully handle missing cuda library (details)
  433. [PowerPC] Do not emit HW loop with half precision operations (details)
  434. [JITLink] Disable ELF_ehframe_basic.s test on Windows. (details)
  435. [Test][AArch64] Move overflow add/sub tests to their own file. NFC (details)
  436. [Test][AArch64] Add s32 legalizer test for UADDE/USUBE (details)
  437. Revert "[libomptarget][cuda] Gracefully handle missing cuda library" (details)
  438. [OpenMP] Added the support for hidden helper task in RTL (details)
  439. [TableGen] Use llvm::append_range (NFC) (details)
  440. [StackSafety] Use ListSeparator (NFC) (details)
  441. [AMDGPU] Forward-declare MachineIRBuilder (NFC) (details)
  442. [RISCV] Implement vlsegff intrinsics. (details)
  443. [RISCV] Update V extension to v1.0-draft 08a0b464. (details)
  444. [OpenMP][FIX] Enforce a function boundary for a new data environment (details)
  445. [OpenMP] Add source location information to the libomptarget profile (details)
  446. [mlir][Python] Fix comments of 'getCapsule' and 'createFromCapsule' (details)
  447. [Object][WebAssembly] Update format of error messages (details)
  448. Revert "[WebAssembly] MC layer writes table symbols to object files" (details)
  449. Add vp2intersect to AVX512 dialect. (details)
  450. [clang][cli] NFC: Simplify BoolOption API (details)
  451. [RISCV] Define different pseudo instructions for different FPR. (details)
  452. [clang][cli] Store LangStandard::Kind in LangOptions (details)
  453. [clang][cli] Port GNU language options to marshalling system (details)
  454. [clang][cli] Accept strings instead of options in ImpliedByAnyOf (details)
  455. [clangd] Fix filename completion at the end of file (details)
  456. [NFC] Refine some uninitialized used variables. (details)
  457. [RISCV] Adjust RISCVInstrInfoVSDPatterns.td for different pseudo instructions for different FPR. (details)
  458. [libObject,llvm-readelf/obj] - Don't use @@ when printing versions of undefined symbols. (details)
  459. [clangd] Add include-fixer fixit for no_member_template diagnostic. (details)
  460. [llvm-nm][ELF] - Use @@ prefix when printing default versions. (details)
  461. [yaml2obj] - Refine how we set the sh_link field. NFCI. (details)
  462. [clang][cli] Port GPU-related language options to marshalling system (details)
  463. [LLDB][test] - Fix test after yaml2obj change. (details)
  464. [update_llc_test_checks] Support AVR (details)
  465. [llvm-nm] Silence a gcc warning about a stray semicolon. NFC. (details)
  466. [yaml2obj][obj2yaml] - Improve how we set/dump the sh_entsize field. (details)
  467. [mlir:async] Use ODS to define async types (details)
  468. Revert "[clang-format] add case aware include sorting" (details)
  469. [SVE] Fix some logical arithmetic tests (details)
  470. [mlir] Async: add a separate pass to lower from async to async.coro and async.runtime (details)
  471. [AMDGPU][MC] Refactored exp tgt handling (details)
  472. [LLD][ELF][AArch64] Add support for R_AARCH64_LD64_GOTPAGE_LO15 relocation (details)
  473. [mlir] drop unused statics (details)
  474. [LIBOMPTARGET]FIX define declaration, NFC (details)
  475. [JITLink][ELF/x86-64] When building PLT stub, use -4 offset for PCRel32. (details)
  476. [ORC] Fix debug logging message. (details)
  477. Remove requirement for -maltivec to be used when using -mabi=vec-extabi or -mabi=vec-default when not using vector code (details)
  478. Revert "[flang] Search for #include "file" in right directory" (details)
  479. [ORC] Attempt to auto-claim responsibility for weak defs in ObjectLinkingLayer. (details)
  480. [Passes] Run peeling as part of simple/full loop unrolling. (details)
  481. [AMDGPU] Fix use of HasModifiers in VopProfile (details)
  482. [AMDGPU] Add IntrWillReturn to three intrinsics (details)
  483. [CostModel] Handle CTLZ and CCTZ in getTypeBasedIntrinsicInstrCost (details)
  484. Fix signed/unsigned comparison warning. NFCI. (details)
  485. [LoopUnswitch] Add some additional tests. (details)
  486. [LoopUnswitch] Avoid partially unswitching too aggressively. (details)
  487. AMDGPU: Clear IsSSA property in SIFormMemoryClauses (details)
  488. [libomptarget][NFC] Fixed obsolete function names in comments (details)
  489. [AMDGPU] Fix null-dereference static analysis warnings. NFCI. (details)
  490. [Sema] diagnoseEquivalentInternalLinkageDeclarations - assert for non-null NamedDecl. NFCI. (details)
  491. [mlir][nfc] Move `getInnermostParallelLoops` to SCF/Transforms/Utils.h. (details)
  492. [NFC] Disallow unused prefixes under clang/test/CodeGen (details)
  493. [AMDGPU] HSAMD::fromString - replace std::string arg with StringRef. NFCI. (details)
  494. Fix null dereference static analysis warning. NFCI. (details)
  495. [LoopUtils] do not initialize Cmp predicate unnecessarily; NFC (details)
  496. [LoopVectorize] add test for fmin/fmax FMF propagation; NFC (details)
  497. [mlir] Add Python bindings for IntegerSet (details)
  498. [clangd] Add std::size_t to StdSymbol mapping (details)
  499. [lldb] Remove unused ThreadPlanStack::GetStackOfKind (NFC) (details)
  500. [OpenMP][deviceRTLs] Build the deviceRTLs with OpenMP instead of target dependent language (details)
  501. AMDGPU: Add assertion to determineCalleeSaves (details)
  502. AMDGPU: Fix redundant FP spilling/assert in some functions (details)
  503. [mlir] Set CUDA/ROCm context before creating resources. (details)
  504. [lldb][NFC] Another attempt to fix GCC 5.x compilation (details)
  505. Reland "[lit] Use os.cpu_count() to cleanup TODO" (details)
  506. [mlir] sret and byval now require a type argument when constructed. (details)
  507. [RISCV] Have customLegalizeToWOp truncate to the original type instead of i32 now that we use it for i8/i16 as well. (details)
  508. [ARM] [ELF] Fix ARMMaterializeGV for Indirect calls (details)
  509. [clangd] Selection handles CXXBaseSpecifier (details)
  510. [clangd] FindTarget resolves base specifier (details)
  511. [libomptarget][devicertl][amdgpu] Fix build, variable renaming error (details)
  512. Support for instrumenting only selected files or functions (details)
  513. [gn build] Port 4edf35f11a9e (details)
  514. [OpenMP][Libomptarget] Introduce changes to support remote plugin (details)
  515. [AMDGPU] Update subtarget features for new target ID support (details)
  516. CGDebugInfo: Drop Loc.isInvalid() special case from getLineNumber (details)
  517. CGDebugInfo CreatedLimitedType: Drop file/line for RecordType with invalid location (details)
  518. [flang][openacc][NFC] Organize clause validity tests by directive (details)
  519. Make SBDebugger::CreateTargetWithFileAndArch work with lldb::LLDB_DEFAULT_ARCH (details)
  520. Revert "Support for instrumenting only selected files or functions" (details)
  521. Add -fbinutils-version= to gate ELF features on the specified binutils version (details)
  522. [libc++] Fix oss-fuzz build (details)
  523. [llvm-elfabi] Support ELF file that lacks .gnu.hash section (details)
  524. [OpenMP][Libomptarget] Introduce Remote Offloading Plugin (details)
  525. [libomptarget][cuda] Only run tests when sure there is cuda available (details)
  526. [libomptarget][cuda] Gracefully handle missing cuda library (details)
  527. [llvm-elfabi] Fix test after D95140 (details)
  528. [gn build] Port 1e634f3952aa (details)
  529. [OpenMP][Libomptarget] Fix cmake error on remote plugin (details)
  530. [GlobalISel][IRTranslator] Ignore the llvm.experimental.noalias.scope.decl intrinsic. (details)
  531. [NFC][lit] Cleanup code using string interpolation (details)
  532. [X86] In shrinkAndImmediate, place the new constant into the topological sort. (details)
  533. [NFC] Show instcombine powi simplifications drop FMF (details)
  534. [InstCombine] Preserve FMF for powi simplifications. (details)
  535. [libomptarget][NFC] Use portable printf format specifiers. (details)
  536. [NewPM] Add ExtraVectorizerPasses support (details)
  537. [ARM] Fix STRT/STRHT/STRBT input/output operands. (details)
  538. Frontend: Fix memory leak in CompilerInstance::setVerboseOutputStream (details)
  539. Salvage debug info for function arguments in coro-split funclets. (details)
  540. [GlobalISel] Implement computeKnownBits for G_SEXT_INREG (details)
  541. Frontend: Simplify handling of non-seeking streams in CompilerInstance, NFC (details)
  542. [llc] Add reportError helper and canonicalize error messages (details)
  543. Frontend: Fix layering between create{,Default}OutputFile, NFC (details)
  544. [libomptarget][NFC] Avoid gcc 5/6 issue with lambda captures. (details)
  545. llvm-lib: Pull error printing code out of two functions (details)
  546. Disable rosegment for old Android versions. (details)
  547. [gn build] restore build command removed in 9595a7ff55b6 for platforms without prebuilts (details)
  548. [gn build] fix get.py change (details)
  549. [libomptarget][cuda] Handle missing _v2 symbols gracefully (details)
  550. [OpenMP] Modify OMP_ALLOCATOR environment variable (details)
  551. [libc++] Give `MoveOnly` all six comparison operators, not just == and <. (details)
  552. Support for instrumenting only selected files or functions (details)
  553. [RISCV] Add rv64 run lines to rv32 MC layer tests for B extension (details)
  554. [OpenMP][NVPTX] Drop dependence on CUDA to build NVPTX `deviceRTLs` (details)
  555. [gn build] Port bb9eb1982980 (details)
  556. Rename clang/test/Frontend/output-{failures,paths}.c, NFC (details)
  557. Frontend: Use early returns in CompilerInstance::clearOutputFiles, NFC (details)
  558. Bump the trunk major version to 13 (details)
  559. [TableGen] Add isContradictoryImpl implementation to CheckCondCodeMatcher and CheckChild2CondCodeMatcher. (details)
  560. [AMDGPU] Forward-declare TargetRegisterClass (NFC) (details)
  561. [MemorySSA] Use ListSeparator (NFC) (details)
  562. [llvm-objdump] Use append_range (NFC) (details)
  563. [mlir][Linalg] Add canonicalization for init_tensor -> subtensor op. (details)
  564. [clang][cli] Port LangOpts to marshalling system, pt.1 (details)
  565. [clang-format] Avoid considering include directive as a template closer. (details)
  566. Fix an error about implicit fallthrough during self build - new tag for ittapi. (details)
  567. [mlir] Extend semantic of OffsetSizeAndStrideOpInterface. (details)
  568. [clang][cli] Port LangOpts to marshalling system, pt.2 (details)
  569. [OpenMP] libomp: fix build by clang-cl with vs2019 (details)
  570. [libc][NFC] Use a end of list marker for cpu feature detection. (details)
  571. [clang] Fix signedness in vector bitcast evaluation (details)
  572. [AArch64][GlobalISel] Make G_SADDE and G_SSUBE legal (details)
  573. [Test][AArch64] Use named vregs in overflow legalization tests. NFC (details)
  574. [ARM] Add neon FP16 scalar_to_vector patterns. (details)
  575. [AMDGPU] Write "GFX6-GFX9" instead of "GFX6-9" in docs (details)
  576. Fix "not all control paths return a value" warning. NFCI. (details)
  577. [flang][driver] Report prescanning diags during syntax-only parsing (details)
  578. [RISCV] Fix a codegen crash in getSetCCResultType (details)
  579. [AArch64] Add vector saturating add intrinsic costs (details)
  580. [MachineLICM][MachineSink] Move SinkIntoLoop to MachineSink. (details)
  581. [clang][AST] Encapsulate DeclarationNameLoc, NFCI (details)
  582. [SCEV] Fix incorrect loop exit count analysis. (details)
  583. clang-cl: Add /winsdkdir and /winsdkversion flags (details)
  584. [analyzer] NFC: Introduce reusable bug category for "C++ move semantics". (details)
  585. [OpenCL][Docs] Moved info from UsersManual into OpenCLSupport. (details)
  586. [DWARF] Create subprogram's DIE in DISubprogram's unit (details)
  587. [lldb] Add move_iterator to supported template list (details)
  588. [mlir:async] Fix deadlock in async runtime await-and-execute functions (details)
  589. [LoopUnswitch] Add test cases not partially unswitched due to cost. (details)
  590. [clang][cli] Port OpenMP-related LangOpts to marshalling system (details)
  591. [clang][cli] Parse HeaderSearch options separately (details)
  592. [clang][cli] Generate HeaderSearch options separately (details)
  593. clang-cl: Prefer /vctoolsdir, /winsdkdir over LIB for link invocations (details)
  594. Try to fix cl-options.c on bots were the default triple is non-x86 non-arm (details)
  595. [clangd] Work around GCC bug 66735 (details)
  596. [OpenMP] Fix building using LLVM_ENABLE_RUNTIMES (details)
  597. [OpenMP][Libomptarget] Fix check-libomptarget (details)
  598. [clangd] Treat "null" optional fields as missing (details)
  599. [X86] merge "={eax}" and "~{eax}" into "=&eax" for MSInlineASM (details)
  600. [flang][openacc] Fix clause restriction for host_data directive (details)
  601. [flang][openacc] Fix clause restriction for exit data directive (details)
  602. [libcxx] Update include/__libcpp_version to match include/__config (details)
  603. [mlir] Fold shape.eq %a, %a to true (details)
  604. [libc++] [P0879] constexpr heap and partial_sort algorithms (details)
  605. [compiler-rt] Support FreeBSD standalone (boot) environment (details)
  606. [NFC] StackProtector: be consistent and to initialize DominatorTreeWrapperPass (details)
  607. [CodeGen] SafeStack: preserve DominatorTree if it is avaliable (details)
  608. [Support] Fix clang-tidy auto warnings. NFCI. (details)
  609. [Support] CommandLine.cpp - Fix clang-tidy namespace comment warnings. NFCI. (details)
  610. ExecutionDomainFix.cpp - use const refs in for-range loops. NFCI. (details)
  611. [TableGen] [DetailedRecords] Print record name that is null string as "" (details)
  612. [LoopUtils] Pass SCEVExpander instead SE to addRuntimeChecks. (details)
  613. [libc++] Fix extern template test failing on Windows (details)
  614. [flang][openacc] Allow multiple wait clauses (details)
  615. [RISCV] Group the legal vector types into lists we can iterator over in the RISCVISelLowering constructor (details)
  616. [libc] Disable sqrtl_test on non-x86 platforms. (details)
  617. [FaultsMaps][llvm-objdump] Move FaultMapParser to Object/. Remove CodeGen dependency from llvm-objdump (details)
  618. [ThinLTO] Add Visibility bits to GlobalValueSummary::GVFlags (details)
  619. [test] Fix clang/test/CodeGen tests (details)
  620. [gn build] Port 0b50fa99452f (details)
  621. Revert "Suppress non-conforming GNU paste extension in all standard-conforming modes" (details)
  622. [lit][NFC] Use enum to represent test order (details)
  623. [sanitizer][fuchsia] Implement ReleaseMemoryPagesToOS (details)
  624. [libc] Include only the relevant header files in the integration test. (details)
  625. [LoopVectorize] use IR fast-math-flags exclusively (not FP function attributes) (details)
  626. [builtins] Fix integer/pointer confusion in gcc_personality_v0.c (details)
  627. [builtins] Fix build after D95537 due to missing size_t (details)
  628. [RISCV] Rework fault first only load isel. (details)
  629. [libc] Fix the CMake var name of the list of public headers. (details)
  630. [RISCV] Reduce field sizes in searchable tables to reduce binary size. (details)
  631. [OpenMP] Fix HWLOC topology detection for 2.0.x (details)
  632. [OpenMP] Add cpuid leaf 1f topology discovery (details)
  633. [OpenMP] Fix misleading warning for OMP_PLACES (details)
  634. Parse different attribute syntaxes in arbitrary order (details)
  635. Permit __VA_OPT__ in all language modes and allow it to be detected with #ifdef. (details)
  636. [scudo][standalone] Restore GWP-ASan flag parsing (details)
  637. Silence a -Wlogical-op-parentheses diagnostic; NFC (details)
  638. [libc] Fix list of public headers usable on aarch64. (details)
  639. Ignore unknown attribute warnings in this test (details)
  640. [sanitizer] Fix crash on empty strings. (details)
  641. Fix runInTerminal failures on Windows (details)
  642. [ARM] Add BE check variants for soft-fp test. NFC (details)
  643. Revert "[sanitizer] Fix crash on empty strings." (details)
  644. [sanitizer] Fix crash on empty strings. (details)
  645. [Demangle] Support demangling Swift calling convention in MS demangler. (details)
  646. Don't allow __VA_OPT__ to be detected by #ifdef. (details)
  647. [RISCV] Move RISCVVPseudosTable from RISCVBaseInfo.h to RISCVInstrInfo.h. NFC (details)
  648. Itanium Mangling: Mangle `__alignof__` differently than `alignof`. (details)
  649. Itanium Mangling: Fix handling of <expr-primary> in <template-arg>. (details)
  650. Itanium Mangling: In 'enable_if', omit X/E around <expr-primary>. (details)
  651. DebugInfo: Deduplicate addresses in debug_addr (details)
  652. [OpenMP][NVPTX] Disable building NVPTX deviceRTL by default on a non-CUDA system (details)
  653. [AArch64][GlobalISel] Allow vector store legalization into 128-bit-wide types (details)
  654. [CodeGen] IndirectBrExpandPass: preserve Dominator Tree, if available (details)
  655. clang: Fix static_assert in a few contexts in microsoft mode (details)
  656. [flang] Search for #include "file" in right directory (take 2) (details)
  657. [LTO] Prevent devirtualization for symbols dynamically exported (details)
  658. [cxx_status] Mark P0732R2 as only 'partial', not 'Clang 12', as some of (details)
  659. [llvm-c] Move LLVMX86_AMXTypeKind & LLVMPoisonValueValueKind to the bottom to avoid value changes compared with LLVM<=11 (details)
  660. [AMDGPU] Do not reassign spilled registers (details)
  661. [clangd] Log warning when using legacy (theia) semantic highlighting. (details)
  662. [clangd] Parse Diagnostics block, and nest ClangTidy block under it. (details)
  663. [mlir][PassManager] Only reinitialize the pass manager if the context registry changes (details)
  664. [OpenMP][Libomptarget] Fix conditional in CMake for remote plugin (details)
  665. DebugInfo: Fix bug in addr+offset exprloc to use DWARFv5 addrx op instead of DWARFv4 GNU extension (details)
  666. [AMDGPU][NFC] Generate llvm.amdgcn.set.inactive tests (details)
  667. [libomptarget][NFC] Link plugins with threads support library due to std::call_once usage. (details)
  668. [AMDGPU][NFC] Pre-commit test for D95509 (details)
  669. [Support] Fix build for Haiku (details)
  670. IntrinsicEmitter: Change IntrinsicsToAttributesMap from uint8_t[] to uint16_t[] (details)
  671. [RISCV] Copy isUnneededShiftMask from X86. (details)
  672. [CSSPGO] Support of CS profiles in extended binary format. (details)
  673. [AVR] Optimize 16-bit int shift (details)
  674. [DebugInfo] Forward-declare PDBFile (NFC) (details)
  675. [llvm] Use llvm::is_sorted (NFC) (details)
  676. [llvm] Use append_range (NFC) (details)
  677. [AMDGPU] Avoid an illegal operand in si-shrink-instructions (details)
  678. [yaml2obj] - Allow empty SectionHeaderTable definitions. (details)
  679. [X86][AMX] Prevent shape def being scheduled across ldtilecfg. (details)
  680. [NFC][Transforms][Coroutines] Remove unused variable (details)
  681. [NFC][IR][AsmWriter] Fix Wreturn-type gcc warning (details)
  682. [Clang][Codegen] Truncate initializers of union bitfield members (details)
  683. [ARM][RegisterScavenging] Don't consider LR liveout if it is not reloaded (details)
  684. [clang][cli] Use variadic macros for parsing/generating (details)
  685. Use DataExtractor to decode SLEB128 in android_relas. (details)
  686. Revert "[clang][cli] Use variadic macros for parsing/generating" (details)
  687. [RISCV] Add support for RVV int<->fp & fp<->fp conversions (details)
  688. [PowerPC] Do not emit XXSPLTI32DX for sub 64-bit constants (details)
  689. [AMDGPU][GlobalISel] Handle G_PTR_ADD when looking for constant offset (details)
  690. [AMDGPU][GlobalISel] Remove redundant cmp when copying constant to vcc (details)
  691. [NFC] Move scavenge-lr.mir From AArch64 to Thumb2 test directory. (details)
  692. [ARM] Regenerate constant hoisting test. NFC (details)
  693. [MLIR][LinAlg][Docs] Add missing example code and other small fixes. (details)
  694. [mlir][Linalg] Improve codegen strategy (details)
  695. [SimplifyCFG] If provided, preserve Dominator Tree (details)
  696. [CodeGen][DwarfEHPrepare] Preserve Dominator Tree (details)
  697. [OpenCL] Hide sampler-less read_image builtins before CL1.2 (details)
  698. [DebugInfo] Remove some unused includes. NFCI. (details)
  699. [Support] Add some missing namespace closure comments. NFCI. (details)
  700. Fix "32-bit shift result used in 64-bit comparison" MSVC warning. NFCI. (details)
  701. [X86][AVX] Add PR48908 shuffle test case (details)
  702. [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - don't merge VPERMILPD ops with different low/high masks. (details)
  703. [OpenMP] Disabled profiling in `libomp` by default to unblock link errors (details)
  704. AMDGPUPrintfRuntimeBinding - don't dereference a dyn_cast<> pointer. NFCI. (details)
  705. [AArch64][SVE] Allow accesses to SVE stack objects to use frame pointer (details)
  706. [mlir][Linalg] Further improve codegen strategy and add a linalg.matmul_i8_i8_i32 (details)
  707. [ARM] Add alignment checks for MVE VLDn (details)
  708. [OpenMP][deviceRTLs] Added `[[clang::loader_uninitialized]]` explicitly (details)
  709. [OpenMP][NVPTX] Added the missing -O1 when building NVPTX bitcode libraries (details)
  710. [OpenMP][deviceRTLs] Separate declaration of target dependent functions from `target_impl.h` (details)
  711. [Orc] Remove unused header from TPC server (details)
  712. [mlir][Linalg] Reenable test that was mistakenly disabled (details)
  713. [X86] Add extload test cases from D95086 (details)
  714. Relax test expectations in debug-info-gline-tables-only-codeview.cpp (details)
  715. [mlir] Fix subview verifier. (details)
  716. [clang-tidy] Remove unnecessary #ifdef (details)
  717. [mlir][Linalg] Replace SimplePad with PadTensor in tile-and-pad (details)
  718. [MC][ELF] Fix accepting abbreviated form with sh_flags and sh_entsize (details)
  719. [APFloat] scalbn - pass DoubleAPFloat arg as const-ref. NFCI. (details)
  720. [APFloat] Remove orphan ilogb(DoubleAPFloat) declaration. NFCI. (details)
  721. [libc++] Fix extern-templates.sh.cpp test on Linux (details)
  722. [mlir] Fix gcc-8 build (details)
  723. [mlir][Linalg] Fix tests in tile-and-pad (details)
  724. [mlir] Make cuda/rocm-runtime-wrappers not depend on LLVMSupport. (details)
  725. [X86][AVX] combineHorizOpWithShuffle - fix valuetype comparison typo. (details)
  726. Revert "[DWARF] Create subprogram's DIE in DISubprogram's unit" (details)
  727. [lld][WebAssembly] Update comments mentioning legacy function names. NFC (details)
  728. [mlir] Fix integration tests (details)
  729. [libc++] [P0879] constexpr std::nth_element, and rewrite its tests. (details)
  730. [libc++] Implement format_error. (details)
  731. [RISCV] Add support for scalable vector fneg using vfsgnjn.vv (details)
  732. [mlir][sparse] use typenames for opaque pointers (details)
  733. [libc++] Implements concept constructible_from (details)
  734. [RISCV] Remove isel patterns for Zbs *W instructions. (details)
  735. [mlir] Fix test by adapting to C util functions moving to libmlir_c_runner_utils (details)
  736. Fix lldb-vscode builds on Windows targeting POSIX (details)
  737. [libcxx][test] Update directory_entry test for C++20 (details)
  738. [llvm-nm] Display defined weak STT_GNU_IFUNC symbols as 'i' (details)
  739. [NFC] Disallow unused prefixes under clang/test/CodeGenCXX (details)
  740. Better document the limitations of coro::salvageDebugInfo() (details)
  741. [mlir] NFC: split --shared-libs option into multiple lines. (details)
  742. [AMDGPU] Simplify some RUN lines. NFC. (details)
  743. [gn build] (semi-manually) port 081c1db02dd2 (details)
  744. [WebAssembly] Fix Fast ISEL not lowering 64-bit function pointers (details)
  745. [mlir] turn complex-to-llvm into a partial conversion (details)
  746. DebugInfo: Add a DWARF FORM extension for addrx+offset references to reduce relocations (details)
  747. [gn build] (manually) port 3b625060fc915 (details)
  748. [gn build] (manually) port 081c1db02dd2 more (details)
  749. [sparse][mlir] give all sparse kernels an explicit "output" tensor (details)
  750. Add convenience function for checking arrays of shapes compatible. (details)
  751. [WebAssembly] Prototype i8x16 to i32x4 widening instructions (details)
  752. [mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding (details)
  753. Revert "[mlir][Linalg] Replace SimplePad with PadTensor in hoist-padding" (details)
  754. Fix memory leak in 4318028cd2d7633a0cdeb0b5d4d2ed81fab87864 (details)
  755. [PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases (details)
  756. Removing the main to master sync GitHub workflow. (details)
  757. Support: Simplify __HAIKU__ #ifdef in llvm::sys::Wait, NFC (details)
  758. [ASTMatchers] Avoid pathological traversal over nested lambdas (details)
  759. [ASTMatchers] Add invocation matcher (details)
  760. [CMake][libc] Don't do CPU feature detection when cross-compiling (details)
  761. [CMake][libc] Support cross-compiling libc-hdrgen (details)
  762. Revert "[PDB] Defer relocating .debug$S until commit time and parallelize it" (details)
  763. Add the ability to extract the unwind rows from DWARF Call Frame Information. (details)
  764. [OpenMP] NFC: disabled two flakey tests as the bug in libomp not fixed yet (details)
  765. [GlobalISel] Add G_ASSERT_ZEXT (details)
  766. [GlobalISel] Implement widenScalar for carry-in add/sub (details)
  767. [NFC][EntryExitInstrumenter] Mark Dominator Tree as preserved in legacy-PM too (details)
  768. [NFC][PartiallyInlineLibCalls] Port to SplitBlockAndInsertIfThen() (details)
  769. [NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedLoad(): port to SplitBlockAndInsertIfThen() (details)
  770. [NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedStore(): port to SplitBlockAndInsertIfThen() (details)
  771. [NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedGather(): port to SplitBlockAndInsertIfThen() (details)
  772. [NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedScatter(): port to SplitBlockAndInsertIfThen() (details)
  773. [NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedExpandLoad(): port to SplitBlockAndInsertIfThen() (details)
  774. [NFC][ScalarizeMaskedMemIntrin] scalarizeMaskedCompressStore(): port to SplitBlockAndInsertIfThen() (details)
  775. [PartiallyInlineLibCalls] Preserve Dominator Tree, if avaliable (details)
  776. [ScalarizeMaskedMemIntrin] Preserve Dominator Tree, if avaliable (details)
  777. [mlir][Linalg] Enable TileAndFusePattern to work with tensors. (details)
  778. [NFC][AMDGPU] Correct name of DWARF CFA extensions (details)
  779. [GlobalISel] Walk through hints in getDefIgnoringCopies et al (details)
  780. Revert "[GlobalISel] Walk through hints in getDefIgnoringCopies et al" (details)
  781. Recommit "[GlobalISel] Walk through hints in getDefIgnoringCopies et al" (details)
  782. [sanitizer] Fix msan test build on FreeBSD after 7afdc89c2054 (details)
  783. ADT: Add SFINAE to the generic IntrusiveRefCntPtr constructors (details)
  784. ADT: Fix typo in static assert message from 17c584551d573f1693990773e29fbe6b4b6fa4f4 (details)
  785. [mlir][Linalg] Fix SFINAE check to actually check the value. (details)
  786. Fix windows buildbot build errors from D89845. (details)
  787. [clang-tidy] Applied clang-tidy fixes. NFC (details)
  788. Introduce a new DialectIdentifier structure, extending Identifier with a Dialect information (details)
  789. [AArch64][GlobalISel] Add a combine to fold away truncate in: G_ICMP EQ/NE (G_TRUNC(v), 0) (details)
  790. [DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas. (details)
  791. [GlobalISel] Implement computeKnownBits for G_ASSERT_ZEXT (details)
  792. [AArch64][GlobalISel] Enable CSE for the prelegalizer combiner. (details)
  793. Revert "[DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas." (details)
  794. [AMDGPU] Mark V_SET_INACTIVE as defining SCC (details)
  795. Ensure that we traverse non-op() method bodys of lambdas (details)
  796. [GlobalISel] Implement regbankselect for G_ASSERT_ZEXT (details)
  797. [AMDGPU] Fix WMM Entry SCC preservation (details)
  798. [libcxx][test] MoveOnly's comparisons are non-member (details)
  799. [libc][NFC] Add a few casts to suppress loss of precision warnings (details)
  800. [libcxx][test] move libc++-specific tests into the libcxx tree (details)
  801. Reland "[DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas" (details)
  802. Fix typo in "[DebugInfo][CodeView] Use <lambda_n> as the display name for lambdas." (details)
  803. [NFC][llvm-nm] Fix unused variable warning (details)
  804. [NFC][DebugInfo] Fix Wreturn-type gcc warning (details)
  805. [lldb] Use `foo is None` instead of `not foo` in darwin.py (details)
  806. Support a list of CostPerUse values (details)
  807. [SCEV] Do not cache comparison result upon reached max depth as "equivalence". PR48725 (details)
  808. [LiveDebugVariables] Add cache for SkipPHIsLabelsAndDebug to prevent (details)
  809. [clang-format] Add option to control the spaces in a line comment (details)
  810. [llvm] Forward-declare formatted_raw_ostream (NFC) (details)
  811. [llvm] Populate SmallVector at construction time (NFC) (details)
  812. [MustExecute] Use ListSeparator (NFC) (details)
  813. [clang-tidy] bugprone-assert-side-effect: Improve warning message. (details)
  814. [clang-tidy] bugprone-assert-side-effect: Warn on NSAssert by default. (details)
  815. [NFC][ScalarizeMaskedMemIntrin] Fix unused variable warning (details)
  816. [clangd] Add include-fixer fixit for field_incomplete_or_sizeless diagnostic. (details)
  817. Revert "[clang-format] Add option to control the spaces in a line comment" (details)
  818. [llvm-readobj/elf] - Report "bitcode files are not supported" warning for bitcode files. (details)
  819. [libc][Obvious] Remove DEPS for unistd.h in CMake file of memmove. (details)
  820. [llvm-jitlink] Replace use of deprecated gethostbyname by getaddrinfo. (details)
  821. [clang-tooling] Prevent llvm::fatal_error on invalid CLI option (details)
  822. [libc][Obvious] Fix typo (details)
  823. [mlir] Prevent segfault in Tensor canonicalization (details)
  824. Adapt lldb-instr to d47ee525f9e92898 APi change (details)
  825. [OpenMP] libomp: fix build by cl with vs2019 (details)
  826. Fix macos target assumption in test (details)
  827. [libcxx] Implement the stat function family on top of native windows APIs (details)
  828. [libcxx] Implement _FilesystemClock::now() and __last_write_time for windows (details)
  829. [libcxx] Hook up a number of operation functions to their windows counterparts (details)
  830. [libcxx] Sanitize paths before creating symlinks on windows (details)
  831. [gn build] (semi-manually) port 2ff8662b5d16 (details)
  832. [LTO] Update splitCodeGen to take a reference to the module. (NFC) (details)
  833. [MemCpyOpt] Add test for incorrect optimization across lifetime (NFC) (details)
  834. [test] Use host platform specific error message substitution in lit tests (details)
  835. [Syntax] Add syntax-tree-dump in clang-check. (details)
  836. [gn build] port e90e455d2a0cc (details)
  837. [MachineLICM] Fix wrong and confusing comment. NFC. (details)
  838. [clangd] Extract symbol-scope logic out of Quality, add tests. NFC (details)
  839. Revert "[clangd] Extract symbol-scope logic out of Quality, add tests. NFC" (details)
  840. [mlir] Remove mlir_c_runner_utils_static. (details)
  841. [X86][SSE] combineExtractWithShuffle - support zero-extending to allow extracting from narrow shuffle masks (details)
  842. clang-cl: Invent a /winsysroot concept (details)
  843. clang-cl: Accept /std:c11, /std:c17 flags (details)
  844. [TableGen] Fix instantiating multiclass in foreach (details)
Commit 1deee5cacbb76578367186d7ff2937b6fa79b827 by jonathan_roelofs
Fix crash when emitting NullReturn guards for functions returning BOOL

CodeGenModule::EmitNullConstant() creates constants with their "in memory"
type, not their "in vregs" type. The one place where this difference matters is
when the type is _Bool, as that is an i1 when in vregs and an i8 in memory.

Fixes: rdar://73361264
The file was modifiedclang/lib/CodeGen/CGObjCMac.cpp
The file was addedclang/test/CodeGenObjC/null-check-bool-ret.m
Commit 922b26cde4d1c89a5fa90e6a1d6d97d0f8eace6d by joker.eph
Add Python bindings for the builtin dialect

This includes some minor customization for FuncOp and ModuleOp.

Differential Revision: https://reviews.llvm.org/D95022
The file was addedmlir/lib/Bindings/Python/mlir/dialects/_builtin.py
The file was addedmlir/test/Bindings/Python/dialects/builtin.py
The file was modifiedmlir/lib/Bindings/Python/CMakeLists.txt
The file was modifiedmlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
The file was addedmlir/test/Bindings/Python/.style.yapf
The file was addedmlir/lib/Bindings/Python/BuiltinOps.td
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/__init__.py
Commit d38be2ba0e4ebfed4c13ab79f3a8631011d185eb by wolfgang_pieb
[llvm-mca] Initial implementation of serialization using JSON. The views
implemented at this time are Summary, Timeline, ResourcePressure and InstructionInfo.
Use --json on the command line to obtain JSON output.
The file was modifiedllvm/tools/llvm-mca/PipelinePrinter.h
The file was modifiedllvm/tools/llvm-mca/CMakeLists.txt
The file was addedllvm/tools/llvm-mca/Views/InstructionView.h
The file was modifiedllvm/tools/llvm-mca/Views/View.cpp
The file was modifiedllvm/tools/llvm-mca/PipelinePrinter.cpp
The file was modifiedllvm/tools/llvm-mca/Views/TimelineView.cpp
The file was modifiedllvm/docs/CommandGuide/llvm-mca.rst
The file was modifiedllvm/tools/llvm-mca/Views/BottleneckAnalysis.h
The file was modifiedllvm/tools/llvm-mca/Views/ResourcePressureView.cpp
The file was modifiedllvm/tools/llvm-mca/Views/RetireControlUnitStatistics.h
The file was modifiedllvm/tools/llvm-mca/Views/DispatchStatistics.h
The file was modifiedllvm/tools/llvm-mca/Views/SummaryView.h
The file was modifiedllvm/tools/llvm-mca/Views/SchedulerStatistics.h
The file was modifiedllvm/tools/llvm-mca/Views/InstructionInfoView.h
The file was modifiedllvm/tools/llvm-mca/Views/TimelineView.h
The file was addedllvm/tools/llvm-mca/Views/InstructionView.cpp
The file was modifiedllvm/tools/llvm-mca/llvm-mca.cpp
The file was modifiedllvm/tools/llvm-mca/Views/ResourcePressureView.h
The file was addedllvm/test/tools/llvm-mca/JSON/X86/views.s
The file was modifiedllvm/tools/llvm-mca/Views/SummaryView.cpp
The file was modifiedllvm/tools/llvm-mca/Views/InstructionInfoView.cpp
The file was modifiedllvm/tools/llvm-mca/Views/BottleneckAnalysis.cpp
The file was modifiedllvm/tools/llvm-mca/Views/RegisterFileStatistics.h
The file was modifiedllvm/docs/ReleaseNotes.rst
The file was modifiedllvm/tools/llvm-mca/Views/View.h
Commit cfe9ccbddd98b55e49e46bb40877ece6a47a7625 by i
[libc++abi] Simplify scan_eh_tab

1.
All `_URC_HANDLER_FOUND` return values need to set `landingPad`
and its value does not matter for `_URC_CONTINUE_UNWIND`. So we
can always set `landingPad` to unify code.

2.
For an exception specification (`ttypeIndex < 0`), we can check `_UA_FORCE_UNWIND` first.

3.
The so-called type 3 search (`actions & _UA_CLEANUP_PHASE && !(actions & _UA_HANDLER_FRAME)`)
is actually conceptually wrong.  For a catch handler or an unmatched dynamic
exception specification, `_UA_HANDLER_FOUND` should be returned immediately.  It
still appeared to work because the `ttypeIndex==0` case would return
`_UA_HANDLER_FOUND` at a later time.

This patch fixes the conceptual error and simplifies the code by handling type 3
the same way as type 2 (which is also what libsupc++ does).
The only difference between phase 1 and phase 2 is what to do with a cleanup
(`actionEntry==0`, or a `ttypeIndex==0` is found in the action record chain):
phase 1 returns `_URC_CONTINUE_UNWIND` while phase 2 returns `_URC_HANDLER_FOUND`.

Reviewed By: #libc_abi, compnerd

Differential Revision: https://reviews.llvm.org/D93190
The file was modifiedlibcxxabi/src/cxa_personality.cpp
Commit 0cd1e47327e68bba4b92338bf58bbab922c5d85b by llvmgnsyncbot
[gn build] Port d38be2ba0e4e
The file was modifiedllvm/utils/gn/secondary/llvm/tools/llvm-mca/BUILD.gn
Commit b0143352634ba7ed29f1db6ea576c0abfd0b4a29 by phosek
[libc] Distinguish compiler and run failures

This is useful for debugging issues, for example when cross-compiling.

Differential Revision: https://reviews.llvm.org/D95118
The file was modifiedlibc/cmake/modules/LLVMLibCCheckCpuFeatures.cmake
Commit b7ab6726b6de9608896fce4372b30b4fd50b0a2a by kai.wang
[RISCV] New vector load/store in V extension v1.0

Upgrade RISC-V V extension to v1.0-08a0b46.
Indexed load/store have ordered and unordered form.
New whole vector load/store.

Differential Revision: https://reviews.llvm.org/D93614
The file was removedllvm/test/CodeGen/RISCV/rvv/vsxe-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoV.td
The file was modifiedllvm/test/MC/RISCV/rvv/aliases.s
The file was removedllvm/test/CodeGen/RISCV/rvv/vlxe-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vloxei-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrFormatsV.td
The file was addedllvm/test/CodeGen/RISCV/rvv/vsoxei-rv32.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was modifiedllvm/test/MC/RISCV/rvv/zvlsseg.s
The file was addedllvm/test/CodeGen/RISCV/rvv/vsuxei-rv64.ll
The file was removedllvm/test/CodeGen/RISCV/rvv/vlxe-rv32.ll
The file was removedllvm/test/CodeGen/RISCV/rvv/vsuxe-rv32.ll
The file was modifiedllvm/test/MC/RISCV/rvv/store.s
The file was removedllvm/test/CodeGen/RISCV/rvv/vsxe-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
The file was modifiedllvm/test/MC/RISCV/rvv/load.s
The file was removedllvm/test/CodeGen/RISCV/rvv/vsuxe-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vsuxei-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit 04af1ca2e908016563eada7a60f69f572d5629da by wolfgang_pieb
[llvm-mca] Forgot a couple of override specifiers.

Differential Revision: https://reviews.llvm.org/D86644
The file was modifiedllvm/tools/llvm-mca/Views/InstructionView.h
Commit 6e360460f14b4904f197b805f0f4659f4b960a16 by kai.wang
[RISCV] Use v8-v23 as argument registers to conform to the proposal.

The maximum LMUL is 8. We need 16 vector registers for two LMUL-8
arguments. The modification follows the proposal of psABI in
https://github.com/riscv/riscv-elf-psabi-doc/pull/171

Differential Revision: https://reviews.llvm.org/D95134
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmseq-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmaxu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmaxu-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmv.s.f-rv64.ll
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The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmxnor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfclass-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsbc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vor-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/viota-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmv.s.x-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsleu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-int-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmulh-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredand-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsac-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbc.borrow.in-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vselect-int-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vid-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsleu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/saddo-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfgt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlsseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsaddu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmandnot-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsgt-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-integer-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredmin-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlse-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoxor-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccus-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfslide1up-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/mask-exts-truncs-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnmsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vzext-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnclipu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmnand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsll-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccus-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vredxor-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-fp-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfirst-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamomaxu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vexts-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmadc.carry.in-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmin-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vpopc-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vpopc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmand-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmacc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadd-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrsub-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/viota-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsoxei-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjx-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwadd.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vand-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1up-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmulsu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfeq-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasubu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vlseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmflt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vshl-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmax-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssra-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmul-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vnsrl-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnjn-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfredosum-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vminu-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoswap-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsqrt-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vamoadd-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vid-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmerge-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfirst-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vasub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vloxei-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/setcc-fp-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vadc-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfmerge-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfsgnj-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslide1down-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsub-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwaddu.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwmaccu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsrl-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vssseg-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmsne-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmandnot-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfwadd.w-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsra-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfrsub-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vsll-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vslidedown-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmarith-sdnode.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmclr-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vcompress-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfdiv-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vwsubu.w-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vmfle-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vtruncs-sdnode-rv64.ll
Commit 3738447c96c7400d0e9b9b00b583dca45fb0807f by pklausler
[flang] Address name resolution problems

Don't emit a bogus error message about a bad forward reference
when it's an IMPORT of a USE-associated symbol; don't ignore
intrinsic functions when USE-associating the contents of a
module when the intrinsic has been explicitly USE'd; allow
PUBLIC or PRIVATE accessibility attribute to be specified
for an enumerator before the declaration of the enumerator.

Differential Revision: https://reviews.llvm.org/D95175
The file was modifiedflang/lib/Semantics/resolve-names.cpp
Commit 020c00b5d3d4d2205ddd91b0f185d683d978e939 by wolfgang_pieb
[llvm-mca] Test case was missing a triple.
The file was modifiedllvm/test/tools/llvm-mca/JSON/X86/views.s
Commit 0cfadb37f4fef016998cb412270cfe87b0683090 by pklausler
[flang] Allow NULL() actual argument for pointer dummy

Fixes a bogus error message about an actual argument not being an
object.

Differential Revision: https://reviews.llvm.org/D95176
The file was modifiedflang/lib/Semantics/check-call.cpp
Commit 1be2524b7d213035e591bee3eecccdd6b59d14a5 by brad
[libcxx] Check return value for asprintf()

local __libcpp_asprintf_l() -> libc asprintf() was inspecting the pointer (with
indeterminate value) for failure, rather than the return value of -1.

Reviewed By: ldionne

Differential Revision: https://reviews.llvm.org/D94564
The file was modifiedlibcxx/include/locale
Commit 2de5ea3b3ed9882026d9dc6c5d8ec462ebe5f8ec by pklausler
[flang] Fix bogus error message with binding

ProcedureDesignator::GetInterfaceSymbol() needs to return
the procedure bound to a bindings.

Differential Revision: https://reviews.llvm.org/D95178
The file was modifiedflang/lib/Evaluate/call.cpp
The file was modifiedflang/lib/Semantics/check-declarations.cpp
The file was addedflang/test/Semantics/call17.f90
The file was modifiedflang/test/Semantics/resolve88.f90
Commit 8120cfedf55ade13a0a1a4a4629911aa2f8ed9c3 by czhengsz
[NFC] [TargetRegisterInfo] add another API to get srcreg through copy.

Reviewed By: nemanjai, jsji

Differential Revision: https://reviews.llvm.org/D92069
The file was modifiedllvm/lib/CodeGen/TargetRegisterInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetRegisterInfo.h
Commit 3b5430eb0dad5b239d0671503f73f6b713aaaf40 by craig.topper
[RISCV] Add a VL output to vleff intrinsics.

The fault-only-first-load instructions can reduce VL if an element
other than element 0 triggers a memory fault. This can be used to
vectorize loops with data dependent exit conditions like strcmp or
strlen.

This patch adds a VL output to these intrinsics so that the new
VL value can be captured by software. This will be expanded to
'csrr gpr, vl' after the vleff instruction during SelectionDAG.

By doing this with one intrinsic we are able to guarantee that the
csrr reads the VL value produced by the vleff instruction. Having
it as a separate intrinsic would make it impossible to guarantee
ordering without making every other vector intrinsic have side
effects.

The intrinsics are expanded during lowering into two ISD nodes
that are glued together. These ISD nodes will go
through isel separately, but should maintain the glue so that they
get emitted adjacently by InstrEmitter.

I've only ran the chain through the vleff instruction, allowing
the READ_VL to be deleted if it is unused.

Reviewed By: HsiangKai

Differential Revision: https://reviews.llvm.org/D94286
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was modifiedllvm/lib/Target/RISCV/RISCVMCInstLower.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vleff-rv32.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
Commit c6e8f81410a2942b5abd112aa6e468268e01d946 by wolfgang_pieb
[llvm-mca] Addressing build failures due to missing override specifiers
The file was modifiedllvm/tools/llvm-mca/Views/InstructionInfoView.cpp
The file was modifiedllvm/tools/llvm-mca/Views/ResourcePressureView.h
The file was modifiedllvm/tools/llvm-mca/Views/InstructionInfoView.h
The file was modifiedllvm/tools/llvm-mca/Views/TimelineView.h
Commit 0a7a1ac73d095eacd4499e889ce35191a9d1c648 by mikeurbach
[mlir] Support FuncOpSignatureConversion for more FunctionLike ops.

This extracts the implementation of getType, setType, and getBody from
FunctionSupport.h into the mlir::impl namespace and defines them
generically in FunctionSupport.cpp. This allows them to be used
elsewhere for any FunctionLike ops that use FunctionType for their
type signature.

Using the new helpers, FuncOpSignatureConversion is generalized to
work with all such FunctionLike ops. Convenience helpers are added to
configure the pattern for a given concrete FunctionLike op type.

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D95021
The file was modifiedmlir/lib/IR/FunctionSupport.cpp
The file was modifiedmlir/lib/Transforms/Utils/DialectConversion.cpp
The file was modifiedmlir/include/mlir/Transforms/DialectConversion.h
The file was modifiedmlir/include/mlir/IR/FunctionSupport.h
Commit 3d349ed7e1108686271a09314dafaa356df4006d by Akira
[CodeGen][ObjC] Fix broken IR generated when there is a nil receiver
check

This patch fixes a bug in emitARCOperationAfterCall where it inserts the
fall-back call after a bitcast instruction and then replaces the
bitcast's operand with the result of the fall-back call. The generated
IR without this patch looks like this:

msgSend.call:                                     ; preds = %entry
  %call = call i8* bitcast (i8* (i8*, i8*, ...)* @objc_msgSend
  br label %msgSend.cont

msgSend.null-receiver:                            ; preds = %entry
  call void @llvm.objc.release(i8* %4)
  br label %msgSend.cont

msgSend.cont:
  %8 = phi i8* [ %call, %msgSend.call ], [ null, %msgSend.null-receiver ]
  %9 = bitcast i8* %10 to %0*
  %10 = call i8* @llvm.objc.retain(i8* %8)

Notice that `%9 = bitcast i8* %10` to %0* is taking operand %10 which is
defined after it.

To fix the bug, this patch modifies the insert point to point to the
bitcast instruction so that the fall-back call is inserted before the
bitcast. In addition, it teaches the function to look at phi
instructions that are generated when there is a check for a null
receiver and insert the retainRV/claimRV instruction right after the
call instead of inserting a fall-back call right after the phi
instruction.

rdar://73360225

Differential Revision: https://reviews.llvm.org/D95181
The file was modifiedclang/lib/CodeGen/CGObjC.cpp
The file was modifiedclang/test/CodeGenObjC/ns_consume_null_check.m
Commit b6c3a59c3f550ab9214de3988419fe1cb68679c9 by VenkataRamanaiah.Nalamothu
[AMDGPU] Test case demonstrating issues with generation of .debug_frame

This test case demonstrates that the Call Frame Information generation is
totally biased towards whether exceptions are enabled or not. Currently
LLVM does not generate CFI i.e. a .debug_frame for debug purpose even
if --force-dwarf-frame-section is enabled unless exceptions are enabled.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D94801
The file was addedllvm/test/CodeGen/AMDGPU/debug_frame.ll
Commit 449f2f7140e1d70d9c08bb609cde6cdd144c6035 by qiucofan
[PowerPC] Duplicate inherited heuristic from base scheduler

PowerPC has its custom scheduler heuristic. It calls parent classes'
tryCandidate in override version, but the function returns void, so this
way doesn't actually help. This patch duplicates code from base scheduler
into PPC machine scheduler class, which does what we wanted.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D94464
The file was modifiedllvm/test/CodeGen/PowerPC/botheightreduce.mir
The file was modifiedllvm/test/CodeGen/PowerPC/loop-instr-form-prepare.ll
The file was modifiedllvm/test/CodeGen/PowerPC/rematerializable-instruction-machine-licm.ll
The file was modifiedllvm/test/CodeGen/PowerPC/sms-simple.ll
The file was modifiedllvm/test/CodeGen/PowerPC/stack-clash-dynamic-alloca.ll
The file was modifiedllvm/test/CodeGen/PowerPC/more-dq-form-prepare.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCMachineScheduler.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/sms-phi-1.ll
The file was modifiedllvm/test/CodeGen/PowerPC/sms-cpy-1.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mma-intrinsics.ll
The file was modifiedllvm/test/CodeGen/PowerPC/sched-addi.ll
The file was modifiedllvm/test/CodeGen/PowerPC/lsr-ctrloop.ll
The file was modifiedllvm/test/CodeGen/PowerPC/mma-phi-accs.ll
Commit bd3ca6666d14464b1bb7eecbd3cc227ee0614799 by lxfind
[Inlining] Delete redundant optnone/alwaysinline check

The same check is done in InlineCost: https://github.com/llvm/llvm-project/blob/8b0bd54d0ec968df28ccc58bbb537a7b7c074ef2/llvm/lib/Analysis/InlineCost.cpp#L2537-L2552
Also, doing a check on the callee here is confusing, because anything that deals with callee should be done in the inner loop where we proecss all calls from the same caller.

Differential Revision: https://reviews.llvm.org/D95186
The file was modifiedllvm/lib/Transforms/IPO/Inliner.cpp
Commit bea661d9a52f9abb4fef7cf195092e912c165d34 by shihpo.hung
[RISCV] Add intrinsics for RVV 1.0 vrgatherei16

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D95014
The file was addedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vrgatherei16-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
Commit 976cf53cc7a5dd03932a6e44b8a9350a05cdaa68 by shihpo.hung
[RISCV] Add intrinsics for vector unordered indexed load in RVV 1.0

Add unordered indexed load: vluxei

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D95028
The file was addedllvm/test/CodeGen/RISCV/rvv/vluxei-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vluxei-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
Commit 96677503315e689fd3c8f5ef164d8fb9725d4bb3 by shihpo.hung
[RISCV] Add intrinsics for RVV1.0 VFRSQRTE7 & VFRECE7

Reviewed By: craig.topper, frasercrmck

Differential Revision: https://reviews.llvm.org/D95113
The file was addedllvm/test/CodeGen/RISCV/vfrece7-rv32.ll
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was addedllvm/test/CodeGen/RISCV/vfrsqrte7-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/vfrsqrte7-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/vfrece7-rv64.ll
Commit 3dedad475da45c05bc4f66cd14e9f44581edf0bc by Amara Emerson
[AArch64][GlobalISel] Make G_USUBO legal and select it.

The expansion for wide subtractions includes G_USUBO.

Differential Revision: https://reviews.llvm.org/D95032
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
Commit f8f1b20e6b30624d2c0d18dc6a2d61643650d0c4 by craig.topper
[RISCV] Don't create LMUL=8 pseudo instructions for ternary widening arithmetic instructions

These instructions produce 2*SEW result so the input can't have
an LMUL=8 or the result would need a non-existant LMUL=16. So
only create pseudos for LMUL up to 4.

Differential Revision: https://reviews.llvm.org/D95189
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit 5d354220d44f11c70f36d5a357ec2a2208a6ab92 by kai.wang
[RISCV] Correct DWARF number for vector registers.

The DWARF numbers of vector registers are already defined in
riscv-elf-psabi. The DWARF number for vector is start from 96.
Correct the DWARF numbers of vector registers.

Differential Revision: https://reviews.llvm.org/D94749
The file was modifiedllvm/lib/Target/RISCV/RISCVRegisterInfo.td
Commit be611431cd1f5c826a55b531db92a63e84323866 by aeubanks
[NewPM][opt] Run the "default" AA pipeline by default

We tend to assume that the AA pipeline is by default the default AA
pipeline and it's confusing when it's empty instead.

PR48779

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D95117
The file was modifiedllvm/test/Other/new-pm-lto-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
The file was modifiedllvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc.ll
The file was modifiedllvm/test/Other/pass-pipeline-parsing.ll
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/globalaa-retained.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/invalidate-dom.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
The file was modifiedllvm/test/Transforms/Inline/cgscc-incremental-invalidate.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
The file was modifiedllvm/test/Other/loop-pm-invalidation.ll
The file was modifiedllvm/test/Other/new-pm-pr42726-cgscc.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon.ll
The file was modifiedllvm/test/Other/new-pass-manager.ll
The file was modifiedllvm/test/Transforms/LoopRotate/pr35210.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/loopversioningLICM2.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/SROA-after-loop-unrolling.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-elide-musttail.ll
The file was modifiedllvm/tools/opt/NewPMDriver.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops.ll
The file was modifiedllvm/test/Transforms/OpenMP/parallel_region_merging.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/pr39282.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Analysis/MemorySSA/pr43569.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/loopversioningLICM1.ll
The file was modifiedllvm/test/CodeGen/Hexagon/loop-idiom/pmpy-mod.ll
The file was modifiedllvm/test/Transforms/ThinLTOBitcodeWriter/pr33536.ll
Commit c5c4dbd2790736008b1c60f1b737dfb824b90144 by kazu
[CodeGen] Use llvm::append_range (NFC)
The file was modifiedllvm/lib/CodeGen/SplitKit.cpp
The file was modifiedllvm/lib/CodeGen/Analysis.cpp
The file was modifiedllvm/lib/CodeGen/MIRCanonicalizerPass.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
The file was modifiedllvm/lib/CodeGen/MachineRegisterInfo.cpp
The file was modifiedllvm/lib/CodeGen/CodeGenPrepare.cpp
The file was modifiedllvm/lib/CodeGen/MachineCSE.cpp
The file was modifiedllvm/lib/CodeGen/MachineVerifier.cpp
Commit cfa241680fd6c5d804fa57406100692f923d679f by kazu
[llvm] Don't include StringSwitch.h where unnecessary (NFC)
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp
The file was modifiedllvm/lib/Support/X86TargetParser.cpp
The file was modifiedllvm/lib/MC/MCParser/COFFMasmParser.cpp
The file was modifiedllvm/tools/llvm-cvtres/llvm-cvtres.cpp
The file was modifiedllvm/lib/ObjectYAML/COFFEmitter.cpp
The file was modifiedllvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp
The file was modifiedllvm/lib/IR/Core.cpp
The file was modifiedllvm/lib/Target/MSP430/AsmParser/MSP430AsmParser.cpp
The file was modifiedllvm/tools/dsymutil/dsymutil.cpp
The file was modifiedllvm/lib/Analysis/ObjCARCInstKind.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
Commit 551aaa24afe6d029cc96399bcece948a5217530b by kazu
[llvm] Use isDigit (NFC)
The file was modifiedllvm/lib/DebugInfo/Symbolize/Symbolize.cpp
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp
The file was modifiedllvm/lib/Support/Triple.cpp
The file was modifiedllvm/include/llvm/TableGen/Record.h
The file was modifiedllvm/lib/IR/AsmWriter.cpp
The file was modifiedllvm/lib/ProfileData/SampleProfReader.cpp
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
Commit aee622fa200de9ad28334cf74416f2fd5391e2ee by jpienaar
[mlir] Enable passing crash reproducer stream factory method

Add factory to create streams for logging the reproducer. Allows for more general logging (beyond file) and logging the configuration/module separately (logged in order, configuration before module).

Also enable querying filename of ToolOutputFile.

Differential Revision: https://reviews.llvm.org/D94868
The file was modifiedmlir/include/mlir/Pass/PassManager.h
The file was modifiedmlir/lib/Pass/Pass.cpp
The file was modifiedmlir/docs/PassManagement.md
The file was modifiedllvm/include/llvm/Support/ToolOutputFile.h
Commit ba9b4ea4eeaef039e80df10695a11e6ed35d415a by aeubanks
Revert "[NewPM][opt] Run the "default" AA pipeline by default"

This reverts commit be611431cd1f5c826a55b531db92a63e84323866.

Other/new-pm-lto-defaults.ll failing
The file was modifiedllvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/loop-pm-invalidation.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/pr39282.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Transforms/LoopRotate/pr35210.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/test/Transforms/ThinLTOBitcodeWriter/pr33536.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub.ll
The file was modifiedllvm/test/Other/new-pass-manager.ll
The file was modifiedllvm/test/Other/new-pm-lto-defaults.ll
The file was modifiedllvm/test/Transforms/Inline/cgscc-incremental-invalidate.ll
The file was modifiedllvm/test/Other/new-pm-pr42726-cgscc.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/loopversioningLICM2.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-elide-musttail.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
The file was modifiedllvm/test/Transforms/OpenMP/parallel_region_merging.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/invalidate-dom.ll
The file was modifiedllvm/tools/opt/NewPMDriver.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/pass-pipeline-parsing.ll
The file was modifiedllvm/test/Analysis/MemorySSA/pr43569.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/SROA-after-loop-unrolling.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/globalaa-retained.ll
The file was modifiedllvm/test/CodeGen/Hexagon/loop-idiom/pmpy-mod.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/loopversioningLICM1.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops.ll
Commit a11bf9a7fbd3693d6d4bca8ef2ba1d2f0758f9be by aeubanks
[AMDGPU][Inliner] Remove amdgpu-inline and add a new TTI inline hook

Having a custom inliner doesn't really fit in with the new PM's
pipeline. It's also extra technical debt.

amdgpu-inline only does a couple of custom things compared to the normal
inliner:
1) It disables inlining if the number of BBs in a function would exceed
   some limit
2) It increases the threshold if there are pointers to private arrays(?)

These can all be handled as TTI inliner hooks.
There already exists a hook for backends to multiply the inlining
threshold.

This way we can remove the custom amdgpu-inline pass.

This caused inline-hint.ll to fail, and after some investigation, it
looks like getInliningThresholdMultiplier() was previously getting
applied twice in amdgpu-inline (https://reviews.llvm.org/D62707 fixed it
not applying at all, so some later inliner change must have fixed
something), so I had to change the threshold in the test.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D94153
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.h
The file was removedllvm/lib/Target/AMDGPU/AMDGPUInline.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/test/Transforms/Inline/AMDGPU/inline-hint.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/inline-maxbb.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu-inline.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/test/Transforms/Inline/AMDGPU/inline-amdgpu-vecbonus.ll
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h
The file was modifiedllvm/lib/Analysis/InlineCost.cpp
The file was modifiedllvm/test/Transforms/Inline/AMDGPU/amdgpu-inline-alloca-argument.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/opt-pipeline.ll
Commit c042aff8860df3cad2b274bf0a495e83ae36ddee by mtrofin
[NFC] Disallow unused prefixes under llvm/test

This patch sets the default for llvm tests, with the exception of tests
under Reduce, because quite a few of them use 'FileCheck' as parameter
to a tool, and including a flag as that parameter would complicate
matters.

The rest of the patch undo-es the lit.local.cfg changes we progressively
introduced as temporary measure to avoid regressions under various
directories.

Differential Revision: https://reviews.llvm.org/D95111
The file was modifiedllvm/test/Instrumentation/HWAddressSanitizer/basic.ll
The file was removedllvm/test/Analysis/lit.local.cfg
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/check-array.ll
The file was modifiedllvm/test/MC/RISCV/lit.local.cfg
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/freeze.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/check-struct.ll
The file was addedllvm/test/Reduce/lit.local.cfg
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/array_types.ll
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/global_metadata_array.ll
The file was modifiedllvm/test/Instrumentation/HWAddressSanitizer/prologue.ll
The file was modifiedllvm/test/lit.cfg.py
The file was removedllvm/test/Other/lit.local.cfg
The file was modifiedllvm/test/FileCheck/lit.local.cfg
The file was modifiedllvm/test/MC/AMDGPU/lit.local.cfg
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/msan_asm_conservative.ll
The file was removedllvm/test/CodeGen/lit.local.cfg
The file was removedllvm/test/Transforms/lit.local.cfg
The file was modifiedllvm/test/MC/AArch64/lit.local.cfg
The file was modifiedllvm/test/MC/ARM/lit.local.cfg
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/msan_x86_bts_asm.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/reduce.ll
The file was modifiedllvm/test/Instrumentation/MemorySanitizer/msan_eager.ll
Commit b0e89906f5b7e505a1ea315ab4ff612b1607fda8 by kyrtzidis
[ASTReader] Allow controlling separately whether validation should be disabled for a PCH vs a module file

This addresses an issue with how the PCH preable works, specifically:

1. When using a PCH/preamble the module hash changes and a different cache directory is used
2. When the preamble is used, PCH & PCM validation is disabled.

Due to combination of #1 and #2, reparsing with preamble enabled can end up loading a stale module file before a header change and using it without updating it because validation is disabled and it doesn’t check that the header has changed and the module file is out-of-date.

rdar://72611253

Differential Revision: https://reviews.llvm.org/D95159
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was addedclang/test/Index/preamble-reparse-changed-module.m
The file was modifiedclang/include/clang/Lex/PreprocessorOptions.h
The file was addedclang/test/Index/Inputs/preamble-reparse-changed-module/module.modulemap
The file was addedclang/test/Index/Inputs/preamble-reparse-changed-module/head.h
The file was modifiedclang/lib/Frontend/CompilerInstance.cpp
The file was modifiedclang/lib/Frontend/FrontendActions.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/tools/c-index-test/c-index-test.c
The file was modifiedclang/lib/Frontend/FrontendAction.cpp
The file was modifiedclang/lib/Frontend/ASTUnit.cpp
The file was modifiedclang/include/clang/Frontend/CompilerInstance.h
The file was modifiedclang/lib/Frontend/ChainedIncludesSource.cpp
The file was addedclang/test/Index/Inputs/preamble-reparse-changed-module/new-head.h
The file was modifiedclang/tools/c-index-test/core_main.cpp
The file was modifiedclang/include/clang/Serialization/ASTReader.h
The file was modifiedclang/lib/Frontend/PrecompiledPreamble.cpp
Commit f9b5f6937ebed5dccabfc3c287f11d18b68a36f6 by Lang Hames
[JITLink][ELF/x86-64] Range check 32-bit relocs.

Also switch to using little_<b> / ulittle_<b> types to write results for
consistency with MachO.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
Commit 6699029b67bf0f5389896f9f929a344b64cfd9c7 by aeubanks
[NewPM][opt] Run the "default" AA pipeline by default

We tend to assume that the AA pipeline is by default the default AA
pipeline and it's confusing when it's empty instead.

PR48779

Initially reverted due to BasicAA running analyses in an unspecified
order (multiple function calls as parameters), fixed by fetching
analyses before the call to construct BasicAA.

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D95117
The file was modifiedllvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
The file was modifiedllvm/test/Other/loop-pm-invalidation.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/optimal-epilog-vectorization.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/loop-idiom-vs-indvars.ll
The file was modifiedllvm/tools/opt/NewPMDriver.cpp
The file was modifiedllvm/test/Transforms/Coroutines/coro-elide-musttail.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/globalaa-retained.ll
The file was modifiedllvm/test/Transforms/Inline/cgscc-incremental-invalidate.ll
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/test/Transforms/OpenMP/parallel_region_merging.ll
The file was modifiedllvm/test/Other/new-pm-defaults.ll
The file was modifiedllvm/test/CodeGen/Hexagon/loop-idiom/pmpy-mod.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/loopversioningLICM2.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/ARM/arm_fill_q7.ll
The file was modifiedllvm/test/Other/new-pass-manager.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-defaults.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/pr39282.ll
The file was modifiedllvm/test/Transforms/ThinLTOBitcodeWriter/split-vfunc.ll
The file was modifiedllvm/test/Other/new-pm-lto-defaults.ll
The file was modifiedllvm/test/Transforms/LoopVersioningLICM/loopversioningLICM1.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub-inseltpoison.ll
The file was modifiedllvm/test/Transforms/SimplifyCFG/X86/invalidate-dom.ll
The file was modifiedllvm/test/Other/new-pm-pr42726-cgscc.ll
The file was modifiedllvm/test/Analysis/MemorySSA/pr43569.ll
The file was modifiedllvm/test/Transforms/ThinLTOBitcodeWriter/pr33536.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/vdiv.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/addsub.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/SROA-after-loop-unrolling.ll
The file was modifiedllvm/test/Transforms/LoopVectorize/PowerPC/optimal-epilog-vectorization.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/pass-pipeline-parsing.ll
The file was modifiedllvm/test/Transforms/LoopRotate/pr35210.ll
Commit f374138058b6f7ddfeeb145a5c98b9c8d0d95f82 by aeubanks
[test] Make incorrect-exit-count.ll work under NPM
The file was modifiedllvm/test/Analysis/ScalarEvolution/incorrect-exit-count.ll
Commit 16d4bbef30a9e625e04653047759d5636f9e58a5 by hanchung
[mlir][Linalg] Introduce linalg.pad_tensor op.

`linalg.pad_tensor` is an operation that pads the `source` tensor
with given `low` and `high` padding config.

Example 1:

```mlir
  %pad_value = ... : f32
  %1 = linalg.pad_tensor %0 low[1, 2] high[2, 3] {
  ^bb0(%arg0 : index, %arg1 : index):
    linalg.yield %pad_value : f32
  } : tensor<?x?xf32> to tensor<?x?xf32>
```

Example 2:
```mlir
  %pad_value = ... : f32
  %1 = linalg.pad_tensor %arg0 low[2, %arg1, 3, 3] high[3, 3, %arg1, 2] {
  ^bb0(%arg2: index, %arg3: index, %arg4: index, %arg5: index):
    linalg.yield %pad_value : f32
  } : tensor<1x2x2x?xf32> to tensor<6x?x?x?xf32>
```

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D93704
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
Commit 2cb130f7661176f2c2eaa7554f2a55863cfc0ed3 by hanchung
[mlir][StandardToSPIRV] Add support for lowering uitofp to SPIR-V

- Extend spirv::ConstantOp::getZero/One to handle float, vector of int, and vector of float.
- Refactor ZeroExtendI1Pattern to use getZero/One methods.
- Add one more test for lowering std.zexti which extends vector<4xi1> to vector<4xi64>.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D95120
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
Commit 541d98efa222b00e16c67348810898c2fa11f398 by Amara Emerson
[AArch64][GlobalISel] Implement widenScalar for signed overflow

Implement widening for G_SADDO and G_SSUBO. Previously it was only
implemented for G_UADDO and G_USUBO. Also add legalize-add/sub tests for
narrow overflowing add/sub on AArch64.

Differential Revision: https://reviews.llvm.org/D95034
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
Commit 5660dc5968ec6dacba1917b741d660c582f69e9e by craig.topper
[TargetLowering] Simplify some code in SimplifySetCC that tries to handle SIGN_EXTEND_INREG operand types that should never happen. NFCI

There was code to handle the first operand being different than
the result type. And code to handle first operand having the
same type as the type to extend from. This should never happen
for a correctly formed SIGN_EXTEND_INREG. I've replace the
code with asserts.

I also noticed we created the same APInt twice so I've reused it.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit c971bcd2102b905e6469463fb8309ab3f7b2b8f2 by Christudasan.Devadasan
[AMDGPU] Test clean up (NFC)
The file was modifiedllvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
Commit f20bb857addaf5479d9b1d4ac29e315a3971ff1c by douglas.yung
Update filename to workers.py file in documentation

Commit be9f322e8dc530a56f03356aad31fa9031b27e26 moved the list of workers from
slaves.py to workers.py, but the documentation in "How To Add A Builder" was
never updated and now references a non-existing file. This fixes that.

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D94886
The file was modifiedllvm/docs/HowToAddABuilder.rst
Commit 75f10c957477b269d9b954a686231342aeb8004b by nathan
NFC: Remove simple_ilist comment mentioning ilist/iplist allocating

Allocation was removed from ilist in 2016 in the git commit
b5da00533510.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93953
The file was modifiedllvm/include/llvm/ADT/simple_ilist.h
Commit c953a8334707951d172e8061c8dc9054eb0c5c3f by craig.topper
[TargetLowering] Use getBoolConstant instead of assuming zero or one for boolean contents.

Noticed while I was touching other nearby code. I don't have a
test where this matters because the targets I work on
use zero or one boolean contents. And the tests cases I've seen
this fire on happen before type legalization where the result type
is MVT::i1 so the distinction doesn't matter.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit ff5f42e413386b1b3730879abf7b35756891e1c3 by Jan Svoboda
[clang][cli] Port visibility LangOptions to marshalling system

This patch introduces Clang-specific MarshallingInfoVisibility TableGen class.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D95147
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
Commit 4edb63bbbe338b890119a307bc323c24d0a1afc7 by shihpo.hung
[RISCV] Fix intrinsic CodeGen test cases for vrgather

1. Op2 type in vrgather.vx should be XLEN instead of SEW
2. Add double type in vrgather-rv32 cases.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D95207
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrgather-rv64.ll
Commit ff8a1cae181438b97937848060da1efb67117ea4 by Christudasan.Devadasan
[AMDGPU] Fix the inconsistency in soffset for MUBUF stack accesses.

During instruction selection, there is an inconsistency in choosing
the initial soffset value. With certain early passes, this value is
getting modified and that brought additional fixup during
eliminateFrameIndex to work for all cases. This whole transformation
looks trivial and can be handled better.

This patch clearly defines the initial value for soffset and keeps it
unchanged before eliminateFrameIndex. The initial value must be zero
for MUBUF with a frame index. The non-frame index MUBUF forms that
use a raw offset from SP will have the stack register for soffset.
During frame elimination, the soffset remains zero for entry functions
with zero dynamic allocas and no callsites, or else is updated to the
appropriate frame/stack register.

Also, did some code clean up and made all asserts around soffset
stricter to match.

Reviewed By: scott.linder

Differential Revision: https://reviews.llvm.org/D95071
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-private.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-fi-mubuf.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-store-private.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/amdpal-callable.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
Commit 3e8d1e8b12ba9017b861fff94afdd4a29b39de17 by sven.vanhaastregt
[APSInt][NFC] Clean up doxygen comments

Add a Doxygen class comment and clean up other Doxygen comments in
this file while we're at it.
The file was modifiedllvm/include/llvm/ADT/APSInt.h
Commit 2e080eb00ad76654313e0e119bb7fa0ffe2f9866 by david.sherwood
[SVE] Add support for scalable vectorization of loops with selects and cmps

I have removed an unnecessary assert in LoopVectorizationCostModel::getInstructionCost
that prevented a cost being calculated for select instructions when using
scalable vectors. In addition, I have changed AArch64TTIImpl::getCmpSelInstrCost
to only do special cost calculations for fixed width vectors and fall
back to the base version for scalable vectors.

I have added a simple cost model test for cmps and selects:

  test/Analysis/CostModel/sve-cmpsel.ll

and some simple tests that show we vectorize loops with cmp and select:

  test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll

Differential Revision: https://reviews.llvm.org/D95039
The file was addedllvm/test/Analysis/CostModel/sve-cmpsel.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was addedllvm/test/Transforms/LoopVectorize/AArch64/sve-basic-vec.ll
Commit 14eea6b0ecddfe7d1c68754a8bfb7c21cde82df8 by jay.foad
[LegacyPM] Update InversedLastUser on the fly. NFC.

This speeds up setLastUser enough to give a 5% to 10% speed up on
trivial invocations of opt and llc, as measured by:

perf stat -r 100 opt -S -o /dev/null -O3 /dev/null
perf stat -r 100 llc -march=amdgcn /dev/null -filetype null

Don't dump last use information unless -debug-pass=Details to avoid
printing lots of spam that will break some existing lit tests. Before
this patch, dumping last use information was broken anyway, because it
used InversedLastUser before it had been populated.

Differential Revision: https://reviews.llvm.org/D92309
The file was modifiedllvm/lib/IR/LegacyPassManager.cpp
The file was modifiedllvm/include/llvm/IR/LegacyPassManagers.h
Commit 3b1f17ca5498e17655ce531f13f1e8c2cf37058d by Lang Hames
[JITLink][ELF/x86-64] Add support for weak and hidden symbols.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/JITLink.cpp
The file was addedllvm/test/ExecutionEngine/JITLink/X86/ELF_weak_definitions.s
The file was addedllvm/test/ExecutionEngine/JITLink/X86/Inputs/ELF_weak_defs_extra.s
Commit 83e7a96c06835eb37416ffdc463edc7ddd18656c by david.sherwood
Fix build failure caused by 2e080eb00ad76654313e0e119bb7fa0ffe2f9866
The file was removedllvm/test/Analysis/CostModel/sve-cmpsel.ll
The file was addedllvm/test/Analysis/CostModel/AArch64/sve-cmpsel.ll
Commit 481659c55c4ec1e133bec82a909e9e6baee70a28 by llvm-dev
[X86][SSE] Add v16i8 02_20_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu_uu shuffle test
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-128-v16.ll
Commit 636b87785c1de64134254b688d30ab1248b16ed2 by llvm-dev
[X86][SSE] Add PR48823 HSUB test case
The file was modifiedllvm/test/CodeGen/X86/haddsub-3.ll
Commit 8214982b5042fd2e07af58d21d1839dfe9a226d3 by sebastian.neubauer
[AMDGPU] Implement mir parseCustomPseudoSourceValue

Allow parsing generated mir with custom pseudo source value tokens.
Also rename pseudo source values to have more meaningful names.

Relands ba7dcd8542ab, which had memory leaks.

Differential Revision: https://reviews.llvm.org/D95215
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.raw.buffer.load.ll
The file was addedllvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.load.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/buffer-intrinsics-mmo-offsets.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.cmpswap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/unsupported-image-a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/splitkit-getsubrangeformask.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.3d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.struct.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.add.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/extract_subvector_vec4_vec3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.load.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.format.f32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.format.ll
The file was modifiedllvm/lib/Target/AMDGPU/CMakeLists.txt
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.store.2d.d16.ll
The file was addedllvm/lib/Target/AMDGPU/AMDGPUMIRFormatter.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/print-mir-custom-pseudo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.tbuffer.store.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/unsupported-image-g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.cmpswap.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was addedllvm/test/CodeGen/MIR/AMDGPU/custom-pseudo-source-values.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.add.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.store.format.f32.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.atomic.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.image.sample.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2darraymsaa.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.format.f16.ll
Commit 509741382f6db7687f33bb2fd35cc6a58b058001 by llvmgnsyncbot
[gn build] Port 8214982b5042
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Target/AMDGPU/BUILD.gn
Commit 176c7f22172eefddc9ff42dfae8a6015d4e017c6 by nikita.ppv
[IR] Optimize adding attribute to AttributeList (NFC)

When adding an enum attribute to an AttributeList, avoid going
through an AttrBuilder and instead directly add the attribute to
the correct set. Going through AttrBuilder is expensive, because
it requires all string attributes to be reconstructed.

This can be further improved by inserting the attribute at the
right position and using the AttributeSetNode::getSorted() API.

This recovers the small compile-time regression from D94633.
The file was modifiedllvm/lib/IR/Attributes.cpp
The file was modifiedllvm/include/llvm/IR/Attributes.h
Commit 476de8cea3530cb9bf9339502f77cdd18d5f98b6 by david.green
[ARM] Add new and regenerate SSAT tests. NFC

Some of these new tests should be creating SSAT. They will be fixed in a
followup.
The file was modifiedllvm/test/CodeGen/ARM/usat.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat.ll
Commit 4cca222279396c4e4d484ba79e74c5dc45fe63e4 by kadircet
[clangd] Add documentation for building and testing clangd

Adds minimal cmake configuration required to build and test clangd,
while telling target names. Should be helpful for people unfamiliar with the
LLVM repo.

See https://github.com/clangd/clangd/issues/579 for a request.

Differential Revision: https://reviews.llvm.org/D91186
The file was modifiedclang-tools-extra/clangd/README.md
Commit 9ae73cdbc1e59fd3149e60efd2b96e68e8d1669b by david.green
[ARM] Adjust isSaturatingConditional to return a new SDValue. NFC

This replaces the isSaturatingConditional function with
LowerSaturatingConditional that directly returns a new SSAT or
USAT SDValue, instead of returning true and the components of it.
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
Commit ffe72f987f4866c46c18174cdb750dea88bedba3 by llvm-dev
[X86][SSE] Don't fold shuffle(binop(),binop()) -> binop(shuffle(),shuffle()) if the shuffle are splats

rGbe69e66b1cd8 added the fold, but DAGCombiner.visitVECTOR_SHUFFLE doesn't merge shuffles if the inner shuffle is a splat, so we need to bail.

The non-fast-horiz-ops paths see some minor regressions, we might be able to improve on this after lowering to target shuffles.

Fix PR48823
The file was modifiedllvm/test/CodeGen/X86/haddsub-3.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 5dbe5d2c91209db9830d5b17093c408f22a7b471 by llvm-dev
[DAG] Commute shuffle(splat(A,u), shuffle(C,D)) -> shuffle'(shuffle(C,D), splat(A,u))

We only merge shuffles if the inner (LHS) shuffle is a non-splat, so commute these shuffles to improve merging of multiple shuffles.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/X86/haddsub-undef.ll
Commit def99ad68bce83deabf24694f88f0b0c98287a24 by benicsbalazs
[NFC] Add CMakeUserPresets.json filename to .gitignore

CMake 3.19 introduced the `presets`.
Quoting the documentation:
> `CMakePresets.json` may be checked into a version control system, and
> `CMakeUserPresets.json` **should NOT be checked in**.

We will ignore the `CMakeUserPresets.json` file if that is present
at the root of a subproject.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D93167
The file was modified.gitignore
Commit d972d4c749048531953a16b815e07c67e8455a3b by hokein.wu
Revert "[clang] Suppress "follow-up" diagnostics on recovery call expressions."

This reverts commit efa9aaad703e6b150980ed1a74b4e7c9da7d85a2 and adds a
crash test.

The commit caused a crash in CodeGen with -fms-compatibility, see
https://bugs.llvm.org/show_bug.cgi?id=48690.
The file was modifiedclang/test/SemaCXX/typo-correction-delayed.cpp
The file was modifiedclang/test/AST/ast-dump-recovery.cpp
The file was addedclang/test/CodeGenCXX/ms-lookup-template-base-classes.cpp
The file was modifiedclang/lib/Sema/SemaOverload.cpp
Commit e16959c9b8553a60ec5e9aa55d101154d5805292 by sichert
Don't delete default constructor of PathDiagnosticConsumerOptions

This type is used as an aggregate, i.e. it has no member functions.
Starting with C++20 types with deleted default constructors are not
aggregate types anymore which means that aggregate initialization will
not work for this class anymore. This leads to a compile error in
clang::AnalyzerOptions::getDiagOpts() for example.

Also set the boolean flags to false by default to avoid undefined
behavior. Previously this was prevented by deleting the default
constructor, now we explicitly initialize them.

Differential Revision: https://reviews.llvm.org/D92221
The file was modifiedclang/include/clang/Analysis/PathDiagnostic.h
Commit a0e30914f8c8bb60795a008ce2d9e3c0a4f9b7a2 by mikhail.maltsev
[clang][Tooling] Get rid of a hack in SymbolOccurrences, NFCI

The class `SymbolOccurrences` can store either a single `SourceRange`
in-place or multiple `SourceRanges` on the heap. In the latter case
the number of source ranges is stored in the internal representation
of the beginning `SourceLocation` of the in-place `SourceRange`
object.

This change gets rid of such hack by placing `SourceRange` in a union
which holds either a valid `SourceRange` or an `unsigned int` (a number
of ranges).

The change also adds `static_assert`s that check that `SourceRange` and
`SourceLocation` are trivially destructible (this is required for the
current patch and for D94237 which has already been committed).

Reviewed By: MarkMurrayARM, simon_tatham

Differential Revision: https://reviews.llvm.org/D94599
The file was modifiedclang/include/clang/Tooling/Refactoring/Rename/SymbolOccurrences.h
The file was modifiedclang/lib/Basic/SourceLocation.cpp
The file was modifiedclang/lib/Tooling/Refactoring/Rename/SymbolOccurrences.cpp
Commit a4914dc1f2b4a49cf488d3be7a01fe7238c889d8 by spatel
[SLP] do not traverse constant uses

Walking the use list of a Constant (particularly, ConstantData)
is not scalable, since a given constant may be used by many
instructinos in many functions in many modules.

Differential Revision: https://reviews.llvm.org/D94713
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit b1166e1317c54e9cfbb28b280af12313cf325a86 by llvm-dev
[X86][AVX] combineX86ShufflesRecursively - attempt to constant fold before widening shuffle inputs

combineX86ShufflesConstants/canonicalizeShuffleMaskWithHorizOp can both handle/earlyout shuffles with inputs of different widths, so delay widening as late as possible to make it easier to match constant folds etc.

The plan is to eventually move the widening inside combineX86ShuffleChain so that we don't create any new nodes unless we successfully combine the shuffles.
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx512bwvl.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 7388c34685954862e5f1fa4734f42f7087e697a2 by platonov.aleksandr
[clangd][SwapIndex] ensure that the old index is alive while we are using it via the function returned by `SwapIndex::indexedFiles()` call

Without this patch the old index could be freed, but there still could be tries to access it via the function returned by `SwapIndex::indexedFiles()` call.
This leads to hard to reproduce clangd crashes at code completion.
This patch keeps the old index alive until the function returned by `SwapIndex::indexedFiles()` call is alive.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D95206
The file was modifiedclang-tools-extra/clangd/index/Index.cpp
The file was modifiedclang-tools-extra/clangd/index/Merge.cpp
Commit 60cd75a098d4f18d9c8903ddcb466b4e7deb0580 by sam.mccall
[clangd] Inject context provider rather than config into ClangdServer. NFC

This is a step towards allowing CDB behavior to being configurable.

Previously ClangdServer itself created the configs and installed them into
contexts. This was natural as it knows how to deal with resulting diagnostics.

However this prevents config being used in CDB, which must be created before
ClangdServer. So we extract the context provider (config loader) as a separate
object, which publishes diagnostics to a ClangdServer::Callbacks itself.

Now initialization looks like:
- First create the config::Provider
- Then create the ClangdLSPServer, passing config provider
- Next, create the context provider, passing config provider + diagnostic callbacks
- now create the CDB, passing context provider
- finally create ClangdServer, passing CDB, context provider, and diagnostic callbacks

Differential Revision: https://reviews.llvm.org/D95087
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.h
The file was modifiedclang-tools-extra/clangd/unittests/ClangdTests.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.cpp
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
The file was modifiedclang-tools-extra/clangd/ClangdServer.h
Commit 2a8cbdd83006d638936800f9ed3dea4fc20ddf32 by flo
[LTO] Add support for existing Config::Freestanding option.

lto::Config has a field to control whether the build is "freestanding"
(no builtins) or not, but it is not hooked up to the code actually
running the passes.

This patch adds support for the flag to both the code that runs
optimization with the new and old pass managers, by explicitly adding a
TargetLibraryInfo instance. If Freestanding is true, all library functions
are disabled.

Reviewed By: steven_wu

Differential Revision: https://reviews.llvm.org/D94630
The file was modifiedllvm/test/LTO/X86/tli-nobuiltin.ll
The file was modifiedllvm/lib/LTO/LTOBackend.cpp
The file was modifiedllvm/tools/llvm-lto2/llvm-lto2.cpp
Commit b46545542b3010749b530f37d24e24a6abdd58e9 by sichert
Avoid fragile type lookups in GDB pretty printer

Instead of using the type llvm::StringMapEntry<{stringified_value_type}>
use only the base class llvm::StringMapEntryBase and calculate the
offsets of the member variables manually. The approach with stringifying
the name of the value type is pretty fragile as it can easily break with
local and dependent types.

Differential Revision: https://reviews.llvm.org/D94431
The file was modifiedllvm/utils/gdb-scripts/prettyprinters.py
Commit af0332498405b3a4074cef09845bbacfd4fd594f by david.green
[ARM] Disable sign extended SSAT pattern recognition.

I may have given bad advice, and skipping sext_inreg when matching SSAT
patterns is not valid on it's own. It at least needs to sext_inreg the
input again, but as far as I can tell is still only valid based on
demanded bits. For the moment disable that part of the combine,
hopefully reimplementing it in the future more correctly.
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/test/CodeGen/ARM/usat.ll
The file was modifiedllvm/test/CodeGen/ARM/ssat.ll
Commit 98a8344895a8e1f2cfa98b664b50fb7b864afa52 by 1.int32
[clang][ASTImporter] Add support for importing CXXFoldExpr.

Reviewed By: shafik, martong

Differential Revision: https://reviews.llvm.org/D94786
The file was modifiedclang/lib/AST/ASTImporter.cpp
The file was modifiedclang/unittests/AST/ASTImporterTest.cpp
Commit 0895b836d74ed333468ddece2102140494eb33b6 by lebedev.ri
[SimplifyCFG] FoldBranchToCommonDest(): don't deal with unconditional branches

The case where BB ends with an unconditional branch,
and has a single predecessor w/ conditional branch
to BB and a single successor of BB is exactly the pattern
SpeculativelyExecuteBB() transform deals with.
(and in this case they both allow speculating only a single instruction)

Well, or FoldTwoEntryPHINode(), if the final block
has only those two predecessors.

Here, in FoldBranchToCommonDest(), only a weird subset of that
transform is supported, and it's glued on the side in a weird way.
  In particular, it took me a bit to understand that the Cond
isn't actually a branch condition in that case, but just the value
we allow to speculate (otherwise it reads as a miscompile to me).
  Additionally, this only supports for the speculated instruction
to be an ICmp.

So let's just unclutter FoldBranchToCommonDest(), and leave
this transform up to SpeculativelyExecuteBB(). As far as i can tell,
this shouldn't really impact optimization potential, but if it does,
improving SpeculativelyExecuteBB() will be more beneficial anyways.

Notably, this only affects a single test,
but EarlyCSE should have run beforehand in the pipeline,
and then FoldTwoEntryPHINode() would have caught it.

This reverts commit rL158392 / commit d33f4efbfdef6ffccf212ab3e40a7673589085fd.
The file was removedllvm/test/Transforms/SimplifyCFG/X86/fold-branch-debuginvariant.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/branch-fold.ll
Commit aabed3718ae25476c0f6b7e70c83ba4658f00e5c by lebedev.ri
[NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't deal with uncond branches

While we already ignore uncond branches, we could still potentially
end up with a conditional branches with identical destinations
due to the visitation order, or because we were called as an utility.
But if we have such a disguised uncond branch,
we still probably shouldn't deal with it here.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 256a0357524b6cea3c705a77ec3d3c0122ede861 by lebedev.ri
[NFC][SimplifyCFG] FoldBranchToCommonDest(): unclutter Cond/CondInPred handling

We don't need those variables, we can just get the final value directly.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 7b89efb55e4e5d6078aa9571f40859cc9ea01bcc by lebedev.ri
[NFC][SimplifyCFG] FoldBranchToCommonDest(): somewhat better structure weight updating code

Hoist the successor updating out of the code that deals with branch
weight updating, and hoist the 'has weights' check from the latter,
making code more consistent and easier to follow.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit b482560a597697789d81e4b9b22fb14e1f2f3c9a by lebedev.ri
[NFC][SimplifyCFG] FoldBranchToCommonDest(): extract check for destination sharing into a helper function

As a follow-up, i'll extract the actual transform into a function,
and this helper will be called from both places,
so this avoids code duplication.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit efeb8caf8bd10f2ad794c6f434fbc4ba133cd7e3 by lebedev.ri
[NFC][SimplifyCFG] FoldBranchToCommonDest(): extract the actual transform into helper function

I'm intentionally structuring it this way, so that the actual fold only
does the fold, and no legality/correctness checks, all of which must be
done by the caller. This allows for the fold code to be more compact
and more easily grokable.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 4ed0d8f2f07d0e17942366d48a29c165384ace52 by lebedev.ri
[NFC][InstCombine] Extract freelyInvertAllUsersOf() out of canonicalizeICmpPredicate()

I'd like to use it in an upcoming fold.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/include/llvm/Transforms/InstCombine/InstCombiner.h
Commit 62604906b5b29c4a55f83226a60f0de9ff9f8df2 by lebedev.ri
[NFC][InstCombine] Add tests for `(~x) &/| y` --> `~(x |/& (~y))` fold

Iff y is free to invert, and the users of the expression can be updated,
we can undo De-Morgan fold, and immediately get rid of the `not` op.
The file was addedllvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
The file was addedllvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
Commit 79b0d21ce92f1a5ff4c822d1a5c664196b338535 by lebedev.ri
[InstCombine] Fold `(~x) & y` --> `~(x | (~y))` iff it is free to do so

Iff we know we can get rid of the inversions in the new pattern,
we can thus get rid of the inversion in the old pattern,
this decreasing instruction count.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-and.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
Commit d1a6f92fd545726aab0784e2dcfb193ce185c418 by lebedev.ri
[InstCombine] Fold `(~x) | y` --> `~(x & (~y))` iff it is free to do so

Iff we know we can get rid of the inversions in the new pattern,
we can thus get rid of the inversion in the old pattern,
this decreasing instruction count.

Note that we could position this transformation as just hoisting
of the `not` (still, iff y is freely negatible), but the test changes
show a number of regressions, so let's not do that.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/merge-cond-stores.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
The file was modifiedllvm/test/Transforms/InstCombine/sink-not-into-another-hand-of-or.ll
Commit 85e7578c6db81abb3283cb87fce8592f83ae0ea8 by lebedev.ri
Revert "[NFCI-ish][SimplifyCFG] FoldBranchToCommonDest(): really don't deal with uncond branches"

Does not build in XCode:
http://green.lab.llvm.org/green/job/clang-stage1-RA/17963/consoleFull#-1704658317a1ca8a51-895e-46c6-af87-ce24fa4cd561

This reverts commit aabed3718ae25476c0f6b7e70c83ba4658f00e5c.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 9b19ecb8f1ec7acbcfd6f0e4f3cbd6902570105d by jonathanchesterfield
[libomptarget][devicertl] Drop templated atomic functions

[libomptarget][devicertl] Drop templated atomic functions

The five __kmpc_atomic templates are instantiated a total of seven times.
This change replaces the template with explictly typed functions, which
have the same prototype for amdgcn and nvptx, and implements them with
the same code presently in use.

Rolls in the accepted but not yet landed D95085.

The unsigned long long type can be replaced with uint64_t when replacing
the cuda function. Until then, clang warns on casting a pointer to one to
a pointer to the other.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D95093
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.h
The file was modifiedopenmp/libomptarget/deviceRTLs/amdgcn/src/target_impl.hip
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.h
Commit 87b628dadde02b295322c1530d058397c1c4dd14 by aschwaighofer
[coro.async] Make sure we process async coroutines

Because we were not looking for the llvm.coro.id.async intrinsic in the
early coro pass which triggers follow-up passes we relied on the
llvm.coro.end intrinsic being present. This might not be the case in
functions that end in unreachable code.

Differential Revision: https://reviews.llvm.org/D95144
The file was addedllvm/test/Transforms/Coroutines/coro-async-unreachable.ll
The file was modifiedllvm/lib/Transforms/Coroutines/CoroEarly.cpp
Commit c8b4337911f4b61724fe62518c83cd6919d56b29 by flo
[LoopUnswitch] Add test cases with atomic loads & call
The file was modifiedllvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
Commit 86991d3231334538cccf6732056cbb641046bd49 by flo
[LoopUnswitch] Fix logic to avoid unswitching with atomic loads.

The existing code did not deal with atomic loads correctly. Such loads
are represented as MemoryDefs. Bail out on any MemoryAccess that is not
a MemoryUse.
The file was modifiedllvm/lib/Transforms/Scalar/LoopUnswitch.cpp
The file was modifiedllvm/test/Transforms/LoopUnswitch/partial-unswitch.ll
Commit 02e174e8f77f8c03e32e5860492dd9c7dabc6906 by psteinfeld
[flang] Fix typo in error message

The title says it all.

Differential Revision: https://reviews.llvm.org/D95233
The file was modifiedflang/lib/Semantics/check-call.cpp
The file was modifiedflang/test/Semantics/call09.f90
Commit 4846f6ab815c34f6ffbc8d4ecde891d917bf2157 by llvm-dev
[X86][AVX] combineTargetShuffle - simplify the X86ISD::VPERM2X128 subvector matching

Simplify vperm2x128(concat(X,Y),concat(Z,W)) folding.

Use collectConcatOps / ISD::INSERT_SUBVECTOR to find the source subvectors instead of hardcoded immediate matching.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit c33d36e0667e7fff186243ac7a3a9cd63e797438 by llvm-dev
[X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle unary vperm2x128(permute/shift(x,c),undef) cases

Fold vperm2x128(permute/shift(x,c),undef) -> permute/shift(vperm2x128(x,undef),c)
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
The file was modifiedllvm/test/CodeGen/X86/extract-concat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/haddsub-4.ll
The file was modifiedllvm/test/CodeGen/X86/avx-splat.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining.ll
Commit bd122f6d217862b4631ac118c58f62a7dec16a02 by llvm-dev
[X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - handle vperm2x128(movddup(x),movddup(y)) cases

Fold vperm2x128(movddup(x),movddup(y)) -> movddup(vperm2x128(x,y))
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v4.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/extract-concat.ll
Commit 06f8a49693957bc27b83e0ab5f429ff874941a07 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Fix No such file or directory expression error

On z/OS, the following error message is not matched correctly in lit tests. This patch updates the CHECK expression to match the end period successfully.
```
EDC5129I No such file or directory.
```

Differential Revision: https://reviews.llvm.org/D94239
The file was modifiedllvm/test/tools/llvm-libtool-darwin/filelist.test
Commit 622eaa4a4cea17c2cec6942d9702b010deae392b by Yaxun.Liu
[HIP] Support __managed__ attribute

This patch implements codegen for __managed__ variable attribute for HIP.

Diagnostics will be added later.

Differential Revision: https://reviews.llvm.org/D94814
The file was addedclang/test/CodeGenCUDA/managed-var.cu
The file was modifiedclang/lib/CodeGen/CGCUDARuntime.h
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
The file was modifiedclang/test/Misc/pragma-attribute-supported-attributes-list.test
The file was modifiedclang/include/clang/Basic/Attr.td
The file was addedclang/test/AST/Inputs/cuda.h
The file was addedclang/test/AST/ast-dump-managed-var.cu
The file was addedclang/test/SemaCUDA/managed-var.cu
The file was modifiedclang/test/SemaCUDA/Inputs/cuda.h
The file was addedllvm/include/llvm/IR/ReplaceConstant.h
The file was modifiedllvm/lib/IR/CMakeLists.txt
The file was addedllvm/lib/IR/ReplaceConstant.cpp
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was modifiedclang/lib/CodeGen/CGCUDANV.cpp
The file was modifiedclang/test/SemaCUDA/bad-attributes.cu
The file was modifiedllvm/lib/Target/XCore/XCoreLowerThreadLocal.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was modifiedclang/test/SemaCUDA/union-init.cu
The file was modifiedclang/test/SemaCUDA/device-var-init.cu
The file was modifiedclang/test/CodeGenCUDA/Inputs/cuda.h
The file was modifiedclang/test/SemaCUDA/function-overload.cu
Commit 14056dfb4dc7b289fbd12c3bc82f68485bf9377c by arjunpitchanathan
[MLIR] Add support for extracting an integer sample point (if one exists) from an unbounded FlatAffineConstraints.

With this, we have complete support for finding integer sample points in FlatAffineConstraints.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D95047
The file was modifiedmlir/lib/Analysis/LinearTransform.cpp
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/lib/Analysis/Presburger/Simplex.cpp
The file was modifiedmlir/unittests/Analysis/AffineStructuresTest.cpp
The file was modifiedmlir/include/mlir/Analysis/LinearTransform.h
The file was modifiedmlir/unittests/Analysis/LinearTransformTest.cpp
The file was modifiedmlir/include/mlir/Analysis/Presburger/Simplex.h
Commit 1b535df1ccd5b1627be7cedc2503642a71ca59ab by hanchung
[mlir][StandardOps] Fix typos in the td file.

- Fix arguments name for subview and subtensor.
- Fix a typo in a comment of subtensor's method.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D95211
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
Commit d24b94f070ff4e6621b66d5df4b3a15a693d52bf by i
[ELF] --wrap: retain __wrap_foo if foo is defined in an object/bitcode file

If foo is referenced in any object file, bitcode file or shared object,
`__wrap_foo` should be retained as the redirection target of sym
(f96ff3c0f8ebd941b3f6b345164c3d858b781484).

If the object file defining foo has foo references, we cannot easily distinguish
the case from cases where foo is not referenced (we haven't scanned
relocations). Retain `__wrap_foo` because we choose to wrap sym references
regardless of whether sym is defined to keep non-LTO/LTO/relocatable links' behaviors similar
https://sourceware.org/bugzilla/show_bug.cgi?id=26358 .

If foo is defined in a shared object, `__wrap_foo` can still be omitted
(`wrap-dynamic-undef.s`).

Reviewed By: andrewng

Differential Revision: https://reviews.llvm.org/D95152
The file was addedlld/test/ELF/lto/wrap-defined.ll
The file was modifiedlld/test/ELF/wrap-shlib-undefined.s
The file was modifiedlld/ELF/Options.td
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/docs/ld.lld.1
The file was addedlld/test/ELF/wrap-defined.s
Commit edbcc17b7a0b5a4f20ec55983e172d0120ccbca9 by Andrey.Churbanov
[OpenMP] libomp: properly initialize buckets in __kmp_dephash_extend

The buckets are initialized in __kmp_dephash_create but when they are extended
the memory is allocated but not NULL'd, potentially leaving some buckets
uninitialized after all entries have been copied into the new allocation.
This commit makes sure the buckets are properly initialized with NULL before
copying the entries.

Differential Revision: https://reviews.llvm.org/D95167
The file was modifiedopenmp/runtime/src/kmp_taskdeps.cpp
Commit 03b6dc300531434209e65bccebb1a1c21f387e2a by Louis Dionne
[libc++] Fix broken build when merging libc++abi into libc++ on Apple
The file was modifiedlibcxx/src/CMakeLists.txt
Commit 7143b63017522b76193e970084a1f34a772834dc by wolfgang_pieb
[llvm-mca] Adding local lit config file for X86 targets
The file was addedllvm/test/tools/llvm-mca/JSON/X86/lit.local.cfg
Commit cc77a2c7685a9c82566332ba9bd070473ef679d4 by ezhulenev
[mlir] Add coro intrinsics operations to LLVM dialect

This PR only has coro intrinsics needed for the Async to LLVM lowering. Will add other intrinsics as needed in the followup PRs.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95143
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/test/Target/llvmir-intrinsics.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOpBase.td
Commit dc057e87f6c18c24d17c7cae97ebe95f78b6d934 by Shafik Yaghmour
[LLDB] Fix how ObjCBOOLSummaryProvider deals with BOOL

ObjCBOOLSummaryProvider was incorrectly treating BOOL as unsigned and this is now fixed.
Also adding tests for one bit bit-fields of BOOL and unsigned char.
The file was modifiedlldb/test/API/lang/objc/bitfield_ivars/main.m
The file was modifiedlldb/test/API/functionalities/data-formatter/boolreference/TestFormattersBoolRefPtr.py
The file was modifiedlldb/source/Plugins/Language/ObjC/Cocoa.cpp
The file was modifiedlldb/test/API/lang/objc/bitfield_ivars/TestBitfieldIvars.py
The file was modifiedlldb/test/API/functionalities/data-formatter/boolreference/main.mm
Commit 167fb9b4b4352cdea92ccfdfb205c7ed4470d3ef by antiagainst
[mlir][spirv] Fix script for availability autogen and refresh ops

Previously we only autogen the availability for ops that are
direct instantiating `SPV_Op` and expected other subclasses of
`SPV_Op` to define aggregated availability for all ops. This is
quite error prone and we can miss capabilities for certain ops.
Also it's arguable to have multiple levels of subclasses and try
to deduplicate too much: having the availability directly in the
op can be quite explicit and clear. A few extra lines of
declarative code is fine.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D95236
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBitOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVNonUniformOps.td
The file was modifiedmlir/utils/spirv/gen_spirv_dialect.py
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVMatrixOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVMemoryOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVStructureOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVCompositeOps.td
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVGroupOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
Commit 59bf9a89d825c1f23b249e0ce43d8bf7b486a203 by pklausler
[flang] Remove some needless operations in expr rewriting

Expressions emitted to module files and error messages
sometimes contain conversions of integer results of inquiry
intrinsics; these are usually not needed, and can conflict
with "int" in the user's namespace.  Improve folding so that
these conversions don't appear, and do some other clean-up
in adjacent code.

Differential Revision: https://reviews.llvm.org/D95172
The file was modifiedflang/lib/Evaluate/fold-implementation.h
The file was modifiedflang/test/Semantics/modfile30.f90
The file was modifiedflang/test/Semantics/modfile17.f90
Commit e27197f3605450c372ddc71922d0e9982b30e115 by antiagainst
[mlir][spirv] Define spv.IsNan/spv.IsInf and add lowerings

spv.Ordered/spv.Unordered are meant for OpenCL Kernel capability.
For Vulkan Shader capability, we should use spv.IsNan to check
whether a number is NaN.

Add a new pattern for converting `std.cmpf ord|uno` to spv.IsNan
and bumped the pattern converting to spv.Ordered/spv.Unordered
to a higher benefit. The SPIR-V target environment will properly
select between these two patterns.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D95237
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVBase.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/IR/SPIRVLogicalOps.td
The file was modifiedmlir/test/Dialect/SPIRV/IR/logical-ops.mlir
The file was modifiedmlir/lib/Dialect/SPIRV/IR/SPIRVOps.cpp
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/StandardToSPIRV.cpp
The file was modifiedmlir/test/Target/SPIRV/logical-ops.mlir
The file was modifiedmlir/test/Conversion/StandardToSPIRV/std-ops-to-spirv.mlir
Commit e679eea6d20d6e6e749525827c95f42bfef16285 by spatel
[InstCombine] add tests for abs(sext X); NFC

https://llvm.org/PR48816
The file was modifiedllvm/test/Transforms/InstCombine/abs-intrinsic.ll
Commit 411c144e4c99f4d4370ed2b9c248dc6bb9a39648 by spatel
[InstCombine] narrow abs with sign-extended input

In the motivating cases from https://llvm.org/PR48816 ,
we have a trailing trunc. But that is not required to
reduce the abs width:
https://alive2.llvm.org/ce/z/ECaz-p
...as long as we clear the int-min-is-poison bit (nsw).

We have some existing tests that are affected, and I'm
not sure what the overall implications are, but in general
we favor narrowing operations over preserving nsw/nuw.

If that causes problems, we could restrict this transform
based on type (shouldChangeType() and/or vector vs. scalar).

Differential Revision: https://reviews.llvm.org/D95235
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/abs-intrinsic.ll
The file was modifiedllvm/test/Transforms/InstCombine/abs-1.ll
Commit 07f1e1f44c87d1ee84caf13d6e5aa64eb7e1b068 by pklausler
[flang] Correct shape analysis for transformational intrinsic functions

Correct the analysis of references to transformational intrinsic
functions that have different semantics based on the presence or
absence of a DIM= argument; add shape analysis for UNPACK().

Differential Revision: https://reviews.llvm.org/D94716
The file was modifiedflang/lib/Evaluate/intrinsics.cpp
The file was modifiedflang/lib/Evaluate/shape.cpp
Commit 520b5ecf856152f35ee38207eec39f5674dd2bd4 by Abhina.Sreeskantharajan
[SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests - continued

This is a continuation of https://reviews.llvm.org/D94239. I missed some other spellings of the same error.

Reviewed By: muiez

Differential Revision: https://reviews.llvm.org/D95246
The file was modifiedllvm/test/Object/archive-extract-dir.test
The file was modifiedllvm/test/Object/directory.ll
The file was modifiedllvm/test/tools/llvm-symbolizer/pdb/missing_pdb.test
The file was modifiedllvm/test/tools/llvm-ar/error-opening-directory.test
The file was modifiedllvm/test/tools/llvm-objcopy/wasm/dump-section.test
The file was modifiedllvm/test/tools/llvm-lipo/replace-invalid-input.test
The file was modifiedllvm/test/tools/llvm-ar/move.test
The file was modifiedclang/test/Frontend/output-failures.c
The file was modifiedllvm/test/Object/archive-extract.test
The file was modifiedllvm/test/tools/llvm-ar/quick-append.test
The file was modifiedllvm/test/tools/llvm-lipo/create-arch.test
The file was modifiedllvm/test/tools/llvm-ar/print.test
The file was modifiedclang/test/Driver/clang-offload-bundler.c
The file was modifiedllvm/test/tools/llvm-lto/error.ll
The file was modifiedllvm/test/tools/llvm-libtool-darwin/invalid-input-output-args.test
Commit f187d64c80acd84f3f60799b80eba2485f8866df by pklausler
[flang][nfc] Fix comments, remove needless API, tweak script

* Remove an unimplemented and unused member function declaration
* Remove a misleading comment about an unrelated constraint number
* Fix a comment
* Add f18 crash message to "flang" driver script

Differential Revision: https://reviews.llvm.org/D95180
The file was modifiedflang/include/flang/Parser/provenance.h
The file was modifiedflang/lib/Semantics/assignment.cpp
The file was modifiedflang/tools/f18/flang
The file was modifiedflang/include/flang/Semantics/symbol.h
Commit 8aa3ee241d522ee97558dcbe9ae331c9564cda4c by hoy
[CSSPGO] LTO option for pseudo probe

Adding a lld option to support emitting pseudo probe metadata in LTO mode.

Reviewed By: MaskRay, wmi, wenlei

Differential Revision: https://reviews.llvm.org/D95056
The file was modifiedlld/ELF/LTO.cpp
The file was addedlld/test/ELF/lto/pseudo-probe-lto.ll
The file was modifiedlld/ELF/Config.h
The file was modifiedlld/ELF/Driver.cpp
The file was modifiedlld/ELF/Options.td
Commit bce318f58da3741e6dce143c6713906f3af3d913 by ravishankarm
[mlir][Linalg] NFC: Refactor LinalgDependenceGraphElem to allow
representing dependence from producer result to consumer.

With Linalg on tensors the dependence between operations can be from
the result of the producer to the consumer. This change just does a
NFC refactoring of the LinalgDependenceGraphElem to allow representing
both OpResult and OpOperand*.

Differential Revision: https://reviews.llvm.org/D95208
The file was modifiedmlir/test/Dialect/Linalg/fusion-pattern.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
Commit 3317b38ef86ecee1ae134f419a8ed0f4733444a3 by koraq
[NFC][libc++] Update the implementation status.

During the review of https://reviews.llvm.org/D93912 we failed to notice
the implementation status wasn't updated. This rectifies the issue.
The file was modifiedlibcxx/docs/Cxx2bStatusPaperStatus.csv
Commit 01defcc8d74e65f3d304274bc4ede44d838ff22b by ravishankarm
[mlir][Linalg] Extend tile+fuse to work on Linalg operation on tensors.

Differential Revision: https://reviews.llvm.org/D93086
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Analysis/DependenceAnalysis.h
The file was modifiedmlir/test/Dialect/Linalg/fusion-sequence.mlir
The file was modifiedmlir/test/lib/Transforms/TestLinalgFusionTransforms.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
Commit 73de3df1d28523dbd67dd54594480d126e27b559 by jpienaar
Add more explicit assert for failures

Differential Revision: https://reviews.llvm.org/D95201
The file was modifiedmlir/lib/IR/BuiltinTypes.cpp
Commit faa440786ccf0c2846385c882426d207acbab49c by Louis Dionne
[libc++] Bring back mach_absolute_time implementation of steady_clock

This is meant to unblock Chrome, as discussed in https://llvm.org/D74489.

Differential Revision: https://reviews.llvm.org/D95177
The file was modifiedlibcxx/src/chrono.cpp
Commit 45b259f99509dda6820e09369d84c21d4ea33bcd by nikita.ppv
[SimplifyLibCalls] Skip unused calls in sincos transform

If the call result is unused, we should let it get DCEd rather
than replacing it. Also, don't try to replace an existing sincos
with another one (unless it's as part of combining sin and cos).

This avoids an infinite combine loop if the calls are not DCEd
as expected, which can happen with D94106 and lack of willreturn
annotation in hand-crafted IR.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
Commit 975086b10a6f1ce5a9b78783f085c0da454c30bc by julian.lettner
Remove obsolete TODOs

Remove a few of my own TODOs that I will not have time to fix from lit
code.
The file was modifiedllvm/utils/lit/lit/cl_arguments.py
Commit 29d420e0bf0273cdef35b2d2453f0f574d1e8313 by riddleriver
[mlir][OpFormatGen] Add support for anchoring optional groups with types

This revision adds support for using either operand or result types to anchor an optional group. It also removes the arbitrary restriction that type directives must refer to variables in the same group, which is overly limiting for a declarative format syntax.

Fixes PR#48784

Differential Revision: https://reviews.llvm.org/D95109
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp
The file was modifiedmlir/test/mlir-tblgen/op-format.mlir
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/test/mlir-tblgen/op-format-spec.td
Commit 72f863fd37c3471e7e1b152ac613da00ab6faaba by bjorn.a.pettersson
[CodeGen] Use getCharWidth() more consistently in CGRecordLowering. NFC

When using getByteArrayType the requested size is calculated in
char units, but the type used for the array was hardcoded to the
Int8Ty. This patch is using getCharWIdth a bit more consistently
by using getIntNTy in combination with getCharWidth, instead
of explictly using getInt8Ty.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D94977
The file was modifiedclang/lib/CodeGen/CGRecordLayoutBuilder.cpp
Commit ea2cfda386f1a0f0b8cab06a9400bbf4cf7bfbaa by bjorn.a.pettersson
[CGExpr] Use getCharWidth() more consistently in CCGExprConstant. NFC

Most of CGExprConstant.cpp is using the CharUnits abstraction
and is using getCharWidth() (directly of indirectly) when converting
between size of a char and size in bits. This patch is making that
abstraction more consistent by adding CharTy to the CodeGenTypeCache
(honoring getCharWidth() when mapping from char to LLVM IR types,
instead of using Int8Ty directly).

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D94979
The file was modifiedclang/lib/CodeGen/CGExprConstant.cpp
The file was modifiedclang/lib/CodeGen/CodeGenTypeCache.h
The file was modifiedclang/lib/CodeGen/CodeGenModule.cpp
Commit b973e2e2f27ede7a70d470ea537f1901759d239d by schuett
[libc++] Introduce __bits

It has the low-level bit fiddling operations from bit. It eliminates a cyclic dependency between __bit_reference, bits, and vector. I want to exploit this in later patches.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D94908
The file was modifiedlibcxx/include/CMakeLists.txt
The file was modifiedlibcxx/include/module.modulemap
The file was modifiedlibcxx/include/bit
The file was modifiedlibcxx/include/__bit_reference
The file was addedlibcxx/include/__bits
Commit 42d682a217b6e04318d11d374e29d7d94ceaed1f by aeubanks
[NewPM][AMDGPU] Skip adding CGSCCOptimizerLate callbacks at O0

The legacy PM's EP_CGSCCOptimizerLate was only used under not-O0.

Fixes clang/test/CodeGenCXX/cxx0x-initializer-stdinitializerlist.cpp under the new PM.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D95250
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
Commit 9d2796210f71f95d0c62337c130a455694ce99a5 by nikita.ppv
[Tests] Add willreturn to libcalls in some tests

Willreturn would be inferred by FuncAttrs for these. Annotate them
to preserve test behavior in the future.
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/trunc.ll
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/calls-math-finite.ll
The file was modifiedllvm/test/Transforms/Attributor/nonnull.ll
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/calls.ll
The file was modifiedllvm/test/Transforms/DCE/calls-errno.ll
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/round.ll
Commit 6aced6bf396b78b0021a224bf210ffc3598c3047 by craig.topper
[RISCV] Rename pcnt->cpop to match 0.93 bitmanip spec.

This is the first of multiple patches to bring our 0.92
implementation up to 0.93.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94568
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/MC/RISCV/rv32zbb-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-invalid.s
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv32zbb-invalid.s
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbb.ll
Commit b2f859500f196f98a73d531c2ec847b7f23875af by craig.topper
[RISCV] Remove addiwu, addwu, subwu, subuw, clmulw, clmulrw, clmulhw to match 0.93 bitmanip spec.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94577
The file was removedllvm/test/MC/RISCV/rv64zbc-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was removedllvm/test/MC/RISCV/rv64zbc-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-invalid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
Commit d985c7321f0b9cbaf8f8423a7faa645bb5966fc8 by craig.topper
[RISCV] Swap encodings of max and minu to match 0.93 bitmanip spec.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94580
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/MC/RISCV/rv32zbb-valid.s
Commit b825278364d9551ec3e8eb9f776f722238c9b3d8 by craig.topper
[RISCV] Rename mnemonics slliu.w->slli.uw and addu.w->add.uw to match 0.93 bitmanip spec.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94582
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/MC/RISCV/rv64zbb-invalid.s
Commit 4e6ad11bc6f29eecfbef7f5d5b7e581dd26e2024 by craig.topper
[RISCV] Add Zba feature and move add.uw and slli.uw to it.

Still need to add SH*ADD instructions.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94617
The file was addedllvm/test/CodeGen/RISCV/rv64Zba.ll
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was addedllvm/test/MC/RISCV/rv64zba-valid.s
The file was modifiedclang/test/Driver/riscv-arch.c
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVSubtarget.h
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv64zbb-invalid.s
The file was addedllvm/test/MC/RISCV/rv64zba-invalid.s
Commit 83a93ae63b1c8cc515a08c7fc4b78813e448c874 by craig.topper
[RISCV] Add SH*ADD(.UW) instructions to Zba extension based on 0.93 bitmanip spec.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94637
The file was addedllvm/test/MC/RISCV/rv32zba-invalid.s
The file was addedllvm/test/MC/RISCV/rv32zba-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zba-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zba-valid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit 1355458ef665b3044e3dfb57acf0c2e7439560fe by craig.topper
[RISCV] Move Shift Ones instructions from Zbb to Zbp to match 0.93 bitmanip spec.

It's not really clear in the spec that these are in Zbp now, but
that's what I've gather from previous commits to the spec. I've
file an issue to get it documented properly.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94652
The file was modifiedllvm/test/MC/RISCV/rv32zbp-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv64zbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbp-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbb-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv32zbb-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-invalid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit efbcd66861dbfe4bb3c3c2d83515ca38bb7f18e2 by craig.topper
[RISCV] Rename Zbs instructions to start with just 'b' instead of 'sb' to match 0.93 bitmanip spec.

Also renamed Zbe instructions to resolve name conflict even though
that change is in the 0.94 draft.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94653
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbt.ll
The file was modifiedllvm/test/MC/RISCV/rv32zbs-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbe-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbs-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbe-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbs-invalid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbs.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbs.ll
The file was modifiedllvm/test/MC/RISCV/rv32zbs-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbe-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbe-invalid.s
Commit 9d499e037e6bc3365e6ad1423a388dc7a37627b0 by craig.topper
[RISCV] Modify add.uw patterns to put the masked operand in rs1 to match 0.93 bitmanip spec.

The 0.93 spec has this implementation for add.uw

uint_xlen_t adduw(uint_xlen_t rs1, uint_xlen_t rs2) {
  uint_xlen_t rs1u = (uint32_t)rs1;
  return rs1u + rs2;
}

The 0.92 spec had the usages of rs1 and rs2 swapped.

Reviewed By: frasercrmck, asb

Differential Revision: https://reviews.llvm.org/D95090
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zba.ll
Commit 5ae92f1e11ab4ee23dee32f5a637abbed7fe2dcc by craig.topper
[RISCV] Change zext.w to be an alias of add.uw rd, rs1, x0 instead of pack.

This didn't make it into the published 0.93 spec, but it was the
intention.

But it is in the tex source as of this commit
https://github.com/riscv/riscv-bitmanip/commit/d172f029c074d47026a0c0d0f12d8b475c86a472

This means zext.w now requires Zba. Not sure if we should still use
pack if Zbp is enabled and Zba isn't. I'll leave that for the future
when pack is closer to being final.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94736
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zba.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbbp.ll
The file was modifiedllvm/test/MC/RISCV/rv64b-aliases-valid.s
Commit 83c92fdeda6be9a42739fa699926d41ce8a001fb by craig.topper
[RISCV] Move pack instructions to Zbp extension only.

Zext.h will need to come back to Zbb, but that only uses specific
encodings of pack.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94742
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbp.ll
The file was modifiedllvm/test/MC/RISCV/rv32zbbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbp-valid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/MC/RISCV/rv32zbp-invalid.s
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbp.ll
The file was modifiedllvm/test/MC/RISCV/rv32zbbp-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbbp-valid.s
Commit 3c94cee63b401ca12457395bb1f4d70e161f9ec4 by craig.topper
[RISCV] Add zext.h instruction to Zbb.

zext.h uses the same encoding as pack rd, rs, x0 in rv32 and
packw rd, rs, x0 in rv64. Encodings without x0 as the second source
are not valid in Zbb.

I've added two new instructions with these specific encodings with
predicates that enable them when either Zbb or Zbp is enabled.

The pack spelling will only be accepted with Zbp. The disassembler
will use the zext.h instruction when either feature is enabled.

Using the pack spelling will print as pack when llvm-mc is
emitting text. We could fix this with some custom code in
processInstruction if this is important, but I'm not sure it is.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94818
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv64b-aliases-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32b-aliases-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbb-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
Commit 4d5aa760a7d78b601fcfbda4d6196091a9188ea6 by craig.topper
[RISCV] Add support for rev8 and orc.b to Zbb.

These instructions use a portion of the encodings for grevi and
gorci. The full encodings are only supported with Zbp. Note,
rev8 has a different encoding between rv32 and rv64.

Zbb is closer to being finalized that Zbp which has motivated
some decisions in this patch.

I'm treating rev8 and orc.b as separate instructions when
either Zbb or Zbp is enabled. This allows us to print to suggest
that either feature needs to be enabled to support these mnemonics.
I had tried to put HasStdExtZbbAndNotZbp on the Zbb instructions,
but that caused a diagnostic that said Zbp is required if neither
feature is enabled. We should really mention Zbb since its closer
to final.

This does require extra isel patterns for the different cases so
that bswap will always print as rev8 in assembly listing since
we can't use an InstAlias.

llvm-objdump disassembling should always pick the rev8 or orc.b
instructions. llvm-mc parsing and printing text will not convert
the grevi/gorci spellings to rev8/gorc.b. We could probably fix
this with a special case in processInstruction in the assembly
parser if it its important.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94944
The file was modifiedllvm/test/MC/RISCV/rv64b-aliases-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbp-valid.s
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv64zbp-valid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbb.ll
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32b-aliases-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbb-valid.s
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit f25f7e8ecd914baf5bcc0f51cb893d5a696d85ff by craig.topper
[RISCV] Add xperm.* instructions to Zbp extension.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D94999
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/MC/RISCV/rv64zbp-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbp-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbp-valid.s
Commit 20f2e32d2c545e6e23dc5c69c42caac7a4bca0fc by craig.topper
[RISCV] Update B extension version to 0.93.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D95002
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedclang/test/Driver/riscv-arch.c
The file was modifiedclang/test/Preprocessor/riscv-target-features.c
Commit 430d43e010bdd07d73c4d0d6536206d22d35a2cb by ravishankarm
[mlir][Linalg] Disable fusion of tensor_reshape op by expansion when unit-dims are involved

Fusion of generic/indexed_generic operations with tensor_reshape by
expansion when the latter just adds/removes unit-dimensions is
disabled since it just adds unit-trip count loops.

Differential Revision: https://reviews.llvm.org/D94626
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/FusionOnTensors.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Passes.h
The file was modifiedmlir/test/Dialect/Linalg/reshape_fusion.mlir
The file was modifiedmlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir
Commit fdab28edef35dde906678cd3c3008dd116ea8572 by nikita.ppv
[InstSimplify] Add willreturn to more libcall tests (NFC)

Annotate more math libcalls with willreturn. The attribute would
have been added by the InferFuncAttrs.
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/math-2.ll
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/math-1.ll
Commit 99a0aa07e9f4fa239b7927ede1847cfc78b16803 by froese
[Analysis] Support AIX vec_malloc routines

This is to support the memory routines vec_malloc, vec_calloc, vec_realloc, and vec_free. These routines manage memory that is 16-byte aligned. And they are only available on AIX.

Differential Revision: https://reviews.llvm.org/D94710
The file was modifiedllvm/unittests/Analysis/TargetLibraryInfoTest.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetLibraryInfo.def
The file was modifiedllvm/lib/Analysis/TargetLibraryInfo.cpp
The file was modifiedllvm/lib/Analysis/MemoryBuiltins.cpp
The file was modifiedllvm/lib/Transforms/Utils/BuildLibCalls.cpp
Commit 095e245e164584b5de3c2938452b48d1f8ba4dda by craig.topper
[RISCV] Add isel patterns for SH*ADD(.UW)

This adds an initial set of patterns for these instructions. Its
more complicated that I would like for the sh*add.uw instructions
because there is no guaranteed canonicalization for shl/and with
constants.

Reviewed By: asb

Differential Revision: https://reviews.llvm.org/D95106
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zba.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was addedllvm/test/CodeGen/RISCV/rv32Zba.ll
Commit d6c763e0985fb69ceec4d2d3cebfc1910f8cc58d by flo
[Inline] Precommit tests for dead calls and willreturn.

precommit tests for D94106.
The file was addedllvm/test/Transforms/Inline/dead-calls-willreturn.ll
Commit 083088d136baa93650a36d018d2a50717de0df9d by llvmgnsyncbot
[gn build] Port 622eaa4a4cea
The file was modifiedllvm/utils/gn/secondary/llvm/lib/IR/BUILD.gn
Commit 041f3ee664c925148d1cfe48976ae671a660c949 by jezng
[lld-macho] Ignore -lto_library

Just getting rid of some logspew as I test LLD under existing build
systems.

Reviewed By: #lld-macho, smeenai

Differential Revision: https://reviews.llvm.org/D95213
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/test/MachO/silent-ignore.test
Commit 607e5a5000bddec24061b54a7e7955d51fe0d049 by craig.topper
[RISCV] Add B extension tests to make sure RV64 only instructions aren't accepted in RV32.

Add tests to make sure common instructions are accepted in RV64
and not just RV32.

Reviewed By: asb, frasercrmck

Differential Revision: https://reviews.llvm.org/D95150
The file was modifiedllvm/test/MC/RISCV/rv64zbr-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbproposedc-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zba-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbbp-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbs-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbf-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbt-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbt-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbs-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbb-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbf-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbr-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbe-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zba-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbp-invalid.s
The file was addedllvm/test/MC/RISCV/rv64zbc-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbb-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv64zbp-valid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbe-invalid.s
The file was modifiedllvm/test/MC/RISCV/rv32zbproposedc-invalid.s
Commit 2bb92bf451d7eb2c817f3e5403353e7c0c14d350 by Amara Emerson
[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method

The widenScalar implementation for signed and unsigned overflowing
operations were very similar: both are checked by truncating the result
and then re-sign/zero-extending it and checking that it matches the
computed operation.

Using a truncate + zero-extend for the unsigned case instead of manually
producing the AND instruction like before leads to an extra copy
instruction during legalization, but this should be harmless.

Differential Revision: https://reviews.llvm.org/D95035
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
The file was modifiedllvm/test/CodeGen/AArch64/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Commit 0be9ca7c0f9a733f846bb6bc4e8e36d46b518162 by Jonas Devlieghere
[VFS] Fix inconsistencies between relative paths and fallthrough.

This patch addresses inconsistencies in the way fallthrough is handled
in the RedirectingFileSystem. Rather than trying to change the working
directory of the external filesystem, the RedirectingFileSystem will
canonicalize every path before handing it down. This guarantees that
relative paths are resolved relative to the RedirectingFileSystem's
working directory.

This allows us to have a strictly virtual working directory, and still
fallthrough for absolute paths, but not for relative paths that would
get resolved incorrectly at the lower layer (for example, in case of the
RealFileSystem, because the strictly virtual path does not exist).

Differential revision: https://reviews.llvm.org/D95188
The file was modifiedllvm/include/llvm/Support/VirtualFileSystem.h
The file was modifiedllvm/lib/Support/VirtualFileSystem.cpp
The file was modifiedllvm/unittests/Support/VirtualFileSystemTest.cpp
Commit 9bd8bcf993f6e829b2417deefbab78c610436a11 by lebedev.ri
[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): fix instruction name preservation

NewBonusInst just took name from BonusInst, so BonusInst has no name,
so BonusInst.getName() makes no sense.
So we need to ask NewBonusInst for the name.
The file was modifiedllvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit e8387500059e7f3c261b2127a241b2c4c81ab36b by lebedev.ri
[NFC][SimplifyCFG] fold-branch-to-common-dest.ll: reduce complexity of @pr48450* test

We don't need that many iterations there,
having less iterations helps alive2 verify it.
The file was modifiedllvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
Commit eae1cc0de5b9c3b97ce1b6f4275b474ab10b83d0 by lebedev.ri
[NFC][SimplifyCFG] PerformBranchToCommonDestFolding(): move instruction cloning to after CFG update

This simplifies follow-up patch, and is NFC otherwise.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 17422038442c9e2b572c7324b5a22d32e7fd9b83 by lebedev.ri
[SimplifyCFG] FoldBranchToCommonDest(): re-lift restrictions on liveout uses of bonus instructions

I have previously tried doing that in
b33fbbaa34f0fe9fb16789afc72ae424c1825b69 / d38205144febf4dc42c9270c6aa3d978f1ef65e1,
but eventually it was pointed out that the approach taken there
was just broken wrt how the uses of bonus instructions are updated
to account for the fact that they should now use either bonus instruction
or the cloned bonus instruction. In particluar, all that manual handling
of PHI nodes in successors was just wrong.

But, the fix is actually much much simpler than my initial approach:
just tell SSAUpdate about both instances of bonus instruction,
and let it deal with all the PHI handling.

Alive2 confirms that the reproducers from the original bugs (@pr48450*)
are now handled correctly.

This effectively reverts commit 59560e85897afc50090b6c3d920bacfd28b49d06,
effectively relanding b33fbbaa34f0fe9fb16789afc72ae424c1825b69.
The file was modifiedllvm/test/Transforms/SimplifyCFG/fold-branch-to-common-dest.ll
The file was modifiedllvm/test/Transforms/LoopUnroll/peel-loop-inner.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float16regloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float32regloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-postinc-lsr.ll
Commit 554b3211fefd09b56b64357b9edd66c78ae200b5 by 31459023+hctim
Revert "[GlobalISel] LegalizerHelper - Extract widenScalarAddoSubo method"

This reverts commit 2bb92bf451d7eb2c817f3e5403353e7c0c14d350.

Dependent patch broke UBSan on Android:
3dedad475da45c05bc4f66cd14e9f44581edf0bc
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/test/CodeGen/AArch64/legalize-uaddo.mir
Commit e3a7532cc95ea0b7f748793db44caa95a92ad6d8 by 31459023+hctim
Revert "[AArch64][GlobalISel] Implement widenScalar for signed overflow"

This reverts commit 541d98efa222b00e16c67348810898c2fa11f398.

Reason: Dependent patch 3dedad475da45c05bc4f66cd14e9f44581edf0bc broke
UBSan on Android: http://lab.llvm.org:8011/#/builders/77/builds/3082
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
Commit 19ec559c665e6490480cfdff9982b2c32a432b78 by 31459023+hctim
Revert "[AArch64][GlobalISel] Make G_USUBO legal and select it."

This reverts commit 3dedad475da45c05bc4f66cd14e9f44581edf0bc.

Broke UBSan on Android:
http://lab.llvm.org:8011/#/builders/77/builds/3082

More details at: https://reviews.llvm.org/D95032
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
The file was removedllvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
Commit 0cc38acfc4e1dcdc2a9b6287bc93eef57acfd105 by francisvm
[Matrix] Propagate shape information through fneg

Similar to binary operators like fadd/fmul/fsub, propagate shape info
through unary operators (fneg is the only one?).

Differential Revision: https://reviews.llvm.org/D95252
The file was modifiedllvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
The file was modifiedllvm/test/Transforms/LowerMatrixIntrinsics/propagate-backward.ll
The file was modifiedllvm/test/Transforms/LowerMatrixIntrinsics/propagate-forward.ll
Commit 6e8ef3b76ab65960edd6ee99f387e75564d8d9db by ravishankarm
[mlir][Linalg] Make Fill operation work on tensors.

Depends on D95109
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/test/Dialect/Linalg/tile-tensors.mlir
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
Commit d65e8ee507f82ddca018267d0ce627518dd07337 by craig.topper
[RISCV] Add more cmov isel patterns to handle seteq/ne with a small non-zero immediate.

Similar to our free standing setcc patterns, we can use ADDI to
subtract the immediate from the other operand. Then the cmov
can check if the result is zero or non-zero.

Reviewed By: mundaym

Differential Revision: https://reviews.llvm.org/D95169
The file was modifiedllvm/test/CodeGen/RISCV/select-optimize-multiple.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit 6ef95056b9dce1aa64d975b70f059673484bed87 by paul.robinson
[RGT][ADT] Remove test assertion that will not be executed

Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95255
The file was modifiedllvm/unittests/ADT/ImmutableSetTest.cpp
Commit 3a50ed84f4823fb0e7b385cc22fef12435dfd376 by Jonas Devlieghere
[lldb] FixFileSystem::GetExternalPath for VFS API change
The file was modifiedlldb/source/Host/common/FileSystem.cpp
Commit 6ea7ecbb72aa139ebb1a343a6d544b84b99f1f3a by paul.robinson
[RGT] Don't use EXPECT* macros in a subprocess that exits by signalling

Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95256
The file was modifiedllvm/unittests/Support/CrashRecoveryTest.cpp
Commit 25fefa5a098e958888496735f793fd01f3e82874 by paul.robinson
[RGT][TextAPI] Remove a zero-trip loop and the assertions within it

Found by the Rotten Green Tests project.

Differential Revision: https://reviews.llvm.org/D95259
The file was modifiedllvm/unittests/TextAPI/TextStubV4Tests.cpp
Commit d18c3c7b18e9e78145d701c4687682848071ab98 by n.james93
[CodeComplete] Add ranged for loops code pattern.

Add code pattersn for c++ `range for` loops and objective c `for...in` loops.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D95131
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
Commit e92be7cd9f03ab3eb8c4a21e686743c2575a169a by richard
PR47682: Merge the DeclContext of a merged FunctionDecl before we inherit
default arguments.

When a function is declared with a qualified name, its eventual semantic
DeclContext may differ from the scope specified by the qualifier if it
redeclares a function in an inline namespace. In this case, we need to
update the DeclContext to be that of the previous declaration, and we
need to do so before we decide whether to inherit default arguments from
that previous declaration, because we only inherit default arguments
from declarations in the same scope.
The file was modifiedclang/test/SemaCXX/default1.cpp
The file was modifiedclang/lib/Sema/SemaDecl.cpp
Commit 607bec0bb9f787acca95f53dabe6a5c227f6b6b2 by Stanislav.Mekhanoshin
Change materializeFrameBaseRegister() to return register

The only caller of this function is in the LocalStackSlotAllocation
and it creates base register of class returned by the target's
getPointerRegClass(). AMDGPU wants to use a different reg class
here so let materializeFrameBaseRegister to just create and return
whatever it wants.

Differential Revision: https://reviews.llvm.org/D95268
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
The file was modifiedllvm/lib/Target/ARM/ARMBaseRegisterInfo.h
The file was modifiedllvm/lib/CodeGen/LocalStackSlotAllocation.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modifiedllvm/include/llvm/CodeGen/TargetRegisterInfo.h
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
Commit ca904b81e6488b45cbfe846dc86f1406b8e9c03d by Stanislav.Mekhanoshin
[AMDGPU] Fix FP materialization/resolve with flat scratch

Differential Revision: https://reviews.llvm.org/D95266
The file was modifiedllvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/flat-scratch.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
Commit ad25bdcb8e4e9459886062d3855a5971af758731 by Jason Molenda
Change static buffer to be BSS instead of DATA in HandlePacket_qSpeedTest

Having this 4MB buffer with a compile-time initialized string forced it
into the DATA section and it took up 4MB of space in the binary, which
accounts for like 80% of debugserver's footprint on disk.  Change it to
BSS and strcpy in the initial value at runtime instead.

<rdar://problem/73503892>
The file was modifiedlldb/tools/debugserver/source/RNBRemote.cpp
Commit 47e95e87a3e4f738635ff965616d4e2d96bf838a by jonathanchesterfield
[libomptarget] Build cuda plugin without cuda installed locally

[libomptarget] Build cuda plugin without cuda installed locally

Compiles a new file, `plugins/cuda/dynamic_cuda/cuda.cpp`, to an object file that exposes the same symbols that the plugin presently uses from libcuda. The object file contains dlopen of libcuda and cached dlsym calls. Also provides a cuda.h containing the subset that is used.

This lets the cmake file choose between the system cuda and a dlopen shim, with no changes to rtl.cpp.

The corresponding change to amdgpu is postponed until after a refactor of the plugin to reduce the size of the hsa.h stub required

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95155
The file was addedopenmp/libomptarget/plugins/cuda/dynamic_cuda/cuda.h
The file was addedopenmp/libomptarget/include/dlwrap.h
The file was addedopenmp/libomptarget/plugins/cuda/dynamic_cuda/cuda.cpp
The file was modifiedopenmp/libomptarget/plugins/cuda/CMakeLists.txt
Commit ba5628f2c2a9de049b80b3e276f7e05f481c49e7 by Duncan P. N. Exon Smith
ADT: Use 'using' to inherit assign and append in SmallString

Rather than reimplement, use a `using` declaration to bring in
`SmallVectorImpl<char>`'s assign and append implementations in
`SmallString`.

The `SmallString` versions were missing reference invalidation
assertions from `SmallVector`. This patch also fixes a bug in
`llvm::FileCollector::addFileImpl`, which was a copy/paste from
`clang::ModuleDependencyCollector::copyToRoot`, both caught by the
no-longer-skipped assertions.

As a drive-by, this also sinks the `const SmallVectorImpl&` versions of
these methods down into `SmallVectorImpl`, since I imagine they'd be
useful elsewhere.

Differential Revision: https://reviews.llvm.org/D95202
The file was modifiedllvm/unittests/ADT/SmallVectorTest.cpp
The file was modifiedllvm/include/llvm/ADT/SmallVector.h
The file was modifiedllvm/lib/Support/FileCollector.cpp
The file was modifiedclang/lib/Frontend/ModuleDependencyCollector.cpp
The file was modifiedllvm/include/llvm/ADT/SmallString.h
Commit ef51eed37b7ed67b3c0e5f70fa61d681ba21787d by listmail
[LoopDeletion] Handle inner loops w/untaken backedges

This builds on the restricted after initial revert form of D93906, and adds back support for breaking backedges of inner loops. It turns out the original invalidation logic wasn't quite right, specifically around the handling of LCSSA.

When breaking the backedge of an inner loop, we can cause blocks which were in the outer loop only because they were also included in a sub-loop to be removed from both loops. This results in the exit block set for our original parent loop changing, and thus a need for new LCSSA phi nodes.

This case happens when the inner loop has an exit block which is also an exit block of the parent, and there's a block in the child which reaches an exit to said block without also reaching an exit to the parent loop.

(I'm describing this in terms of the immediate parent, but the problem is general for any transitive parent in the nest.)

The approach implemented here involves a potentially expensive LCSSA rebuild.  Perf testing during review didn't show anything concerning, but we may end up needing to revert this if anyone encounters a practical compile time issue.

Differential Revision: https://reviews.llvm.org/D94378
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopDeletion.cpp
The file was modifiedllvm/test/Transforms/LoopDeletion/zero-btc.ll
The file was modifiedllvm/test/Transforms/IndVarSimplify/X86/pr45360.ll
Commit 97e33feb08aa9c042408862e555423f037753e12 by kai.wang
[RISCV] Implement vloxseg/vluxseg intrinsics.

Define vloxseg/vluxseg intrinsics and pseudo instructions.
Lower vloxseg/vluxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94903
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
Commit a41cb92eb81b3c1446b563f1483fbe71feecc1ee by kai.wang
[RISCV] Add RV32 test cases for vluxseg.

Differential Revision: https://reviews.llvm.org/D95193
The file was addedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv32.ll
Commit b23fe6ff6ff736a5d319598bc818defc09968200 by kai.wang
[RISCV] Add RV64 test cases for vluxseg.

Differential Revision: https://reviews.llvm.org/D95190
The file was addedllvm/test/CodeGen/RISCV/rvv/vluxseg-rv64.ll
Commit 9e5beadf1805a5906c2ea0d04eb615ce5f92508b by kai.wang
[RISCV] Add RV32 test cases for vloxseg.

Differential Revision: https://reviews.llvm.org/D95191
The file was addedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv32.ll
Commit c28bbd97a15d1942ba63998e7ba8609cc87b38ae by kai.wang
[RISCV] Add RV64 test cases for vloxseg.

Differential Revision: https://reviews.llvm.org/D95192
The file was addedllvm/test/CodeGen/RISCV/rvv/vloxseg-rv64.ll
Commit 66a49aef690cb2980152d3cfa867e797bbda54be by kai.wang
[RISCV] Implement vsoxseg/vsuxseg intrinsics.

Define vsoxseg/vsuxseg intrinsics and pseudo instructions.
Lower vsoxseg/vsuxseg intrinsics to pseudo instructions in RISCVDAGToDAGISel.

Differential Revision: https://reviews.llvm.org/D94940
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsRISCV.td
Commit a28755003782b97062b19867cfab201816d8dd5f by kai.wang
[RISCV] Add RV32 test cases for vsuxseg.

Differential Revision: https://reviews.llvm.org/D95196
The file was addedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv32.ll
Commit 438e118c29a0610dbd44569aff54b5d87684b333 by kai.wang
[RISCV] Add RV64 test cases for vsuxseg.

Differential Revision: https://reviews.llvm.org/D95197
The file was addedllvm/test/CodeGen/RISCV/rvv/vsuxseg-rv64.ll
Commit 408ed11c85d9e70131b77a9125775ace3643663c by kai.wang
[RISCV] Add RV32 test cases for vsoxseg.

Differential Revision: https://reviews.llvm.org/D95194
The file was addedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv32.ll
Commit dc94cecac036b151cb4cababf5b0d986df39ac23 by kai.wang
[RISCV] Add RV64 test cases for vsoxseg.

Differential Revision: https://reviews.llvm.org/D95195
The file was addedllvm/test/CodeGen/RISCV/rvv/vsoxseg-rv64.ll
Commit 480cbed31e74b0db3d31d78789b639af250ce9fe by hansang.bae
[OpenMP] Remove unnecessary pointer checks in a few locations

Also, return NULL from unsuccessful OMPT function lookup.

Differential Revision: https://reviews.llvm.org/D95277
The file was modifiedopenmp/runtime/src/kmp_taskdeps.cpp
The file was modifiedopenmp/runtime/src/ompt-general.cpp
Commit 867bdfeff1786f9f910c7cd4689fe56d9dcdf162 by zequanwu
[InstCombine] remove incompatible attribute when simplifying some lib calls

Like D95088, remove incompatible attribute in more lib calls.

Differential Revision: https://reviews.llvm.org/D95278
The file was modifiedllvm/test/Transforms/InstCombine/strcpy-1.ll
The file was modifiedllvm/test/Transforms/InstCombine/memmove-1.ll
The file was modifiedllvm/test/Transforms/InstCombine/memset_chk-1.ll
The file was modifiedllvm/test/Transforms/InstCombine/stpcpy-1.ll
The file was modifiedllvm/lib/Transforms/Utils/SimplifyLibCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/memmove_chk-1.ll
The file was modifiedllvm/test/Transforms/InstCombine/memcpy_chk-1.ll
The file was modifiedllvm/test/Transforms/InstCombine/memset-1.ll
The file was modifiedllvm/test/Transforms/InstCombine/strncpy-1.ll
The file was modifiedllvm/test/Transforms/InstCombine/memcpy-1.ll
Commit bd64ad3fe17506933ac2971dcc900271d6ae5969 by Amara Emerson
Recommit "[AArch64][GlobalISel] Make G_USUBO legal and select it."

The expansion for wide subtractions includes G_USUBO.

Differential Revision: https://reviews.llvm.org/D95032

This was miscompiling on ubsan bots.
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-saddo.mir
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-ssubo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-add.mir
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/select-usubo.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-sub.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir
Commit eda973bbc7ae5327ee8451ba798dec63c550843e by i
[ELF][test] Add a test about --exclude-libs applying to version symbols

D94280 also fixed PR48702.
The file was modifiedlld/ELF/Driver.cpp
The file was addedlld/test/ELF/exclude-libs-versym.s
Commit 6fe193bf271521c5dd1a50949e83b246a9820ce2 by i
[test] Add -mtriple
The file was modifiedlld/test/ELF/exclude-libs-versym.s
Commit dd922bc2a62163cef442646974324943c551725e by Dan Liew
[LSan] Introduce a callback mechanism to allow adding data reachable from ThreadContexts to the frontier.

This mechanism is intended to provide a way to treat the `arg` pointer
of a created (but not yet started) thread as reachable. In future
patches this will be implemented in `GetAdditionalThreadContextPtrs`.

A separate implementation of `GetAdditionalThreadContextPtrs` exists
for ASan and LSan runtimes because they need to be implemented
differently in future patches.

rdar://problem/63537240

Differential Revision: https://reviews.llvm.org/D95183
The file was modifiedcompiler-rt/lib/asan/asan_allocator.cpp
The file was modifiedcompiler-rt/lib/lsan/lsan_common.cpp
The file was modifiedcompiler-rt/lib/lsan/lsan_common.h
The file was modifiedcompiler-rt/lib/lsan/lsan_allocator.cpp
Commit 147c0c263d88a9702aba17fbeac62ff83e6c1319 by craig.topper
[TargetLowering] Use isOneConstant to simplify some code. NFC
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 6c43564530365ac2c074d7515d4eada294d4ca0c by lxfind
[Coroutine] Improve coro-elide-musttail.ll test

The test wasn't sensitive to alias analysis. As you can seen from D95117 when AA is added by default this is affected.
Updating the test so that it coveres both cases for AA analysis.
Note that this patch depends on D95117 to land first.

Differential Revision: https://reviews.llvm.org/D95247
The file was modifiedllvm/test/Transforms/Coroutines/coro-elide-musttail.ll
Commit 018984ae6833fae107aa9c502ab5536efceca88e by brad
[PowerPC] Fix va_arg in C++, Objective-C on 32-bit ELF targets

In the PPC32 SVR4 ABI, a va_list has copies of registers from the function call.
va_arg looked in the wrong registers for (the pointer representation of) an
object in Objective-C, and for some types in C++. Fix va_arg to look in the
general-purpose registers, not the floating-point registers. Also fix va_arg
for some C++ types, like a member function pointer, that are aggregates for
the ABI.

Anthony Richardby found the problem in Objective-C. Eli Friedman suggested
part of this fix.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47921

Reviewed By: efriedma, nemanjai

Differential Revision: https://reviews.llvm.org/D90329
The file was addedclang/test/CodeGenCXX/ppc32-varargs-method.cpp
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp
The file was addedclang/test/CodeGenObjC/ppc32-varargs-id.m
Commit a3254904b28cbc392baa8011f1da8172538ff077 by kazu
[Analysis] Use llvm::append_range (NFC)
The file was modifiedllvm/lib/Analysis/DependenceGraphBuilder.cpp
The file was modifiedllvm/lib/Analysis/LoopNestAnalysis.cpp
The file was modifiedllvm/lib/Analysis/LoopCacheAnalysis.cpp
The file was modifiedllvm/lib/Analysis/MustExecute.cpp
The file was modifiedllvm/lib/Analysis/BasicAliasAnalysis.cpp
The file was modifiedllvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/lib/Analysis/MemoryDependenceAnalysis.cpp
The file was modifiedllvm/lib/Analysis/DDG.cpp
Commit 5f843b2dd2ee1f36162a861ef02b2b4bc4dc79b7 by kazu
[llvm] Use isAlpha/isAlnum (NFC)
The file was modifiedllvm/utils/TableGen/AsmMatcherEmitter.cpp
The file was modifiedllvm/utils/TableGen/AsmWriterEmitter.cpp
The file was modifiedllvm/include/llvm/Bitstream/BitCodes.h
The file was modifiedllvm/lib/MC/MCAsmInfo.cpp
The file was modifiedllvm/utils/TableGen/AsmWriterInst.cpp
The file was modifiedllvm/lib/Support/YAMLParser.cpp
The file was modifiedllvm/lib/IR/Mangler.cpp
Commit 49231c1f80803ae0f15963cce708cedf6e44088f by kazu
[llvm] Use static_assert instead of assert (NFC)

Identified with misc-static-assert.
The file was modifiedllvm/lib/Target/X86/X86InsertPrefetch.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/include/llvm/IR/InstrTypes.h
The file was modifiedllvm/lib/Support/SHA1.cpp
The file was modifiedllvm/lib/Object/XCOFFObjectFile.cpp
The file was modifiedllvm/utils/TableGen/X86DisassemblerTables.cpp
Commit 596d534ac3524052df210be8d3c01a33b2260a42 by Dan Liew
[ASan] Stop blocking child thread progress from parent thread in `pthread_create` interceptor.

Previously in ASan's `pthread_create` interceptor we would block in the
`pthread_create` interceptor waiting for the child thread to start.

Unfortunately this has bad performance characteristics because the OS
scheduler doesn't know the relationship between the parent and child
thread (i.e. the parent thread cannot make progress until the child
thread makes progress) and may make the wrong scheduling decision which
stalls progress.

It turns out that ASan didn't use to block in this interceptor but was
changed to do so to try to address
http://llvm.org/bugs/show_bug.cgi?id=21621/.

In that bug the problem being addressed was a LeakSanitizer false
positive. That bug concerns a heap object being passed
as `arg` to `pthread_create`. If:

* The calling thread loses a live reference to the object (e.g.
  `pthread_create` finishes and the thread no longer has a live
  reference to the object).
* Leak checking is triggered.
* The child thread has not yet started (once it starts it will have a
  live reference).

then the heap object will incorrectly appear to be leaked.

This bug is covered by the `lsan/TestCases/leak_check_before_thread_started.cpp` test case.

In b029c5101fb49b3577a1c322f42ef9fc616f25bf ASan was changed to block
in `pthread_create()` until the child thread starts so that `arg` is
kept alive for the purposes of leaking check.

While this change "works" its problematic due to the performance
problems it causes. The change is also completely unnecessary if leak
checking is disabled (via detect_leaks runtime option or
CAN_SANITIZE_LEAKS compile time config).

This patch does two things:

1. Takes a different approach to solving the leak false positive by
   making LSan's leak checking mechanism treat the `arg` pointer of
   created but not started threads as reachable.  This is done by
   implementing the `ForEachRegisteredThreadContextCb` callback for
   ASan.

2. Removes the blocking behaviour in the ASan `pthread_create`
   interceptor.

rdar://problem/63537240

Differential Revision: https://reviews.llvm.org/D95184
The file was modifiedcompiler-rt/lib/asan/asan_allocator.cpp
The file was modifiedcompiler-rt/lib/asan/asan_interceptors.cpp
The file was modifiedcompiler-rt/lib/asan/asan_thread.h
The file was modifiedcompiler-rt/lib/asan/asan_thread.cpp
Commit 267a57a64572cffbb74599878bdcc9f3b678ffa3 by serguei.n.dmitriev
[llvm-link] Fix for an assertion when linking global with appending linkage

This patch fixes llvm-link assertion when linking external variable
declaration with a definition with appending linkage.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95126
The file was addedllvm/test/Linker/appending-global-err2.ll
The file was addedllvm/test/Linker/appending-global-err4.ll
The file was addedllvm/test/Linker/appending-global-err1.ll
The file was modifiedllvm/lib/Linker/LinkModules.cpp
The file was addedllvm/test/Linker/Inputs/appending-global.ll
The file was addedllvm/test/Linker/appending-global-proto.ll
The file was modifiedllvm/lib/Linker/IRMover.cpp
The file was addedllvm/test/Linker/appending-global-err3.ll
The file was addedllvm/test/Linker/appending-global-err5.ll
Commit d4ce062340064c3f73b8f6136c7350a5abe83cac by roger.ferrer
[RISCV][PrologEpilogInserter] "Float" emergency spill slots to avoid making them immediately unreachable from the stack pointer

In RISC-V there is a single addressing mode of the form imm(reg) where
imm is a signed integer of 12-bit with a range of [-2048..2047] bytes
from reg.

The test MultiSource/UnitTests/C++11/frame_layout of the LLVM test-suite
exercises several scenarios with the stack, including function calls
where the stack will need to be realigned to to a local variable having
a large alignment of 4096 bytes.

In situations of large stacks, the RISC-V backend (in
RISCVFrameLowering) reserves an extra emergency spill slot which can be
used (if no free register is found) by the register scavenger after the
frame indexes have been eliminated. PrologEpilogInserter already takes
care of keeping the emergency spill slots as close as possible to the
stack pointer or frame pointer (depending on what the function will
use). However there is a final alignment step to honour the maximum
alignment of the stack that, when using the stack pointer to access the
emergency spill slots, has the side effect of setting them farther from
the stack pointer.

In the case of the frame_layout testcase, the net result is that we do
have an emergency spill slot but it is so far from the stack pointer
(more than 2048 bytes due to the extra alignment of a variable to 4096
bytes) that it becomes unreachable via any immediate offset.

During elimination of the frame index, many (regular) offsets of the
stack may be immediately unreachable already. Their address needs to be
computed using a register. A virtual register is created and later
RegisterScavenger should be able to find an unused (physical) register.
However if no register is available, RegisterScavenger will pick a
physical register and spill it onto an emergency stack slot, while we
compute the offset (restoring the chosen register after all this). This
assumes that the emergency stack slot is easily reachable (this is,
without requiring another register!).

This is the assumption we seem to break when we perform the extra
alignment in PrologEpilogInserter.

We can "float" the emergency spill slots by increasing (in absolute
value) their offsets from the incoming stack pointer. This way the
emergency spill slots will remain close to the stack pointer (once the
function has allocated storage for the stack, including the needed
realignment). The new size computed in PrologEpilogInserter is padding
so it should be OK to move the emergency spill slots there. Also because
we're increasing the alignment, the new location should stay aligned for
the purpose of the emergency spill slots.

Note that this change also impacts other backends as shown by the tests.
Changes are minor adjustments to the emergency stack slot offset.

Differential Revision: https://reviews.llvm.org/D89239
The file was modifiedllvm/test/CodeGen/Thumb/emergency-spill-slot.ll
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
The file was modifiedllvm/test/CodeGen/AArch64/framelayout-scavengingslot.mir
The file was modifiedllvm/test/CodeGen/AArch64/framelayout-sve-scavengingslot.mir
The file was addedllvm/test/CodeGen/RISCV/out-of-reach-emergency-slot.mir
The file was modifiedllvm/test/CodeGen/AArch64/swiftself-scavenger.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-scavenge-vgpr-spill.mir
Commit 344afa853fcfcc085cb5c957b4a07c7ea013bb1b by llvm-dev
[Support] TrigramIndex::insert - pass std::String argument by const reference. NFCI.

Avoid string copies and fix clang-tidy warning.
The file was modifiedllvm/include/llvm/Support/TrigramIndex.h
The file was modifiedllvm/lib/Support/TrigramIndex.cpp
Commit 2b9a834c43cb1f93d33958c14b695896bb4e9c1e by jeroen.dobbelaere
[InlineFunction] Use llvm.experimental.noalias.scope.decl for noalias arguments.

Insert a llvm.experimental.noalias.scope.decl intrinsic that identifies where a noalias argument was inlined.

This patch includes some refactorings from D90104.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D93040
The file was modifiedllvm/test/Transforms/Inline/noalias-calls.ll
The file was addedllvm/test/Transforms/Inline/noalias-calls2.ll
The file was modifiedllvm/test/Transforms/Coroutines/ArgAddr.ll
The file was modifiedllvm/test/Transforms/Coroutines/ex4.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-resume-values.ll
The file was modifiedllvm/test/Transforms/Inline/noalias-calls-always.ll
The file was modifiedllvm/test/Transforms/Coroutines/ex3.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon.ll
The file was modifiedllvm/test/Transforms/Inline/noalias.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-value.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/pr39282.ll
The file was modifiedllvm/test/Transforms/Coroutines/ex2.ll
The file was modifiedllvm/test/Transforms/Inline/noalias2.ll
The file was modifiedclang/test/CodeGen/aarch64-ls64.c
The file was modifiedllvm/test/Transforms/Inline/launder.invariant.group.ll
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
The file was modifiedllvm/test/Transforms/Inline/noalias-cs.ll
Commit 08dbcc14e254396cd5765994cab97274003611bb by flo
[LTO] Store target attributes as vector of strings (NFC).

The target features are obtained as a list of features/attributes.
Instead of storing them in a single string, store the vector. This
matches lto::Config's behavior and simplifies the transition to
lto::backend().

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D95224
The file was modifiedllvm/lib/LTO/LTOCodeGenerator.cpp
The file was modifiedllvm/include/llvm/LTO/legacy/LTOCodeGenerator.h
The file was modifiedllvm/tools/lto/lto.cpp
The file was modifiedllvm/tools/llvm-lto/llvm-lto.cpp
Commit a49a3a3ed568244b12d6f553240485696e084f4a by nikita.ppv
[LSR] Add test for PR46943 (NFC)

LSR should be dropping nowrap flags when adding new postinc users.
The file was addedllvm/test/Transforms/LoopStrengthReduce/X86/pr46943.ll
Commit 2325157c0568ffd16f3318ad54f947e4e2109ef6 by aykevanlaethem
[Clang] Move assembler into a separate file

This change adds an AssemblerInvocation class, similar to the
CompilerInvocation class. It can be used to invoke cc1as directly.

The project I'm working on wants to compile Clang and use it as a static
library. For that to work, there must be a way to invoke the assembler
programmatically, using the same arguments as you would otherwise pass
to cc1as.

Differential Revision: https://reviews.llvm.org/D63852
The file was modifiedclang/lib/Frontend/CMakeLists.txt
The file was addedclang/include/clang/Frontend/AssemblerInvocation.h
The file was modifiedclang/tools/driver/cc1as_main.cpp
The file was addedclang/lib/Frontend/AssemblerInvocation.cpp
Commit dbf87da739ba8ce4a3abc1f893045006a62eecbf by llvmgnsyncbot
[gn build] Port 2325157c0568
The file was modifiedllvm/utils/gn/secondary/clang/lib/Frontend/BUILD.gn
Commit 022da61f6b30626708e5b4c1c009afb453d12ebe by lebedev.ri
[SimplifyCFG] Change 'LoopHeaders' to be ArrayRef<WeakVH>, not a naked set, thus avoiding dangling pointers

If i change it to AssertingVH instead, a number of existing tests fail,
which means we don't consistently remove from the set when deleting blocks,
which means newly-created blocks may happen to appear in that set
if they happen to occupy the same memory chunk as did some block
that was in the set originally.

There are many places where we delete blocks,
and while we could probably consistently delete from LoopHeaders
when deleting a block in transforms located in SimplifyCFG.cpp itself,
transforms located elsewhere (Local.cpp/BasicBlockUtils.cpp) also may
delete blocks, and it doesn't seem good to teach them to deal with it.

Since we at most only ever delete from LoopHeaders,
let's just delegate to WeakVH to do that automatically.

But to be honest, personally, i'm not sure that the idea
behind LoopHeaders is sound.
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h
The file was modifiedllvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 0057cc5a215e5a26cfbd7e1707b55bf05fa9b6bf by aykevanlaethem
Revert "[Clang] Move assembler into a separate file"

This reverts commit 2325157c0568ffd16f3318ad54f947e4e2109ef6.

Unfortunately this commit produces linker errors on some builds:
http://lab.llvm.org:8011/#/builders/57/builds/3704
http://lab.llvm.org:8011/#/builders/112/builds/3216
http://lab.llvm.org:8011/#/builders/121/builds/3900
The file was modifiedclang/lib/Frontend/CMakeLists.txt
The file was removedclang/lib/Frontend/AssemblerInvocation.cpp
The file was modifiedclang/tools/driver/cc1as_main.cpp
The file was removedclang/include/clang/Frontend/AssemblerInvocation.h
Commit d5c4de40c679f07c575db1fb5c5893cb93b3d30e by llvmgnsyncbot
[gn build] Port 0057cc5a215e
The file was modifiedllvm/utils/gn/secondary/clang/lib/Frontend/BUILD.gn
Commit 5997e8987f681c54c266ab2d422528de9235b25f by pctammela
[lldb/Lua] add initial Lua typemaps

This patch adds the integer handling typemaps and the typemap for
string returning functions.

The integer handling typemaps overrides SWIG's own typemaps to distinct
the handling of integers from floating point.

The typemap for string returning functions is a port of Python's
typemap.

Differential Revision: https://reviews.llvm.org/D94937
The file was modifiedlldb/bindings/lua/lua-typemaps.swig
Commit 2bbc762b8ff843cab89230c0a5feeb801c21c376 by pctammela
[lldb/Lua] add 'Lua' before naming versions

NFC
The file was modifiedlldb/bindings/lua/lua-typemaps.swig
Commit 25531a1d9657897e648d93f776a3abb70e9816ef by powerman1st
[AVR] Optimize 8-bit logic left/right shifts

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D89047
The file was modifiedllvm/test/CodeGen/AVR/ctlz.ll
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.h
The file was modifiedllvm/lib/Target/AVR/AVRInstrInfo.td
The file was modifiedllvm/test/CodeGen/AVR/ctpop.ll
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AVR/cttz.ll
The file was modifiedllvm/test/CodeGen/AVR/shift.ll
Commit 292077072ec1279d89d21873fe900061e55ef936 by flo
[Local] Treat calls that may not return as being alive.

With the addition of the `willreturn` attribute, functions that may
not return (e.g. due to an infinite loop) are well defined, if they are
not marked as `willreturn`.

This patch updates `wouldInstructionBeTriviallyDead` to not consider
calls that may not return as dead.

This patch still provides an escape hatch for intrinsics, which are
still assumed as willreturn unconditionally. It will be removed once
all intrinsics definitions have been reviewed and updated.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94106
The file was modifiedllvm/test/Transforms/InstCombine/nothrow.ll
The file was modifiedllvm/test/Transforms/Coroutines/no-suspend.ll
The file was modifiedllvm/test/Transforms/InstSimplify/returned.ll
The file was modifiedllvm/test/Transforms/OpenMP/parallel_deletion.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-split-00.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-split-hidden.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/DeleteThrowableInst.ll
The file was modifiedllvm/test/Transforms/BDCE/basic.ll
The file was modifiedllvm/test/Transforms/CodeGenPrepare/X86/delete-assume-dead-code.ll
The file was modifiedllvm/test/Transforms/Attributor/readattrs.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/simple.ll
The file was modifiedllvm/test/Transforms/NewGVN/eliminate-callsite-inline.ll
The file was modifiedllvm/test/Transforms/InstCombine/constant-fold-libfunc.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/fp80.ll
The file was modifiedllvm/test/Transforms/Attributor/align.ll
The file was modifiedllvm/test/Transforms/InstSimplify/remove-dead-call.ll
The file was modifiedllvm/test/Transforms/MemCpyOpt/memcpy.ll
The file was modifiedllvm/test/Transforms/InstSimplify/ConstProp/rint.ll
The file was modifiedllvm/test/Transforms/Reassociate/erase_inst_made_change.ll
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MemDepAnalysis/simple.ll
The file was modifiedllvm/test/Transforms/Attributor/nocapture-2.ll
The file was modifiedllvm/test/Transforms/Attributor/norecurse.ll
The file was modifiedllvm/lib/Transforms/Utils/Local.cpp
The file was modifiedllvm/test/Transforms/Attributor/range.ll
The file was modifiedllvm/test/Transforms/Inline/dead-calls-willreturn.ll
The file was modifiedllvm/include/llvm/IR/InstrTypes.h
The file was modifiedllvm/test/Feature/OperandBundles/early-cse.ll
The file was modifiedllvm/test/Transforms/Attributor/nonnull.ll
The file was modifiedllvm/test/Transforms/Attributor/nocapture-1.ll
Commit 39e1e53a7c162652c6c138d1bcf50d2766fe9561 by spatel
[SLP] add reduction test with mixed fast-math-flags; NFC
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
Commit a6f02212764a76935ec5fb704fe86a1a76f65745 by spatel
[SLP] fix fast-math-flag propagation on FP reductions

As shown in the test diffs, we could miscompile by
propagating flags that did not exist in the original
code.

The flags required for fmin/fmax reductions will be
fixed in a follow-up patch.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/horizontal.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 1eb8c5cd35ed0f3e06ea77a93824901f680ca1ed by powerman1st
[AVR] Optimize 16-bit comparison with constant

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D93976
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AVR/cmp.ll
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.h
Commit 757b93bb7b384038a8dec35433f78f5c7c2ef8b0 by Dan Liew
[ASan] Fix broken Windows build due to 596d534ac3524052df210be8d3c01a33b2260a42.

In that change I forgot to update the call to
`AsanThread::ThreadStart()` in `asan_win.cpp`.
The file was modifiedcompiler-rt/lib/asan/asan_win.cpp
Commit a8e06361ddba6a25fb0c27596aaa03c5423d1868 by koraq
[libc++] Implements concept destructible

Implements parts of:
- P0898R3 Standard Library Concepts
- P1754 Rename concepts to standard_case for C++20, while we still can

Reviewed By: ldionne, miscco, #libc

Differential Revision: https://reviews.llvm.org/D91004
The file was modifiedlibcxx/include/concepts
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was addedlibcxx/test/std/concepts/concept.destructible/destructible.compile.pass.cpp
Commit d60b74c28a076062259ba8a8b80a9bdd802c7497 by flo
[InstCombine] Set MadeIRChange in replaceInstUsesWith.

Some utilities used by InstCombine, like SimplifyLibCalls, may add new
instructions and replace the uses of a call, but return nullptr because
the inserted call produces multiple results.

Previously, the replaced library calls would get removed by
InstCombine's deleter, but after
292077072ec1279d89d21873fe900061e55ef936 this may not happen, if the
willreturn attribute is missing.

As a work-around, update replaceInstUsesWith to set MadeIRChange, if it
replaces any uses. This catches the cases where it is used as replacer
by utilities used by InstCombine and seems useful in general; updating
uses will modify the IR.

This fixes an expensive-check failure when replacing
@__sinpif/@__cospifi with @__sincospif_sret.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h
Commit 2f1ffa94d74d03417b60caa8706f84d42ee66e22 by kazu
[llvm] Forward-declare ICFLoopSafetyInfo (NFC)

LoopUtils.h needs ICFLoopSafetyInfo but relies on a forward
declaration of ICFLoopSafetyInfo in IVDescriptors.h.  This patch adds
a forward declaration right in LoopUtils.h.

While we are at it, this patch removes the one in IVDescriptors.h,
where it is unnecessary.
The file was modifiedllvm/include/llvm/Transforms/Utils/LoopUtils.h
The file was modifiedllvm/include/llvm/Analysis/IVDescriptors.h
Commit cc7a23828657f35f706343982cf96bb6583d4d73 by kazu
[Target] Use llvm::append_range (NFC)
The file was modifiedllvm/lib/Target/Hexagon/RDFDeadCode.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCCTRLoops.cpp
The file was modifiedllvm/lib/Target/X86/X86WinEHState.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
The file was modifiedllvm/lib/Target/X86/X86PartialReduction.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/ARM/ARMParallelDSP.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
Commit 1238378f185069f0a988ef7ffe68966eb99b1170 by kazu
[llvm] Use pop_back_val (NFC)
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp
The file was modifiedllvm/lib/Transforms/Scalar/Reassociate.cpp
The file was modifiedllvm/lib/Transforms/IPO/ArgumentPromotion.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
The file was modifiedllvm/lib/Transforms/Scalar/NewGVN.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopUnrollAndJam.cpp
The file was modifiedllvm/lib/Transforms/Utils/FixIrreducible.cpp
Commit a5b895110f02c69465dfa605c036abf420c5acc3 by llvm-project
[Polly] Gist new access relations using the SCoP context.

This simplifies the access relations.
The file was modifiedpolly/test/Simplify/coalesce_partial.ll
The file was modifiedpolly/test/Simplify/coalesce_overlapping.ll
The file was modifiedpolly/test/DeLICM/reduction_looprotate_hoisted.ll
The file was modifiedpolly/test/Simplify/coalesce_3partials.ll
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/test/Simplify/coalesce_disjointelements.ll
Commit de0457a013a93d6470094194ece1a1bc4eec1bad by llvm-project
[Polly] Clean up hasFeasibleRuntimeContext.
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/include/polly/ScopInfo.h
Commit 02e8a5ad3c72ac53275e1dd4de9a2449f072051b by llvm-project
[Polly] Allow param sets for dumpPw().
The file was modifiedpolly/lib/Support/ISLTools.cpp
Commit 3b9677e1eced0eafc17bdf3f6a41f1fd7db9f120 by llvm-project
[Polly] Track defined behavior for PHI predecessor computation.

ZoneAlgorithms's computePHI relies on being provided with consistent a
schedule to compute the statement prodecessors of a statement containing
PHINodes. Otherwise unexpected results such as PHI nodes with multiple
predecessors can occur which would result in problems in the
algorithms expecting consistent data.

In the added test case, statement instances are scrubbed from the
SCoP their execution would result in undefined behavior (Due to a nsw
overflow). As already being undefined behavior in LLVM-IR, neither
AssumedContext nor InvalidContext are updated, giving computePHI no
means to avoid these cases.

Intoduce a new SCoP property, the DefinedBehaviorContext, that among
the runtime-checked conditions, also tracks the assumptions not needing
a runtime check, in particular those affecting the assumed control flow.
This replaces the manual combination of the 3 other contexts that was
already done in computePHI and setNewAccessRelation. Currently, the only
additional assumption is that loop induction variables will nsw flag for
not wrap, but potentially more can be added. Use in
hasFeasibleRuntimeContext, isl::ast_build and gisting are other
potential uses.

To limit computational complexity, the DefinedBehaviorContext is not
availabe if it grows too large (atm hardcoded to 8 disjuncts).

Possible other fixes include bailing out in computePHI when
inconsistencies are detected, choose an arbitrary value for inconsistent
cases (since it is undefined behavior anyways), or make the code
receiving the result from ComputePHI handle inconsistent data. All of
them reduce the quality of implementation having to bail out more often
and disabling the ability to assert on actually wrong results.

This fixes llvm.org/PR48783.
The file was modifiedpolly/test/ScopInfo/multidim_fold_constant_dim_zero.ll
The file was modifiedpolly/test/ScopInfo/multidim_fortran_2d_with_modref_call.ll
The file was modifiedpolly/lib/Transform/ZoneAlgo.cpp
The file was modifiedpolly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_1.ll
The file was modifiedpolly/test/ScopInfo/NonAffine/non_affine_loop_used_later.ll
The file was modifiedpolly/lib/Analysis/ScopInfo.cpp
The file was modifiedpolly/test/DeLICM/reduction_looprotate_hoisted.ll
The file was modifiedpolly/test/ScopInfo/modulo_zext_2.ll
The file was modifiedpolly/test/Isl/CodeGen/invariant_load_parameters_cyclic_dependence.ll
The file was modifiedpolly/test/ScopInfo/NonAffine/non_affine_float_compare.ll
The file was modifiedpolly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_affine_loop.ll
The file was modifiedpolly/test/DeLICM/pr41656.ll
The file was modifiedpolly/test/Isl/CodeGen/param_div_div_div_2.ll
The file was modifiedpolly/lib/Support/ScopHelper.cpp
The file was modifiedpolly/test/Isl/CodeGen/exprModDiv___%for.cond---%for.end.jscop.pow2
The file was modifiedpolly/include/polly/Support/ScopHelper.h
The file was modifiedpolly/lib/Transform/DeLICM.cpp
The file was modifiedpolly/test/ScopInfo/NonAffine/non_affine_loop_condition.ll
The file was addedpolly/test/DeLICM/pr48783.ll
The file was modifiedpolly/test/ScopInfo/modulo_zext_3.ll
The file was modifiedpolly/test/ScopInfo/multidim_2d_with_modref_call_2.ll
The file was modifiedpolly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_2.ll
The file was modifiedpolly/test/ScopInfo/constant_functions_as_unknowns.ll
The file was modifiedpolly/test/ScopInfo/modulo_zext_1.ll
The file was modifiedpolly/include/polly/ScopInfo.h
The file was modifiedpolly/test/ScopInfo/NonAffine/non-affine-loop-condition-dependent-access_3.ll
The file was modifiedpolly/test/ScopInfo/multidim_2d_with_modref_call.ll
The file was modifiedpolly/test/Isl/CodeGen/exprModDiv___%for.cond---%for.end.jscop
The file was modifiedpolly/test/ScopInfo/avoid_new_parameters_from_geps.ll
The file was modifiedpolly/lib/Analysis/ScopBuilder.cpp
The file was modifiedpolly/test/ScopInfo/NonAffine/non_affine_conditional_surrounding_non_affine_loop.ll
The file was modifiedpolly/lib/Transform/ForwardOpTree.cpp
Commit 166d40f2ed3db1ddd2868b23d496b4e299d99533 by flo
[FuzzMutate] Add mutator to modify instruction flags.

This patch adds a new InstModificationIRStrategy to mutate flags/options
for instructions. For example, it may add or remove nuw/nsw flags from
add, mul, sub, shl instructions or change the predicate for icmp
instructions.

Subtle changes such as those mentioned above should lead to a more
interesting range of inputs. The presence or absence of overflow flags
can expose subtle bugs, for example.

Reviewed By: bogner

Differential Revision: https://reviews.llvm.org/D94905
The file was modifiedllvm/include/llvm/FuzzMutate/IRMutator.h
The file was modifiedllvm/lib/FuzzMutate/IRMutator.cpp
The file was modifiedllvm/tools/llvm-opt-fuzzer/llvm-opt-fuzzer.cpp
The file was modifiedllvm/unittests/FuzzMutate/StrategiesTest.cpp
Commit 99d5fad7a5cabac39d8a93485d1ad0ef4ba2a579 by koraq
[libc++] Remove invalid C++20 code from a test.

During the review of D91986 it has been discovered the in C++11
deprecated `throw()` exception specification has been removed in
C++20. Removed the part of the test code using this feature.
The file was modifiedlibcxx/test/std/concepts/concept.destructible/destructible.compile.pass.cpp
Commit e4847a7fcf777eedc748d2476323726960ab29b7 by kazu
Revert "[Target] Use llvm::append_range (NFC)"

This reverts commit cc7a23828657f35f706343982cf96bb6583d4d73.

The X86WinEHState.cpp hunk seems to break certain builds.
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCCTRLoops.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
The file was modifiedllvm/lib/Target/Hexagon/RDFDeadCode.cpp
The file was modifiedllvm/lib/Target/X86/X86PartialReduction.cpp
The file was modifiedllvm/lib/Target/ARM/ARMParallelDSP.cpp
The file was modifiedllvm/lib/Target/X86/X86WinEHState.cpp
Commit 5ad038aafa3a07a4491bf12cf6edf2026f3f17d1 by tianshilei1992
[Clang][OpenMP][NVPTX] Replace `libomptarget-nvptx-path` with `libomptarget-nvptx-bc-path`

D94700 removed the static library so we no longer need to pass
`-llibomptarget-nvptx` to `nvlink`. Since the bitcode library is the only device
runtime for now, instead of emitting a warning when it is not found, an error
should be raised. We also set a new option `libomptarget-nvptx-bc-path` to let
user choose which bitcode library is being used.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95161
The file was modifiedclang/lib/Driver/ToolChains/Cuda.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticDriverKinds.td
The file was modifiedclang/docs/ClangCommandLineReference.rst
The file was modifiedclang/test/Driver/openmp-offload-gpu.c
The file was addedclang/test/Driver/Inputs/libomptarget/libomptarget-nvptx-test.bc
The file was modifiedclang/include/clang/Driver/Options.td
Commit 5c62d661312a8408af1d6acb4195240088323898 by nikita.ppv
[SimplifyCFG] Regenerate test checks (NFC)
The file was modifiedllvm/test/Transforms/SimplifyCFG/DeadSetCC.ll
Commit cd3d80eacebaad076d63df65650b3bd4c5a1b99e by nikita.ppv
[PhaseOrdering] Add tests for PR44461 and PR48844 (NFC)

In both cases, optimization is prevented because
"br X == C || X == C2" is converted into a switch. In one case
loop rotation is blocked, in the other vectorization.
The file was addedllvm/test/Transforms/PhaseOrdering/pr44461-br-to-switch-rotate.ll
The file was addedllvm/test/Transforms/PhaseOrdering/X86/pr48844-br-to-switch-vectorization.ll
Commit 78b0630b72a9742d62b07cef912b72f1743bfae9 by jonathanchesterfield
[libomptarget][cuda] Call v2 functions explicitly

[libomptarget][cuda] Call v2 functions explicitly

rtl.cpp calls functions like cuMemFree that are replaced by a macro
in cuda.h with cuMemFree_v2. This patch changes the source to use
the v2 names consistently.

See also D95104, D95155 for the idea. Alternatives are to use a mixture,
e.g. call the macro names and explictly dlopen the _v2 names, or to keep
the current status where the symbols are replaced by macros in both files

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95274
The file was modifiedopenmp/libomptarget/plugins/cuda/dynamic_cuda/cuda.h
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
Commit a22ba5afc8d9e3ec00be3e374d40379d1648f53d by aeubanks
[test] Pin dead-calls-willreturn.ll to legacy PM

The new PM inliner does not delete dead calls.
The file was modifiedllvm/test/Transforms/Inline/dead-calls-willreturn.ll
Commit c37dd3b6d553d7ae3afaf677f1c6abdf6b1ec74e by aeubanks
[NewPM][opt] Make -enable-new-pm default to LLVM_ENABLE_NEW_PASS_MANAGER

This is controlled by the ENABLE_EXPERIMENTAL_NEW_PASS_MANAGER CMake flag.

https://lists.llvm.org/pipermail/llvm-dev/2021-January/147993.html

Reviewed By: ychen, asbirlea

Differential Revision: https://reviews.llvm.org/D95254
The file was modifiedllvm/tools/opt/opt.cpp
Commit c83cff45c7a58010e65270d3f5bfb8c9a72ad832 by nikita.ppv
[IR] Add NoAliasScopeDeclInst (NFC)

Add an intrinsic type class to represent the
llvm.experimental.noalias.scope.decl intrinsic, to make code
working with it a bit nicer by hiding the metadata extraction
from view.
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit a4e6c2e647b09dd8c2c5cf55bb05e3c7fd89646c by lebedev.ri
[NFC][SimplifyCFG] Extract PerformValueComparisonIntoPredecessorFolding() out of FoldValueComparisonIntoPredecessors()

Less nested code is much easier to follow and modify.
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 67f9c87a651a9c3a57a2b1bf32e6e0be2479ebc7 by lebedev.ri
[NFC][SimplifyCFG] Perform early-continue in FoldValueComparisonIntoPredecessors() per-pred loop
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 6f2753273ee6d891cabd11626e4efbce0d901661 by lebedev.ri
[NFC][SimplifyCFG] Extract CloneInstructionsIntoPredecessorBlockAndUpdateSSAUses() out of PerformBranchToCommonDestFolding()

To be used in PerformValueComparisonIntoPredecessorFolding()
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 52586c46b0883600a332fd64731dc5287981f980 by stellaraccident
[mlir][CAPI] Add result type inference to the CAPI.

* Adds a flag to MlirOperationState to enable result type inference using the InferTypeOpInterface.
* I chose this level of implementation for a couple of reasons:
  a) In the creation flow is naturally where generated and custom builder code will be invoking such a thing
  b) it is a bit more efficient to share the data structure and unpacking vs having a standalone entry-point
  c) we can always decide to expose more of these interfaces with first-class APIs, but that doesn't preclude that we will always want to use this one in this way (and less API surface area for common things is better for API stability and evolution).
* I struggled to find an appropriate way to test it since we don't link the test dialect into anything CAPI accessible at present. I opted instead for one of the simplest ops I found in a regular dialect which implements the interface.
* This does not do any trait-based type selection. That will be left to generated tablegen wrappers.

Differential Revision: https://reviews.llvm.org/D95283
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/include/mlir-c/IR.h
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
Commit dc70c56be5922b874b1408edc1315fcda40680ba by jonathanchesterfield
[libomptarget][amdgpu][nfc] Update comments

[libomptarget][amdgpu][nfc] Update comments

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95295
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/machine.h
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/system.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/data.cpp
The file was modifiedopenmp/libomptarget/plugins/amdgpu/impl/rt.h
Commit d2927f786e877410d90c1e6f0e0c7d99524529c5 by craig.topper
[RISCV] Add isel patterns to remove (and X, 31) from sllw/srlw/sraw shift amounts.

We try to do this during DAG combine with SimplifyDemandedBits,
but it fails if there are multiple nodes using the AND. For
example, multiple shifts using the same shift amount.
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
The file was modifiedllvm/test/CodeGen/RISCV/atomic-rmw.ll
The file was modifiedllvm/test/CodeGen/RISCV/atomic-cmpxchg.ll
Commit 5a73daf907873a8757213932f814361a59f02da5 by craig.topper
[RISCV] Add test cases for SRO/SLO with shift amounts masked to bitwidth-1. NFC

The sro/slo instructions ignore extra bits in the shift amount,
so we can ignore the mask just like we do for sll, srl, and sra.
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbp.ll
Commit 998057ec06ae7e0fb1e0be0f2702df4d6338a128 by craig.topper
[RISCV] Add isel patterns to remove masks on SLO/SRO shift amounts.
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbp.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbp.ll
Commit 92bb81aac1f16e2e9633d101b8b3f83d9c91dd48 by zibi
[SystemZ][ZOS] Provide PATH_MAX macro for libcxx

Defining PATH_MAX to _XOPEN_PATH_MAX which is the closest macro available on z/OS.
Note that this value is 1024 which is 4 times smaller from same macro on Linux.

Reviewed By: #libc, ldionne, hubert.reinterpretcast

Differential Revision: https://reviews.llvm.org/D92110
The file was modifiedlibcxx/src/filesystem/operations.cpp
Commit c7d5d8fa33a0f23b262b695d17fdffdefa8dc940 by craig.topper
[RISCV] Group some Zbs isel patterns together and remove a stale comment. NFC
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit b7dee667b64ff7dea66b483a35883190798c7d72 by llvm-project
[OpenMPIRBuilder] Implement tileLoops.

The  tileLoops method implements the code generation part of the tile directive introduced in OpenMP 5.1. It takes a list of loops forming a loop nest, tiles it, and returns the CanonicalLoopInfo representing the generated loops.

The implementation takes n CanonicalLoopInfos, n tile size Values and returns 2*n new CanonicalLoopInfos. The input CanonicalLoopInfos are invalidated and BBs not reused in the new loop nest removed from the function.

In a modified version of D76342, I was able to correctly compile and execute a tiled loop nest.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D92974
The file was modifiedllvm/lib/IR/BasicBlock.cpp
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
The file was modifiedllvm/include/llvm/Frontend/OpenMP/OMPIRBuilder.h
Commit b890fafe672c01daac4ca2b8f740cd0cade78060 by llvm-project
[OpenMPIRBuilder] Silence compiler warning. NFC.

Address the compiler warning
OMPIRBuilder.cpp:1232:27: comparison of integers of different signs: 'size_t' (aka 'unsigned long') and 'int' [-Wsign-compare]
The file was modifiedllvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp
Commit 2a4acf3ea8db19981284468c354aea2835fbfa08 by powerman1st
[AVR] Optimize 8-bit int shift

Reviewed By: dylanmckay

Differential Revision: https://reviews.llvm.org/D90678
The file was modifiedllvm/lib/Target/AVR/AVRInstrInfo.td
The file was modifiedllvm/test/CodeGen/AVR/smul-with-overflow.ll
The file was modifiedllvm/lib/Target/AVR/AVRExpandPseudoInsts.cpp
The file was modifiedllvm/test/CodeGen/AVR/shift.ll
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.cpp
The file was modifiedllvm/lib/Target/AVR/AVRISelLowering.h
Commit 45ad6fac6ad0dea2a1f7a1c6b65b64d230757667 by Lang Hames
[JITLink] Use edge kind names for fixups in EHFrameEdgeFixer.

Previously FDE field names were used, but the fixup kind used for a field can
vary based on the pointer encoding.

This change will improve readability / maintainability when EH-frame support is
added to JITLink/ELF.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/EHFrameSupportImpl.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
Commit c50457f3e4209b0cd0d4a6baa881bac30a9d3016 by craig.topper
[RISCV] Make the code in MatchSLLIUW ignore the lower bits of the AND mask where the shift has guaranteed zeros.

This avoids being dependent on SimplifyDemandedBits having cleared
those bits.

It could make sense to teach SimplifyDemandedBits to keep all
lower bits 1 in an AND mask when possible. This could be
implemented with slli+srli in the general case rather than
needing to materialize the constant.
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
Commit 5d12b976b004e5022b523d3bc368aa6794aad988 by nikita.ppv
[ValueTracking] Don't assume readonly function will return

This is similar to D94106, but for the
isGuaranteedToTransferExecutionToSuccessor() helper. We should not
assume that readonly functions will return, as this is only true for
mustprogress functions (in which case we already infer willreturn).
As with the DCE change, for now continue assuming that readonly
intrinsics will return, as not all target intrinsics have been
annotated yet.

Differential Revision: https://reviews.llvm.org/D95288
The file was modifiedllvm/test/Transforms/OpenMP/parallel_deletion.ll
The file was modifiedllvm/test/Transforms/JumpThreading/guards.ll
The file was modifiedllvm/test/Transforms/GVNHoist/hoist-convergent.ll
The file was modifiedllvm/test/Transforms/JumpThreading/assume.ll
The file was modifiedllvm/test/Transforms/Attributor/read_write_returned_arguments_scc.ll
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp
The file was modifiedllvm/test/Transforms/Attributor/nonnull.ll
The file was modifiedllvm/test/Transforms/GVNHoist/hoist-pr31891.ll
The file was modifiedllvm/test/Transforms/Inline/ret_attr_update.ll
The file was modifiedllvm/test/Transforms/Attributor/nocapture-1.ll
The file was modifiedllvm/test/Transforms/FunctionAttrs/nonnull.ll
The file was modifiedllvm/unittests/Analysis/ValueTrackingTest.cpp
Commit c3074d48d38cc1207da893b6f3545b5777db4c27 by jonathanchesterfield
[libomptarget][nvptx] Replace cuda atomic primitives with clang intrinsics

[libomptarget][nvptx] Replace cuda atomic primitives with clang intrinsics

Tested by diff of IR generated for target_impl.cu before and after. NFC. Part
of removing deviceRTL build time dependency on cuda SDK.

Reviewed By: tianshilei1992

Differential Revision: https://reviews.llvm.org/D95294
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
Commit b3d7e761e347d562333893652dcf3837fa55d777 by Lang Hames
[examples] Fix "Target does not support MC emission!" in HowToUseJIT example.

Patch by Shivam Gupta. Thanks Shivam!

Differential Revision: https://reviews.llvm.org/D92280
The file was modifiedllvm/examples/HowToUseJIT/HowToUseJIT.cpp
The file was modifiedllvm/examples/HowToUseJIT/CMakeLists.txt
Commit 774629641bf32503353a179e98aaa3ef055d6870 by jeroen.dobbelaere
[LoopUnroll] Use llvm.experimental.noalias.scope.decl for duplicating noalias metadata as needed

This is a fix for https://bugs.llvm.org/show_bug.cgi?id=39282. Compared to D90104, this version is based on part of the full restrict patched (D68484) and uses the `@llvm.experimental.noalias.scope.decl` intrinsic to track the location where !noalias and !alias.scope scopes have been introduced. This allows us to only duplicate the scopes that are really needed.

Notes:
- it also includes changes and tests from D90104

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D92887
The file was modifiedllvm/test/Transforms/PhaseOrdering/pr39282.ll
The file was modifiedllvm/lib/Transforms/Utils/LoopUnroll.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/Cloning.h
The file was modifiedllvm/include/llvm/IR/Metadata.h
The file was addedllvm/test/Transforms/LoopUnroll/noalias.ll
The file was modifiedllvm/lib/Transforms/Utils/CloneFunction.cpp
Commit 659c7bcde62e96c84f157b1d4ac4f320c56089a1 by jeroen.dobbelaere
[LoopRotate] Use llvm.experimental.noalias.scope.decl for duplicating noalias metadata as needed

Similar to D92887, LoopRotation also needs duplicate the noalias scopes when rotating a `@llvm.experimental.noalias.scope.decl` across a block boundary.
This is based on the version from the Full Restrict paches (D68511).

The problem it fixes also showed up in Transforms/Coroutines/ex5.ll after D93040 (when enabling strict checking with -verify-noalias-scope-decl-dom).

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D94306
The file was modifiedllvm/lib/Transforms/Utils/LoopRotationUtils.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/Cloning.h
The file was addedllvm/test/Transforms/LoopRotate/noalias.ll
The file was modifiedllvm/lib/Transforms/Utils/CloneFunction.cpp
Commit dcc7706fcf2438b92d6f619e63c5db4880042ed2 by jeroen.dobbelaere
[InstCombine] Remove unused llvm.experimental.noalias.scope.decl

A @llvm.experimental.noalias.scope.decl is only useful if there is !alias.scope and !noalias metadata that uses the declared scope.
When that is not the case for at least one of the two, the intrinsic call can as well be removed.

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D95141
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-resume-values.ll
The file was modifiedllvm/test/Transforms/PhaseOrdering/instcombine-sroa-inttoptr.ll
The file was modifiedllvm/test/Transforms/Coroutines/ex3.ll
The file was modifiedllvm/test/Transforms/Coroutines/ex2.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon.ll
The file was modifiedllvm/test/Transforms/Coroutines/coro-retcon-value.ll
The file was modifiedllvm/test/Transforms/Coroutines/ex4.ll
The file was addedllvm/test/Transforms/InstCombine/noalias-scope-decl.ll
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp
The file was modifiedllvm/test/Transforms/PhaseOrdering/inlining-alignment-assumptions.ll
Commit 06ab7953e98222de1ace4520163b4fa53565ead4 by david.green
[AArch64] Saturating add cost tests. NFC
The file was addedllvm/test/Analysis/CostModel/AArch64/arith-ssat.ll
The file was addedllvm/test/Analysis/CostModel/AArch64/arith-usat.ll
Commit 1bc8daba4fa3e27c115969c4c996dd1f7d52a3e4 by dave
Fix x86 exegesis tests after c042aff8860df3cad2b274bf0a495e83ae36ddee

In c042aff8860df3cad2b274bf0a495e83ae36ddee, unused FileCheck prefixes became an error, which exposed some testing bugs in four exegesis tests. I've tried my best to either fix the testing bugs, or expand the testing to cover more scenarios.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D95287
The file was modifiedllvm/test/tools/llvm-exegesis/X86/analysis-clustering-algorithms.test
The file was modifiedllvm/test/tools/llvm-exegesis/X86/analysis-naive-cluster-stabilization.test
The file was modifiedllvm/test/tools/llvm-exegesis/X86/analysis-naive-clusterization.test
The file was modifiedllvm/test/tools/llvm-exegesis/X86/analysis-cluster-stabilization.test
Commit 77adbe6a8c716bead04393560ec5aa88877ac1d2 by spatel
[SLP] fix fast-math requirements for fmin/fmax reductions

a6f0221276 enabled intersection of FMF on reduction instructions,
so it is safe to ease the check here.

There is still some room to improve here - it looks like we
have nearly duplicate flags propagation logic inside of the
LoopUtils helper but it is limited targets that do not form
reduction intrinsics (they form the shuffle expansion).
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fmaxnum.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/fminnum.ll
Commit f959d8195da9ae6b9ca8c643a010bcbf6c65ebe2 by flo
[LTO] Move DisableVerify setting to LTOCodeGenerator class (NFC).

To simplify the transition to using LTOBackend, move DisableVerify to
the LTOCodeGenerator class, like most/all other options.

Reviewed By: tejohnson

Differential Revision: https://reviews.llvm.org/D95223
The file was modifiedllvm/include/llvm/LTO/legacy/LTOCodeGenerator.h
The file was modifiedllvm/tools/lto/lto.cpp
The file was modifiedllvm/lib/LTO/LTOCodeGenerator.cpp
The file was modifiedllvm/tools/llvm-lto/llvm-lto.cpp
Commit 4cc94b731345aa494e0e364846ba9550f5dd5105 by david.green
[CostModel] Tests for showing the cost of intrinsics from the vectorizer. NFC
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-saddsatcost.ll
The file was addedllvm/test/Transforms/LoopVectorize/AArch64/intrinsiccost.ll
The file was addedllvm/test/Transforms/LoopVectorize/X86/intrinsiccost.ll
Commit 8b9df70bf7e7b812715a3dc9772719188e0df06c by nikita.ppv
[Utils] Use NoAliasScopeDeclInst in a few more places (NFC)

In the cloning infrastructure, only track an MDNode mapping,
without explicitly storing the Metadata mapping, same as is done
during inlining. This makes things slightly simpler.
The file was modifiedllvm/lib/Transforms/Utils/CloneFunction.cpp
The file was modifiedllvm/include/llvm/IR/IntrinsicInst.h
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/Cloning.h
The file was modifiedllvm/lib/Transforms/Utils/LoopUnroll.cpp
The file was modifiedllvm/lib/Transforms/Utils/LoopRotationUtils.cpp
Commit cfd978d5d3c8a06813e25f69ff1386428380a7cb by tianshilei1992
[OpenMP] Fixed test environment of `check-libomptarget-nvptx`

D95161 removed the option `--libomptarget-nvptx-path`, which is used in
the tests for `libomptarget-nvptx`.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95293
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/test/lit.cfg
Commit e5e448aafa7699c17f78aaffb001b665b607e5ae by jonathanchesterfield
[libomptarget][cuda] Fix build, change missed from D95274
The file was modifiedopenmp/libomptarget/plugins/cuda/dynamic_cuda/cuda.cpp
Commit 116177afcce88d807c1beffcb9221999ad8a69a9 by craig.topper
[RISCV] Use SRLIWPat in the PACKUW pattern.

This makes the code more tolerant if we ever change SimplifyDemandedBits
to not remove 1s from the lsbs of a contiguous mask.
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
Commit d44ca0cf2f64dab1da309f70f841ce3d2ffb527c by kazu
[CodeGen] Forward-declare TargetMachine (NFC)

InstrEmitter.h needs TargetMachine but relies on a forward declaration
of TargetMachine in MachineOperand.h.  This patch adds a forward
declaration right in InstrEmitter.h.

While we are at it, this patch removes the one in MachineOperand.h,
where it is unnecessary.
The file was modifiedllvm/include/llvm/CodeGen/MachineOperand.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/InstrEmitter.h
Commit 054444177b1e6563a67e950a238084f082ece16f by kazu
[Target] Use llvm::append_range (NFC)
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonSplitDouble.cpp
The file was modifiedllvm/lib/Target/Hexagon/RDFDeadCode.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86PartialReduction.cpp
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLoweringHVX.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
The file was modifiedllvm/lib/Target/ARM/ARMParallelDSP.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCCTRLoops.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
Commit 16baad8f4e02aea19224da0d397b2f72980b15da by kazu
[llvm] Use pop_back_val (NFC)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/TableGen/Record.cpp
The file was modifiedllvm/include/llvm/Analysis/SparsePropagation.h
The file was modifiedllvm/lib/Target/PowerPC/PPCBoolRetToInt.cpp
The file was modifiedllvm/lib/DebugInfo/DWARF/DWARFDie.cpp
The file was modifiedllvm/lib/Analysis/IVDescriptors.cpp
The file was modifiedllvm/lib/Analysis/DivergenceAnalysis.cpp
The file was modifiedllvm/include/llvm/Analysis/RegionInfoImpl.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.cpp
The file was modifiedllvm/lib/Target/ARM/ARMFrameLowering.cpp
The file was modifiedllvm/lib/DWARFLinker/DWARFLinker.cpp
The file was modifiedllvm/lib/Analysis/MemoryDependenceAnalysis.cpp
The file was modifiedllvm/lib/Bitcode/Reader/BitcodeReader.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/Target/ARM/A15SDOptimizer.cpp
Commit 50830e50031b5420f09f79e82cf6ec984fb8328d by i
[lldb] Add -Wl,-rpath to make tests run with fresh built libc++

On my Debian machine, system libc++/libc++abi is not installed (`libc++1-9 libc++abi-9`),
21 check-lldb-api tests fail because -stdlib=libc++ linked executables cannot
find runtime libc++.so.1 at runtime.

Use the `-Wl,-rpath,$(LLVM_LIBS_DIR)` mechanism in
`packages/Python/lldbsuite/test/make/Makefile.rules` (D58630 for NetBSD) to
allow such tests compile/link with fresh libc++ built beside lldb.
(A system libc++.so.1 is not guaranteed to match fresh libc++ header files.)

Some tweaks to the existing NetBSD rule when generalizing:

* Drop `-L$(LLVM_LIBS_DIR)` since Clang driver adds it correctly.
* Add `-stdlib=libc++` only for `USE_LIBCPP`.

Also, drop `-isystem /usr/include/c++/v1` introduced in D9426. It is not needed
by Clang driver. GCC using libc++ requires more setup.

I don't find any test needing `-Wl,-rpath` in `test/Shell/helper/{build,toolchain}.py` (D58630 for NetBSD added them).

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D94888
The file was modifiedlldb/packages/Python/lldbsuite/test/make/Makefile.rules
The file was modifiedlldb/packages/Python/lldbsuite/test/dotest.py
Commit 2afaf072f5c1467767081571f2a3747b3ba91354 by pavel
Implement vAttachOrWait

Implements the required functions on gdb-remote so the '--include-existing' flag of process attach works correctly on Linux.

Reviewed By: labath, clayborg

Differential Revision: https://reviews.llvm.org/D94672
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.h
The file was addedlldb/test/API/tools/lldb-server/TestGdbRemoteAttachOrWait.py
Commit f3f3c9c2549a268e602be8730990b552e30cc932 by simon.cook
[RISCV] Fix name of Zba extension (NFC)
The file was modifiedllvm/lib/Target/RISCV/RISCV.td
Commit e841bd5f335864b8c4d81cbf4df08460ef39f2ae by david.green
[ARM] Extra MVE unaligned VLDn tests. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst2.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld2.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst4.ll
Commit 60ebf6408e965635deb94bcdead8ac9451bf0ee9 by craig.topper
[RISCV] Add test cases for missed opportunities to use fcvt.*.w(u) instructions on RV64 when input is known to be extended from i8/i16.
The file was modifiedllvm/test/CodeGen/RISCV/half-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-convert.ll
Commit f22aa8f87931075834f973cebaa84c07ab1a26b1 by craig.topper
[RISCV] Add test cases for missed opportunities to use *W instructions for div/rem when inputs are sign/zero extended from i8/16 instead of i32.
The file was modifiedllvm/test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll
Commit 12d0753aca22896fda2cf76781b0ee0524d55065 by craig.topper
[RISCV] Use bitsLE instead of strict == MVT::i32 in assertsexti32 and assertzexti32.

The patterns that use this really want to know if the operand has at
least 32 sign/zero bits.

This increases opportunities to use W instructions when the original
source used i8/i16. Not sure how much this matters for performance,
but it makes i8/i16 code more consistent with i32.
The file was modifiedllvm/test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll
The file was modifiedllvm/test/CodeGen/RISCV/float-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/half-convert.ll
The file was modifiedllvm/test/CodeGen/RISCV/double-convert.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
Commit afd483e57d166418e94a65bd9716e7dc4c114eed by simon.cook
[RISCV] Add support for Zvamo/Zvlsseg to driver

Differential Revision: https://reviews.llvm.org/D94930
The file was modifiedclang/test/Driver/riscv-arch.c
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
Commit a80ebd01798ca82a4f5ffd6d355c5c9facd83375 by carl.ritson
[AMDGPU] Fix llvm.amdgcn.init.exec and frame materialization

Frame-base materialization may insert vector instructions before EXEC is initialised.
Fix this by moving lowering of llvm.amdgcn.init.exec later in backend.
Also remove SI_INIT_EXEC_LO pseudo as this is not necessary.

Reviewed By: ruiling

Differential Revision: https://reviews.llvm.org/D94645
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.init.exec.ll
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit f4537935dcdbf390c863591cf556e76c3abab9c1 by harald
Suppress non-conforming GNU paste extension in all standard-conforming modes

The GNU token paste extension that removes the comma in , ## __VA_ARGS__
conflicts with C99/C++11's requirements when a variadic macro has no
named parameters: according to the standard, an invocation as FOO()
gives it a single empty argument, and concatenation of anything with an
empty argument is well-defined. For this reason, the GNU extension was
already disabled in C99 standard-conforming mode. It was not yet
disabled in C++11 standard-conforming mode.

The associated comment suggested that GCC keeps this extension enabled
in C90/C++03 standard-conforming mode, but it actually does not, so
rather than adding a check for C++ language version, this change simply
removes the check for C language version.

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D91913
The file was modifiedclang/test/Preprocessor/macro_fn_comma_swallow2.c
The file was modifiedclang/lib/Lex/TokenLexer.cpp
Commit 0ed4cf4bf3b65e54d3ccb9a3bf1505efbd1b864c by czhengsz
[PowerPC] support register pressure reduction in machine combiner.

Reassociating some patterns to generate more fma instructions to
reduce register pressure.

Reviewed By: jsji

Differential Revision: https://reviews.llvm.org/D92071
The file was modifiedllvm/include/llvm/CodeGen/MachineCombinerPattern.h
The file was addedllvm/test/CodeGen/PowerPC/register-pressure-reduction.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
The file was modifiedllvm/lib/CodeGen/MachineCombiner.cpp
Commit b3fcc72eb07c43ca08dade818018c82275081ec3 by dblaikie
Fix sign-comparison warnings in unit test EXPECTs
The file was modifiedllvm/unittests/Frontend/OpenMPIRBuilderTest.cpp
Commit 78d41a1295d9d40c37758230d0218c61eaffad88 by dblaikie
lldb: Add support for printing variables with DW_AT_ranges on DW_TAG_subprograms

Finishing out the support (to the best of my knowledge/based on current
testing running the whole check-lldb with a clang forcibly using
DW_AT_ranges on all DW_TAG_subprograms) for this feature.

Differential Revision: https://reviews.llvm.org/D94064
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/subprogram_ranges.test
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/Inputs/subprogram_ranges.s
Commit fd226c9b028d38145b446dddc50db64eb6012d22 by stellaraccident
[mlir][Python] Roll up of python API fixes.

* As discussed, fixes the ordering or (operands, results) -> (results, operands) in various `create` like methods.
* Fixes a syntax error in an ODS accessor method.
* Removes the linalg example in favor of a test case that exercises the same.
* Fixes FuncOp visibility to properly use None instead of the empty string and defaults it to None.
* Implements what was documented for requiring that trailing __init__ args `loc` and `ip` are keyword only.
* Adds a check to `InsertionPoint.insert` so that if attempting to insert past the terminator, an exception is raised telling you what to do instead. Previously, this would crash downstream (i.e. when trying to print the resultant module).
* Renames `_ods_build_default` -> `build_generic` and documents it.
* Removes `result` from the list of prohibited words and for single-result ops, defaults to naming the result `result`, thereby matching expectations and what is already implemented on the base class.
* This was intended to be a relatively small set of changes to be inlined with the broader support for ODS generating the most specific builder, but it spidered out once actually testing various combinations, so rolling up separately.

Differential Revision: https://reviews.llvm.org/D95320
The file was addedmlir/test/Bindings/Python/dialects/linalg.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/_builtin.py
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/test/Bindings/Python/insertion_point.py
The file was removedmlir/examples/python/.style.yapf
The file was removedmlir/examples/python/linalg_matmul.py
The file was modifiedmlir/lib/Bindings/Python/mlir/dialects/_linalg.py
The file was modifiedmlir/test/Bindings/Python/ods_helpers.py
The file was modifiedmlir/lib/Bindings/Python/IRModules.h
The file was modifiedmlir/docs/Bindings/Python.md
The file was modifiedmlir/test/mlir-tblgen/op-python-bindings.td
The file was modifiedmlir/tools/mlir-tblgen/OpPythonBindingGen.cpp
Commit 89a5147e5a0c2e886cdf7ffa34799c069d825940 by powerman1st
[clang][AVR] Improve avr-ld command line options
The file was addedclang/test/Driver/Inputs/basic_avr_tree/lib/avr/lib/libavr.a
The file was modifiedclang/lib/Driver/ToolChains/AVR.cpp
The file was addedclang/test/Driver/Inputs/basic_avr_tree/lib/gcc/avr/5.4.0/libgcc.a
The file was addedclang/test/Driver/avr-ld.c
The file was addedclang/test/Driver/Inputs/basic_avr_tree/bin/avr-ld
Commit ffc3e800c65ee58166255ff897f8b7e6d850ddda by qshanz
[NFC] [DAGCombine] Correct the result for sqrt even the iteration is zero

For now, we correct the result for sqrt if iteration > 0. This doesn't make
sense as they are not strict relative.

Reviewed By: dmgreen, spatel, RKSimon

Differential Revision: https://reviews.llvm.org/D94480
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 6884fbc2c4fb46d0528c02d16d510f4f725fac11 by Lang Hames
[JITLink] Enable exception handling for ELF.

Adds the EHFrameSplitter and EHFrameEdgeFixer passes to the default JITLink
pass pipeline for ELF/x86-64, and teaches EHFrameEdgeFixer to handle some
new pointer encodings.

Together these changes enable exception handling (at least for the basic
cases that I've tested so far) for ELF/x86-64 objects loaded via JITLink.
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
The file was addedllvm/test/ExecutionEngine/JITLink/X86/ELF_ehframe_basic.s
The file was modifiedllvm/lib/ExecutionEngine/JITLink/EHFrameSupportImpl.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
Commit 8fbc1437c605fe92c0fa286757e3b287d6b02f05 by andre.simoesdiasvieira
[AArch64] Merge [US]MULL with half adds and subs into [US]ML[AS]L

This patch adds patterns to teach the AArch64 backend to merge [US]MULL
instructions and adds/subs of half the size into [US]ML[AS]L where we don't use
the top half of the result.

Differential Revision: https://reviews.llvm.org/D95218
The file was addedllvm/test/CodeGen/AArch64/mla_mls_merge.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
Commit 46ec0254a97dcf35a0f9f023ea7632e7ee72a1ee by Jan Svoboda
[clang][cli] NFC: Move prefix to the front of BoolOption

The prefix used to be the last (optional) argument to BoolOption. This decision was made with the expectation that only few command line options would need to pass it explicitly instead of using Bool{F,G}Option. It turns out that a considerable number of options don't conform to Bool{F,G}Option and need to provide the prefix anyways. This sometimes requires to explicitly pass `BothFlags<[]>`.

This patch makes prefix the first parameter, so it now directly precedes the spelling base string. Now 8 options dropped `BothFlags<[]>` and only two options (`pthread` and `emit_llvm_uselists`) need to pass an empty prefix.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D95221
The file was modifiedclang/include/clang/Driver/Options.td
Commit 209f4618891365f5f655214581ab4edd27cacde4 by Jan Svoboda
[clang][cli] NFC: Pass CC1Option explicitly to BoolOption

When `Bool{F,G}Option` were introduced, they were designed after the existing `Opt{In,Out}FFlag` in that they implied `CC1Option` for the `ChangedBy` flag.

This means less typing, but can be misleading in situations when the `ResetBy` has explicit `CC1Option` and `ChangedBy` doesn't.

This patch stops implicitly putting `CC1Option` to `ChangedBy` flag.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D95225
The file was modifiedclang/include/clang/Driver/Options.td
Commit 01d9f13c3a5914baf9739348ef666e348a7b2a2f by ben.shi
Revert "[clang][AVR] Improve avr-ld command line options"

This reverts commit 89a5147e5a0c2e886cdf7ffa34799c069d825940.
The file was removedclang/test/Driver/Inputs/basic_avr_tree/lib/avr/lib/libavr.a
The file was modifiedclang/lib/Driver/ToolChains/AVR.cpp
The file was removedclang/test/Driver/Inputs/basic_avr_tree/bin/avr-ld
The file was removedclang/test/Driver/Inputs/basic_avr_tree/lib/gcc/avr/5.4.0/libgcc.a
The file was removedclang/test/Driver/avr-ld.c
Commit f00a20e51c1d186e72844939aad10416e1cc99de by marek.kurdej
[clang-format] Add the possibility to align assignments spanning empty lines or comments

Currently, empty lines and comments break alignment of assignments on consecutive
lines. This makes the AlignConsecutiveAssignments option an enum that allows controlling
whether empty lines or empty lines and comments should be ignored when aligning
assignments.

Reviewed By: MyDeveloperDay, HazardyKnusperkeks, tinloaf

Differential Revision: https://reviews.llvm.org/D93986
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/docs/tools/dump_format_style.py
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/lib/Format/WhitespaceManager.cpp
The file was modifiedclang/include/clang/Format/Format.h
Commit 7b9d88ab389e19d26432b1c1a6d57f554feb9a20 by marek.kurdej
Revert "[clang-format] Add the possibility to align assignments spanning empty lines or comments"

This reverts commit f00a20e51c1d186e72844939aad10416e1cc99de.
The file was modifiedclang/lib/Format/WhitespaceManager.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/docs/tools/dump_format_style.py
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/lib/Format/Format.cpp
Commit 256314711f3fa724bff1bb2d8b93c5252265b5c7 by marek.kurdej
[clang-format] Add the possibility to align assignments spanning empty lines or comments

Currently, empty lines and comments break alignment of assignments on consecutive
lines. This makes the AlignConsecutiveAssignments option an enum that allows controlling
whether empty lines or empty lines and comments should be ignored when aligning
assignments.

Reviewed By: MyDeveloperDay, HazardyKnusperkeks, tinloaf

Differential Revision: https://reviews.llvm.org/D93986
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/lib/Format/WhitespaceManager.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/docs/tools/dump_format_style.py
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
Commit c6bd6607bf8abfe259fef6a41e695581a88c88f0 by hokein.wu
Fix a build-bot failure.

The test ms-lookup-template-base-classes.cpp added in d972d4c749048531953a16b815e07c67e8455a3b
is failing on some builtbot that don't include x86.

This patch should fix that (following the patterns in the test directory).
The file was modifiedclang/test/CodeGenCXX/ms-lookup-template-base-classes.cpp
Commit d5bbaaaf957138cb2de9c91320e589934d0ab2f0 by i
[XRay] Make __xray_customevent support non-Linux
The file was modifiedllvm/test/CodeGen/X86/xray-custom-log.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was removedllvm/test/CodeGen/X86/xray-typed-event-log.ll
Commit d745b82de1d2def7e68ca836f8db5bb1edbb39cb by i
[XRay] Support DW_TAG_call_site and delete unneeded PATCHABLE_EVENT_CALL/PATCHABLE_TYPED_EVENT_CALL lowering
The file was modifiedllvm/test/CodeGen/X86/xray-custom-log.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/CodeGen/TargetLoweringBase.cpp
Commit 5e7a93a954e68b002edd2cd7fb1b2a61186c7124 by marek.kurdej
[libc++] Set CMAKE_FOLDER. NFC.

* This variable populates the default value of FOLDER target property. It is used in some IDE's (e.g. MSVC) to group different targets together.
The file was modifiedlibcxxabi/CMakeLists.txt
The file was modifiedlibcxx/benchmarks/CMakeLists.txt
The file was modifiedlibcxx/CMakeLists.txt
Commit 666815d61bc2475aa7b3ecf8e3a91022d6ccce4b by simon.cook
[RISCV] Implement new architecture extension macros

This adds support for the new architecture extension test macros as
defined in the C-API Document:
https://github.com/riscv/riscv-c-api-doc/blob/master/riscv-c-api.md

Extension versions have been taken from what are used in
RISCVTargetStreamer for ratified extensions, and the -march parser
for experimental extensions.

Differential Revision: https://reviews.llvm.org/D94403
The file was modifiedclang/lib/Driver/ToolChains/Arch/RISCV.cpp
The file was modifiedclang/lib/Basic/Targets/RISCV.cpp
The file was modifiedclang/test/Preprocessor/riscv-target-features.c
The file was modifiedclang/lib/Basic/Targets/RISCV.h
Commit a7c1239f374907107dcc65a3e6a4b20c53d973c9 by simon.cook
[RISCV] Add attribute support for all supported extensions

This adds support for ".attribute arch" for all extensions that are
currently supported by the compiler.

Differential Revision: https://reviews.llvm.org/D94931
The file was modifiedllvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
The file was modifiedllvm/test/CodeGen/RISCV/attributes.ll
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
The file was modifiedllvm/test/MC/RISCV/attribute-arch.s
Commit 815dd4b2920887741f905c5922e5bbf935348cce by sjoerd.meijer
[AArch64] Add Cortex CPU subtarget features for instruction fusion.

This adds subtarget features for AES, literal, and compare and branch
instruction fusion for different Cortex CPUs.

Patch by: Cassie Jones.

Differential Revision: https://reviews.llvm.org/D94457
The file was modifiedllvm/test/CodeGen/AArch64/misched-fusion-lit.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64Subtarget.h
The file was modifiedllvm/test/CodeGen/AArch64/misched-fusion-addr.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64MacroFusion.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64.td
The file was modifiedllvm/test/CodeGen/AArch64/misched-fusion-aes.ll
Commit 3747eb9c85b3393aa00ad12e9e7ef31ffec8bd4c by nicolas.vasilache
[mlir][Linalg] Add a padding option to Linalg tiling

This revision allows the base Linalg tiling pattern to optionally require padding to
a constant bounding shape.
When requested, a simple analysis is performed, similar to buffer promotion.
A temporary `linalg.simple_pad` op is added to model padding for the purpose of
connecting the dots. This will be replaced by a more fleshed out `linalg.pad_tensor`
op when it is available.
In the meantime, this temporary op serves the purpose of exhibiting the necessary
properties required from a more fleshed out pad op, to compose with transformations
properly.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D95149
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgOps.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/include/mlir/Interfaces/ViewLikeInterface.h
The file was modifiedmlir/include/mlir/Interfaces/ViewLikeInterface.td
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was addedmlir/test/Dialect/Linalg/tile-and-pad-tensors.mlir
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
Commit 7e5d41a68255d2a890977047be339091cc113e25 by kbobyrev
[clang] NFC: Remove else if after return

Update the code to be compatible with LLVM Coding Guidelines.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D95336
The file was modifiedclang/lib/AST/DeclBase.cpp
Commit b37a349ff2442e73ceafeee982afb430359e08b1 by james.henderson
[lld][ELF][test] Add testing for IE/LD TLS weak undef references

Whilst migrating/retiring some downstream testing, I came across a test
for weak undef IE and LD TLS references, but was unable to find any
equivalent in LLD's upstream testing. There does seem to be some slight
subtle differences that could be worth testing compared to LE TLS
references, in particular that IE can be relaxed to LE in this case,
hence this change.

Differential Revision: https://reviews.llvm.org/D95124

Reviewed by: grimar, MaskRay
The file was addedlld/test/ELF/tls-weak-undef.s
The file was removedlld/test/ELF/tls-le-weak-undef.s
Commit 33a63a36d3cb0a59ef80054a02babe7a28a9842a by marek.kurdej
[clang-format] [docs] Fix RST indentation.
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was modifiedclang/include/clang/Format/Format.h
Commit 9c89dcf80736a7c0710dc4c237ec35f0687e1efd by grimar
[yaml2obj, obj2yaml] - Implement section header table as a special Chunk.

This was discussed in D93678 thread.
Currently we have one special chunk - Fill.

This patch re implements the "SectionHeaderTable" key to become a special chunk too.
With that we are able to place the section header table at any location,
just like we place sections.

Differential revision: https://reviews.llvm.org/D95140
The file was modifiedllvm/test/tools/yaml2obj/ELF/verdef-section.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/symtab-shndx.test
The file was modifiedllvm/test/tools/obj2yaml/ELF/offset.yaml
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/broken-dynamic-reloc.test
The file was modifiedllvm/include/llvm/ObjectYAML/ELFYAML.h
The file was modifiedllvm/test/tools/yaml2obj/ELF/section-headers.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/verneed-section.yaml
The file was modifiedllvm/test/Object/obj2yaml.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/file-headers.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/hash-table.test
The file was modifiedllvm/test/tools/yaml2obj/ELF/section-headers-exclude.yaml
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dynamic-reloc-no-section-headers.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/malformed-pt-dynamic.test
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/versym-section.yaml
Commit c8d2ae52c15b4c886e70587cbc3f61aaa7bd6692 by kbobyrev
[clang] NFC: Remove else-after-return pattern from some files

Follow-up on D95336. A bunch of these cases were found manually, the
rest made sense to be included to eliminate llvm-else-after-return
Clang-Tidy warnings.
The file was modifiedclang/include/clang/AST/ASTContext.h
The file was modifiedclang/lib/AST/Decl.cpp
The file was modifiedclang/lib/AST/DeclBase.cpp
The file was modifiedclang/lib/AST/Expr.cpp
Commit 19245b781576f36b85201b94a7c4a54c8f5dead3 by grimar
[ObjectYAML] - An attempt to fix BB after commit of D95140.

D95140 introduced `static constexpr StringRef TypeStr = "SectionHeaderTable";` member
of `SectionHeaderTable` with in-class initialized. BB reports the link error:

/usr/bin/ld: lib/libLLVMObjectYAML.a(ELFYAML.cpp.o): in function
`llvm::yaml::MappingTraits<std::unique_ptr<llvm::ELFYAML::Chunk, std::default_delete<llvm::ELFYAML::Chunk> > >::mapping(llvm::yaml::IO&, std::unique_ptr<llvm::ELFYAML::Chunk, std::default_delete<llvm::ELFYAML::Chunk> >&)':
ELFYAML.cpp:(.text._ZN4llvm4yaml13MappingTraitsISt10unique_ptrINS_7ELFYAML5ChunkESt14default_deleteIS4_EEE7mappingERNS0_2IOERS7_+0x58): undefined reference to `llvm::ELFYAML::SectionHeaderTable::TypeStr'
/usr/bin/ld: ELFYAML.cpp:(.text._ZN4llvm4yaml13MappingTraitsISt10unique_ptrINS_7ELFYAML5ChunkESt14default_deleteIS4_EEE7mappingERNS0_2IOERS7_+0x353):undefined reference to `llvm::ELFYAML::SectionHeaderTable::TypeStr'
/usr/bin/ld: ELFYAML.cpp:(.text._ZN4llvm4yaml13MappingTraitsISt10unique_ptrINS_7ELFYAML5ChunkESt14default_deleteIS4_EEE7mappingERNS0_2IOERS7_+0x6e5): undefined reference to `llvm::ELFYAML::SectionHeaderTable::TypeStr'

This patch adds a definition to cpp file, I guess it should fix the issue.
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp
Commit 6367306a1be3adf7125c0b8b8f87209b8fc836f7 by benny.kra
[mlir] Perfectly forward ImplicitLocOpBuilder ctors to OpBuilder

This is both cleaner and less prone to creating a mess out of overload
resolution.
The file was modifiedmlir/include/mlir/IR/ImplicitLocOpBuilder.h
Commit da489946a9d8385826defa91441c7e8e6e1ee8e4 by pfaffe
[llvm-dwp] Automatically set the target triple

The llvm-dwp tool hard-codes the target triple to x86. Instead, deduce the
target triple from the object files being read.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D93749
The file was addedllvm/test/tools/llvm-dwp/WebAssembly/lit.local.cfg
The file was addedllvm/test/tools/llvm-dwp/WebAssembly/simple_dwo.s
The file was modifiedllvm/tools/llvm-dwp/llvm-dwp.cpp
Commit fde24661718c7812a20a10e518cd853e8e060107 by fraser
[SelectionDAG] Support scalable-vector splats in more cases

This patch adds support for scalable-vector splats in DAGCombiner's
`isConstantOrConstantVector` and `ISD::matchUnaryPredicate` functions,
which enable the SelectionDAG div/rem-by-constant optimizations for
scalable vector types.

It also fixes up one case where the UDIV optimization was generating a
SETCC without first consulting the target for its preferred SETCC result
type.

Reviewed By: craig.topper

Differential Revision: https://reviews.llvm.org/D94501
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-int-arith-imm.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vmulh-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv64.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vremu-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv64.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vrem-sdnode-rv32.ll
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdivu-sdnode-rv32.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rvv/vdiv-sdnode-rv64.ll
Commit 8fdd5784f0d30b165602343a96a34611779b007b by anastasia.stulova
[OpenCL][Docs] Describe tablegen BIFs declarations.

Added documentation for the fast builtin
function declarations with -fdeclare-opencl-builtins.

Tags: #clang

Differential Revision: https://reviews.llvm.org/D95038
The file was modifiedclang/docs/UsersManual.rst
The file was modifiedclang/docs/OpenCLSupport.rst
Commit d196f9e2fca3ff767aa7d2dcaf4654724a79e18c by sander.desmalen
[InstructionCost] Prevent InstructionCost being created with CostState.

For a function that returns InstructionCost, it is very tempting to write:

  return InstructionCost::Invalid;

But that actually returns InstructionCost(1 /* int value of Invalid */))
which has a totally different meaning. By marking this constructor as
`delete`, this can no longer happen.
The file was modifiedllvm/include/llvm/Support/InstructionCost.h
Commit 9641bd0f87dda34c09c606358bb0cb08a641a4f6 by llvm-dev
[TableGen] RuleMatcher::defineComplexSubOperand avoid std::string copy. NFCI.

Use const reference to avoid std::string copy - accordingly to the style guide we shouldn't be using auto anyway.

Fixes MSVC analyzer warning.
The file was modifiedllvm/utils/TableGen/GlobalISelEmitter.cpp
Commit f461e35cbafed593e637305e2a76822dfb7ca6c7 by llvm-dev
[X86][AVX] combineX86ShuffleChain - avoid bitcasts around insert_subvector() shuffle patterns.

We allow insert_subvector lowering of all legal types, so don't always cast to the vXi64/vXf64 shuffle types - this is only necessary for X86ISD::SHUF128/X86ISD::VPERM2X128 patterns later.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 8e3adda820e8cd06ca86a83c23cf6adf46b786fa by faris.rehman
[flang][driver] Remove newline in CompilerInvocation

Remove a new line in CompilerInvocation, to now follow the style when clang-format is applied.
The file was modifiedflang/lib/Frontend/CompilerInvocation.cpp
Commit 14947cd04701d923a57a0161fd1967b81e00ff5e by sven.vanhaastregt
[clang] Fix signedness in vector bitcast evaluation

The included test case triggered a sign assertion on the result in
`Success()`.  This was caused by the APSInt created for a bitcast
having its signedness bit inverted.  The second APSInt constructor
argument is `isUnsigned`, so invert the result of
`isSignedIntegerType`.

Differential Revision: https://reviews.llvm.org/D95135
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/test/CodeGenOpenCL/vector_literals.cl
Commit 1b780cf32e3eea193aa2255b852a7ef164ea00a5 by llvm-dev
[X86][AVX] LowerTRUNCATE - avoid bitcasts around extract_subvectors.

We allow extract_subvector lowering of all legal types, so pre-bitcast the source type to try and reduce bitcast pollution.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 171d12489f20818e292362342b5665c689073ad2 by sander.desmalen
[SLPVectorizer] NFC: Migrate getVectorCallCosts to use InstructionCost.

This change also changes getReductionCost to return InstructionCost,
and it simplifies two expressions by removing a redundant 'isValid' check.
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit 1c8f199f449916d30ec12ecc5bb0f157ab1d01a0 by faris.rehman
[flang][driver] Update PP tests to use the new driver

Update the preprocessor regression tests to use the new driver if the new driver is built (FLANG_BUILD_NEW_DRIVER=On), otherwise the tests will still run using f18.

Summary of changes:
- Introduce %flang to the regression tests, which points to the new driver if it is built or otherwise points to f18
- Update all tests in flang/test/Preprocessing/ to use %flang

Differential Revision: https://reviews.llvm.org/D94805
The file was modifiedflang/test/Preprocessing/pp121.F90
The file was modifiedflang/test/Preprocessing/pp042.F
The file was modifiedflang/test/Preprocessing/pp016.F
The file was modifiedflang/test/Preprocessing/pp007.F
The file was modifiedflang/test/Preprocessing/pp114.F90
The file was modifiedflang/test/Preprocessing/pp112.F90
The file was modifiedflang/test/Preprocessing/compiler_defined_macros.F90
The file was modifiedflang/test/Preprocessing/pp001.F
The file was modifiedflang/test/Preprocessing/pp010.F
The file was modifiedflang/test/Preprocessing/pp116.F90
The file was modifiedflang/test/Preprocessing/pp119.F90
The file was modifiedflang/test/Preprocessing/pp021.F
The file was modifiedflang/test/Preprocessing/pp024.F
The file was modifiedflang/test/Preprocessing/pp110.F90
The file was modifiedflang/test/Preprocessing/pp035.F
The file was modifiedflang/test/Preprocessing/pp014.F
The file was modifiedflang/test/Preprocessing/pp011.F
The file was modifiedflang/test/Preprocessing/pp041.F
The file was modifiedflang/test/Preprocessing/pp101.F90
The file was modifiedflang/test/Preprocessing/hollerith.f
The file was modifiedflang/test/Preprocessing/pp029.F
The file was modifiedflang/test/Preprocessing/pp036.F
The file was modifiedflang/test/Preprocessing/pp130.F90
The file was modifiedflang/test/Preprocessing/pp126.F90
The file was modifiedflang/test/Preprocessing/pp128.F90
The file was modifiedflang/test/Preprocessing/pp012.F
The file was modifiedflang/test/Preprocessing/pp015.F
The file was modifiedflang/test/Preprocessing/pp033.F
The file was modifiedflang/test/Preprocessing/pp020.F
The file was modifiedflang/test/Preprocessing/pp002.F
The file was modifiedflang/test/Preprocessing/pp127.F90
The file was modifiedflang/test/Preprocessing/assert.F90
The file was modifiedflang/test/Preprocessing/pp044.F
The file was modifiedflang/test/Preprocessing/pp122.F90
The file was modifiedflang/test/Preprocessing/pp034.F
The file was modifiedflang/test/Preprocessing/pp013.F
The file was modifiedflang/test/Preprocessing/pp108.F90
The file was modifiedflang/test/Preprocessing/pp025.F
The file was modifiedflang/test/Preprocessing/pp117.F90
The file was modifiedflang/test/Preprocessing/pp039.F
The file was modifiedflang/test/Preprocessing/include-comment.F90
The file was modifiedflang/test/Preprocessing/pp005.F
The file was modifiedflang/test/Preprocessing/pp105.F90
The file was modifiedflang/test/Preprocessing/pp103.F90
The file was modifiedflang/test/Preprocessing/pp004.F
The file was modifiedflang/test/Preprocessing/pp106.F90
The file was modifiedflang/test/Preprocessing/pp120.F90
The file was modifiedflang/test/Preprocessing/pp115.F90
The file was modifiedflang/test/Preprocessing/pp111.F90
The file was modifiedflang/test/Preprocessing/pp123.F90
The file was modifiedflang/test/Preprocessing/pp102.F90
The file was modifiedflang/test/Preprocessing/pp023.F
The file was modifiedflang/test/Preprocessing/pp109.F90
The file was modifiedflang/test/Preprocessing/pp003.F
The file was modifiedflang/test/Preprocessing/pp032.F
The file was modifiedflang/test/Preprocessing/fixed-rescan.F
The file was modifiedflang/test/Preprocessing/pp018.F
The file was modifiedflang/test/Preprocessing/pp008.F
The file was modifiedflang/test/Preprocessing/pp022.F
The file was modifiedflang/test/Preprocessing/pp027.F
The file was modifiedflang/test/Preprocessing/pp118.F90
The file was modifiedflang/test/Preprocessing/pp030.F
The file was modifiedflang/test/Preprocessing/pp006.F
The file was modifiedflang/test/Preprocessing/pp026.F
The file was modifiedflang/test/Preprocessing/pp125.F90
The file was modifiedflang/test/Preprocessing/pp129.F90
The file was modifiedflang/test/Preprocessing/defines.F90
The file was modifiedflang/test/Preprocessing/pp028.F
The file was modifiedflang/test/Preprocessing/pp104.F90
The file was modifiedflang/test/lit.cfg.py
The file was modifiedflang/test/Preprocessing/pp017.F
The file was modifiedflang/test/Preprocessing/pp113.F90
The file was modifiedflang/test/Preprocessing/pp107.F90
The file was modifiedflang/test/Preprocessing/pp037.F
The file was modifiedflang/test/Preprocessing/pp043.F
The file was modifiedflang/test/Preprocessing/pp124.F90
The file was modifiedflang/test/Preprocessing/pp009.F
The file was modifiedflang/test/Preprocessing/pp031.F
The file was modifiedflang/test/Preprocessing/pp038.F
The file was modifiedflang/test/Preprocessing/pp019.F
The file was modifiedflang/test/Preprocessing/pp040.F
Commit dbf9bedf40792cf8c5492a27b61809737793b9c7 by nicolas.vasilache
[mlir][Linalg] Add a hoistPaddingOnTensors transformation

This transformation anchors on a padding op whose result is only used as an input
to a Linalg op and pulls it out of a given number of loops.
The result is a packing of padded tailes of ops that is amortized just before
the outermost loop from which the pad operation is hoisted.

Differential revision: https://reviews.llvm.org/D95243
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Hoisting.h
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/test/lib/Transforms/TestLinalgTransforms.cpp
The file was addedmlir/test/Dialect/Linalg/hoist-padding.mlir
Commit b16fb1ffc3ceebdff1f570668e73f257d7f7e499 by sven.vanhaastregt
Revert "[clang] Fix signedness in vector bitcast evaluation"

This reverts commit 14947cd04701d923a57a0161fd1967b81e00ff5e because
it broke clang-cmake-armv7-quick.
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/test/CodeGenOpenCL/vector_literals.cl
Commit 07b60d0060688dea121be36b46de859bafcec29b by spatel
[InstCombine] add tests for min/max intrinsics with extended values; NFC
The file was modifiedllvm/test/Transforms/InstCombine/minmax-intrinsics.ll
Commit 09a136bcc6947128df86492d88f1733bdff745d1 by spatel
[InstCombine] narrow min/max intrinsics with extended inputs

We can sink extends after min/max if they match and would
not change the sign-interpreted compare. The only combo
that doesn't work is zext+smin/smax because the zexts
could change a negative number into positive:
https://alive2.llvm.org/ce/z/D6sz6J

Sext+umax/umin works:

  define i32 @src(i8 %x, i8 %y) {
  %0:
    %sx = sext i8 %x to i32
    %sy = sext i8 %y to i32
    %m = umax i32 %sx, %sy
    ret i32 %m
  }
  =>
  define i32 @tgt(i8 %x, i8 %y) {
  %0:
    %m = umax i8 %x, %y
    %r = sext i8 %m to i32
    ret i32 %r
  }
  Transformation seems to be correct!
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
The file was modifiedllvm/test/Transforms/InstCombine/minmax-intrinsics.ll
Commit d6d36baa33e76ace11ac20c03de1097d48bd9246 by aaron
Add a --use-color option to clang-query to allow forcing the behavior

D62056 makes the output color if clang auto-detects a tty, but if it
does not, there is no way to force it to use colors anyway.

This patch adjusts the command-lines given to ClangTool which will
force color on or off if --use-color is specified.
The file was modifiedclang-tools-extra/clang-query/Query.cpp
The file was modifiedclang-tools-extra/clang-query/tool/ClangQuery.cpp
Commit 84851a274e2beaa3cdafd6a70e6d1128cabf8b21 by Abhina.Sreeskantharajan
Revert "[SystemZ][z/OS] Fix No such file or directory expression error matching in lit tests - continued"

This reverts commit 520b5ecf856152f35ee38207eec39f5674dd2bd4.
The file was modifiedllvm/test/tools/llvm-ar/print.test
The file was modifiedllvm/test/tools/llvm-lipo/replace-invalid-input.test
The file was modifiedllvm/test/Object/directory.ll
The file was modifiedllvm/test/tools/llvm-lto/error.ll
The file was modifiedllvm/test/tools/llvm-objcopy/wasm/dump-section.test
The file was modifiedllvm/test/tools/llvm-symbolizer/pdb/missing_pdb.test
The file was modifiedllvm/test/tools/llvm-ar/error-opening-directory.test
The file was modifiedllvm/test/Object/archive-extract-dir.test
The file was modifiedllvm/test/tools/llvm-ar/move.test
The file was modifiedllvm/test/tools/llvm-libtool-darwin/invalid-input-output-args.test
The file was modifiedclang/test/Frontend/output-failures.c
The file was modifiedllvm/test/Object/archive-extract.test
The file was modifiedclang/test/Driver/clang-offload-bundler.c
The file was modifiedllvm/test/tools/llvm-ar/quick-append.test
The file was modifiedllvm/test/tools/llvm-lipo/create-arch.test
Commit 978444d531ddc2b3bd29ad469e8421293b4cc2e5 by Abhina.Sreeskantharajan
Revert "[SystemZ][z/OS] Fix No such file or directory expression error"

This reverts commit 06f8a49693957bc27b83e0ab5f429ff874941a07.
The file was modifiedllvm/test/tools/llvm-lto2/X86/stats-file-option.ll
The file was modifiedllvm/test/tools/llvm-ml/basic.test
The file was modifiedllvm/test/DebugInfo/symbolize-missing-file.test
The file was modifiedllvm/test/tools/llvm-objcopy/redefine-symbols.test
The file was modifiedllvm/test/tools/llvm-mc/basic.test
The file was modifiedlld/test/ELF/archive-thin-missing-member.s
The file was modifiedllvm/test/tools/llvm-ar/missing-thin-archive-member.test
The file was modifiedllvm/test/tools/llvm-objcopy/ELF/add-section.test
The file was modifiedclang/test/CodeGen/basic-block-sections.c
The file was modifiedllvm/test/tools/llvm-xray/X86/no-such-file.txt
The file was modifiedllvm/test/tools/llvm-mca/invalid_input_file_name.test
The file was modifiedllvm/test/tools/llvm-readobj/thin-archive.test
The file was modifiedclang/test/Frontend/stats-file.c
The file was modifiedllvm/test/tools/llvm-profdata/weight-instr.test
The file was modifiedllvm/test/tools/dsymutil/X86/papertrail-warnings.test
The file was modifiedlld/test/COFF/nodefaultlib.test
The file was modifiedllvm/test/tools/llvm-readobj/ELF/thin-archive-paths.test
The file was modifiedllvm/test/tools/llvm-ar/response.test
The file was modifiedllvm/test/tools/llvm-readobj/basic.test
The file was modifiedllvm/test/tools/obj2yaml/invalid_input_file.test
The file was modifiedllvm/test/tools/llvm-objcopy/COFF/add-section.test
The file was modifiedlld/test/COFF/manifestinput-error.test
The file was modifiedllvm/test/tools/llvm-cxxdump/trivial.test
The file was modifiedlld/test/ELF/basic.s
The file was modifiedllvm/test/tools/yaml2obj/output-file.yaml
The file was modifiedllvm/test/tools/llvm-libtool-darwin/filelist.test
The file was modifiedllvm/test/tools/llvm-profdata/weight-sample.test
The file was modifiedclang/test/CodeGen/ubsan-blacklist-vfs.c
The file was modifiedlld/test/COFF/driver.test
The file was modifiedllvm/test/tools/llvm-ar/replace.test
The file was modifiedllvm/test/tools/llvm-size/no-input.test
The file was modifiedlld/test/ELF/symbol-ordering-file.s
The file was modifiedlld/test/COFF/pdb-type-server-invalid-signature.yaml
The file was modifiedllvm/test/tools/llvm-objcopy/ELF/error-format.test
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/add-section-error.test
Commit 821a51a9cacfac7da8b34ccc0498d316471f1dbc by llvm-dev
[X86][AVX] combineX86ShuffleChainWithExtract - widen to at least original root size. NFCI.

We're relying on the source inputs for shuffle combining having already been widened to the root size (otherwise the offset logic falls over) - we're going to be supporting different sized shuffle inputs soon, so we need to explicitly make the minimum widened width the original root size.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 68eee55ce6a41bb294d63886679b599883e96c3a by nicolas.vasilache
[mlir][Linalg] Address missed review item

This revision addresses a remaining comment that was overlooked in https://reviews.llvm.org/D95243:
the pad hoisting transformation is made to additionally bail out on side effecting ops other than LoopLikeOps.
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
The file was modifiedmlir/test/Dialect/Linalg/tile-and-pad-tensors.mlir
Commit d462aa5a619ab9fdf8b024e48c19bc8820fe8781 by adamcz
[clang] Fix a nullptr dereference bug on invalid code

When working with invalid code, we would try to dereference a nullptr
while deducing template arguments in some dependend code operating on a
lambda with invalid return type.

Differential Revision: https://reviews.llvm.org/D95145
The file was addedclang/test/SemaCXX/subst-func-type-invalid-ret-type.cpp
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp
Commit 52e25523a98f1f6c0afeba7f29308b02761d8017 by nicolas.vasilache
[mlir][Linalg] Fix incorrect erase order
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Hoisting.cpp
Commit 7163aa999060f7c524a98024550c5c0cd99c2b4c by shivam98.tkg
[NFC] Fix title comment typo and provide description for LLJIT example.
The file was modifiedllvm/examples/HowToUseLLJIT/HowToUseLLJIT.cpp
Commit 05d5125d8a9ffa458ea2deff90eb73473db0047e by nicolas.vasilache
[mlir] Generalize OpFoldResult usage in ops with offsets, sizes and operands.

This revision starts evolving the APIs to manipulate ops with offsets, sizes and operands towards a ValueOrAttr abstraction that is already used in folding under the name OpFoldResult.

The objective, in the future, is to allow such manipulations all the way to the level of ODS to avoid all the genuflexions involved in distinguishing between values and attributes for generic constant foldings.

Once this evolution is accepted, the next step will be a mechanical OpFoldResult -> ValueOrAttr.

Differential Revision: https://reviews.llvm.org/D95310
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp
The file was modifiedmlir/lib/Dialect/Vector/VectorTransforms.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Transforms.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/test/Dialect/Vector/vector-transfer-full-partial-split.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Bufferize.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/test/Dialect/Linalg/fusion-sequence.mlir
The file was modifiedmlir/include/mlir/Interfaces/ViewLikeInterface.td
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/test/Dialect/Linalg/promote.mlir
The file was modifiedmlir/lib/Dialect/StandardOps/Transforms/ExpandOps.cpp
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir
Commit 3201274dea63abbac5467f3f992f0280cbf3b100 by flo
[VPlan] Handle scalarized values in VPTransformState.

This patch adds plumbing to handle scalarized values directly in
VPTransformState.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D92282
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 3546b372219db5c5f4004da6a0066bb9860d3d37 by shivam98.tkg
[Doc][NFC] Fix Kaleidoscope links, typos and add blog posts for MCJIT
The file was modifiedllvm/docs/tutorial/LangImpl08.rst
The file was modifiedllvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl06.rst
The file was modifiedllvm/docs/tutorial/LangImpl03.rst
The file was modifiedllvm/examples/Kaleidoscope/MCJIT/lazy/README.txt
The file was modifiedllvm/examples/Kaleidoscope/MCJIT/complete/README.txt
The file was modifiedllvm/docs/tutorial/LangImpl05.rst
The file was modifiedllvm/docs/tutorial/LangImpl02.rst
The file was modifiedllvm/examples/Kaleidoscope/MCJIT/README.txt
The file was modifiedllvm/examples/Kaleidoscope/MCJIT/initial/README.txt
The file was modifiedllvm/docs/tutorial/LangImpl06.rst
The file was modifiedllvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl05.rst
The file was modifiedllvm/examples/Kaleidoscope/MCJIT/cached/README.txt
The file was modifiedllvm/docs/tutorial/LangImpl07.rst
The file was modifiedllvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl09.rst
The file was modifiedllvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl07.rst
The file was modifiedllvm/docs/tutorial/LangImpl01.rst
The file was modifiedllvm/docs/tutorial/LangImpl10.rst
The file was modifiedllvm/docs/tutorial/MyFirstLanguageFrontend/LangImpl04.rst
The file was modifiedllvm/docs/tutorial/LangImpl04.rst
The file was modifiedllvm/docs/tutorial/LangImpl09.rst
Commit 00054382b95a9d95e2df6457e7fe1fca2323d287 by adamcz
[clangd] Fix a crash when indexing invalid ObjC method declaration

This fix will make us not crash, but ideally we would handle this case
better.

Differential Revision: https://reviews.llvm.org/D94919
The file was modifiedclang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
The file was modifiedclang/lib/Sema/SemaCodeComplete.cpp
Commit 7e506b30a1e1500c3b0b54fba88ea664bc4232e5 by sam.mccall
[clangd] Allow diagnostics to be suppressed with configuration

This has been specifically requested:
  https://github.com/clangd/vscode-clangd/issues/114
and various issues can be addressed with this as a workaround, e.g.:
  https://github.com/clangd/clangd/issues/662

Differential Revision: https://reviews.llvm.org/D95349
The file was modifiedclang-tools-extra/clangd/Config.h
The file was modifiedclang-tools-extra/clangd/unittests/DiagnosticsTests.cpp
The file was modifiedclang-tools-extra/clangd/ParsedAST.cpp
The file was modifiedclang-tools-extra/clangd/ConfigFragment.h
The file was modifiedclang-tools-extra/clangd/unittests/ConfigCompileTests.cpp
The file was modifiedclang-tools-extra/clangd/unittests/ConfigYAMLTests.cpp
The file was modifiedclang-tools-extra/clangd/Diagnostics.cpp
The file was modifiedclang-tools-extra/clangd/Diagnostics.h
The file was modifiedclang-tools-extra/clangd/ConfigCompile.cpp
Commit 6e530a3dac0c41608bac30f12d59fa3cbca48c4a by jeroen.dobbelaere
[Verifier] enable and limit llvm.experimental.noalias.scope.decl dominance checking

Checking the llvm.experimental.noalias.scope.decl dominance can be worstcase O(N^2).
Limit the dominance check to N=32.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D95335
The file was modifiedllvm/lib/IR/Verifier.cpp
Commit 13f2aee7831c9bec17006a6d401008df541a121d by llvm-dev
[X86][AVX] Generalize vperm2f128/vperm2i128 patterns to support all legal 256-bit vector types

Remove bitcasts to/from v4x64 types through vperm2f128/vperm2i128 ops to help improve shuffle combining and demanded vector elts folding.
The file was modifiedllvm/test/CodeGen/X86/haddsub-2.ll
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-and-bool.ll
The file was modifiedllvm/lib/Target/X86/X86InstrSSE.td
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-xor-bool.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
The file was modifiedllvm/test/CodeGen/X86/masked_store_trunc.ll
The file was modifiedllvm/test/CodeGen/X86/var-permute-256.ll
The file was modifiedllvm/test/CodeGen/X86/vector-trunc.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-reduce-or-bool.ll
Commit 3b5d36ece21f9baf96d82944b0165cb352443bee by jeroen.dobbelaere
[Verifier] disable llvm.experimental.noalias.scope.decl dominance check.

This was enabled in https://reviews.llvm.org/D95335 but it breaks the stage2 fuchsia build
(See http://lab.llvm.org:8011/#/builders/98/builds/4105/steps/9/logs/stdio)
The file was modifiedllvm/lib/IR/Verifier.cpp
Commit b45020cf63f6f3a1de0f8d2b8be3c527f6cbdfd5 by omair.javaid
[LLDB] Remove leftovers and typos from RegisterInfos_arm64_sve.h

This patch removes a couple of left-overs and a typo from
RegisterInfos_arm64_sve.h and RegisterInfoPOSIX_arm64.h.
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfos_arm64_sve.h
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm64.h
Commit 2fd4d923a826c9563d587e1dafefe41b461ef3b8 by omair.javaid
[LLDB] Define AUXV_AT_HWCAP2 in AuxVector.h

This patch defines AUXV_AT_HWCAP2 for accessing Aux extensions.
The file was modifiedlldb/source/Plugins/Process/Utility/AuxVector.cpp
The file was modifiedlldb/source/Plugins/Process/Utility/AuxVector.h
Commit e9a3fac76cf199d902a746c2b2fc308dfe0ade26 by omair.javaid
[LLDB] Skip TestPlatformProcessConnect on arm/aarch64 buildbot

TestPlatformProcessConnect is randomly failing on LLDB Arm/AArch64
buildbot. I am disabling it temporarily untill problem is fixed.
The file was modifiedlldb/test/API/tools/lldb-server/platform-process-connect/TestPlatformProcessConnect.py
Commit f80782590c6cdba88e0072792b238ae8a5a4223d by thakis
Revert "[JITLink] Enable exception handling for ELF."

This reverts commit 6884fbc2c4fb46d0528c02d16d510f4f725fac11.
Breaks tests on Windows: http://45.33.8.238/win/31981/step_11.txt
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachOLinkGraphBuilder.h
The file was modifiedllvm/lib/ExecutionEngine/JITLink/EHFrameSupport.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/MachO_x86_64.cpp
The file was modifiedllvm/lib/ExecutionEngine/JITLink/EHFrameSupportImpl.h
The file was removedllvm/test/ExecutionEngine/JITLink/X86/ELF_ehframe_basic.s
The file was modifiedllvm/lib/ExecutionEngine/JITLink/ELF_x86_64.cpp
Commit 558b3bbb5b67387c5a29c1eb6548be81c1588adc by dmitry.preobrazhensky
[AMDGPU][MC] Improved errors handling for SDWA operands

Reviewers: rampitec

Differential Revision: https://reviews.llvm.org/D95212
The file was modifiedllvm/test/MC/AMDGPU/gfx10_err_pos.s
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
Commit 95f0d1edafe3e52a4057768f8cde5d55faf39d16 by jonathanchesterfield
[libomptarget] Compile with older cuda, revert D95274

[libomptarget] Compile with older cuda, revert D95274

Fixes regression reported in comments of D95274.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95367
The file was modifiedopenmp/libomptarget/plugins/cuda/src/rtl.cpp
The file was modifiedopenmp/libomptarget/plugins/cuda/dynamic_cuda/cuda.h
The file was modifiedopenmp/libomptarget/plugins/cuda/dynamic_cuda/cuda.cpp
Commit 51faba35fd81fbd3af407a29c136895a718ccd96 by Louis Dionne
[libc++] Implement P0655R1 visit<R>: Explicit Return Type for visit

Differential Revision: https://reviews.llvm.org/D92044
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was addedlibcxx/test/std/utilities/variant/variant.visit/visit_return_type.pass.cpp
The file was modifiedlibcxx/test/std/utilities/variant/variant.visit/visit.pass.cpp
The file was modifiedlibcxx/include/variant
The file was modifiedlibcxx/test/std/utilities/variant/variant.visit/robust_against_adl.pass.cpp
The file was modifiedlibcxx/test/support/variant_test_helpers.h
Commit 17c3538aef656178b342573043eff328f5cf2673 by lxfind
Revert "Fix unused variable in CoroFrame.cpp when building Release with GCC 10"

This reverts commit ff5e896425577f445ed080d88b582aab0896fba0.
The file was modifiedllvm/lib/Transforms/Coroutines/CoroFrame.cpp
Commit e123cd674c0209c80bc6225bb9e3a2d1d2ee418b by anton.zabaznov
[OpenCL] Refactor of targets OpenCL option settings

Currently, there is some refactoring needed in existing interface of OpenCL option
settings to support OpenCL C 3.0. The problem is that OpenCL extensions and features
are not only determined by the target platform but also by the OpenCL version.
Also, there are core extensions/features which are supported unconditionally in
specific OpenCL C version. In fact, these rules are not being followed for all targets.
For example, there are some targets (as nvptx and r600) which don't support
OpenCL C 2.0 core features (nvptx.languageOptsOpenCL.cl, r600.languageOptsOpenCL.cl).

After the change there will be explicit differentiation between optional core and core
OpenCL features which allows giving diagnostics if target doesn't support any of
necessary core features for specific OpenCL version.

This patch also eliminates `OpenCLOptions` instance duplication from `TargetOptions`.
`OpenCLOptions` instance should take place in `Sema` as it's going to be modified
during parsing. Removing this duplication will also allow to generally simplify
`OpenCLOptions` class for parsing purposes.

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D92277
The file was modifiedclang/include/clang/Basic/OpenCLOptions.h
The file was modifiedclang/lib/Parse/ParsePragma.cpp
The file was modifiedclang/include/clang/Basic/TargetInfo.h
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/lib/Basic/Targets/X86.h
The file was modifiedclang/include/clang/Basic/OpenCLExtensions.def
The file was addedclang/lib/Basic/OpenCLOptions.cpp
The file was modifiedclang/test/Misc/r600.languageOptsOpenCL.cl
The file was modifiedclang/lib/Basic/Targets/NVPTX.h
The file was modifiedclang/include/clang/Basic/TargetOptions.h
The file was modifiedclang/lib/Basic/Targets/AMDGPU.h
The file was modifiedclang/test/Misc/nvptx.languageOptsOpenCL.cl
The file was modifiedclang/lib/Frontend/InitPreprocessor.cpp
The file was modifiedclang/lib/Basic/Targets.cpp
The file was modifiedclang/lib/Basic/CMakeLists.txt
The file was modifiedclang/lib/Basic/Targets/SPIR.h
The file was modifiedclang/lib/Sema/Sema.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
Commit e9cc5fef64631a16f284e5dc09a2eaa8fd34a4a1 by kostyak
[scudo][standalone] Enable death tests on Fuchsia

zxtest doesn't have `EXPECT_DEATH` and the Scudo unit-tests were
defining it as a no-op.

This enables death tests on Fuchsia by using `ASSERT_DEATH` instead.
I used a lambda to wrap the expressions as this appears to not be
working the same way as `EXPECT_DEATH`.

Additionnally, a death test using `alarm` was failing with the change,
as it's currently not implemented in Fuchsia, so move that test within
a `!SCUDO_FUCHSIA` block.

Differential Revision: https://reviews.llvm.org/D94362
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/wrappers_c_test.cpp
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/scudo_unit_test.h
Commit 193cda105d9131de533596077ff0c694e8b87bbd by koraq
[libc++][doc] Update the release notes.

Updates the libc++ release notes with the changes since the last
release.

Differential Revision: https://reviews.llvm.org/D95248
The file was modifiedlibcxx/docs/index.rst
The file was modifiedlibcxx/docs/ReleaseNotes.rst
Commit 4eb4f8963f1e4998748bca66a512c3298f6d2289 by craig.topper
[RISCV] Use sign extend for i32 arguments and returns in makeLibCall on RV64.

As far as I know 32 bits arguments and returns on RV64 are always
sign extended to i64. So I think we should be taking this into
account around libcalls.

Reviewed By: luismarques

Differential Revision: https://reviews.llvm.org/D95285
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv64i-single-softfloat.ll
Commit 93eef7d8e978d9efd0b28311d7be0d483f22e5d2 by huberjn
[OpenMP][NFC] Fix SourceInfo.h variable names

Summary:
Fix the names to use Pascal case to comply with the LLVM coding guidelines. `ident_t` is required for compatibility with the rest of libomp.
The file was modifiedopenmp/libomptarget/include/SourceInfo.h
Commit 9390b85ac6aeebba3ced32009380c2311545776e by david.green
[ARM] Use half directly for args/return types in test. NFC

Until fairly recently the calling convention for IR half was not handled
correctly in the ARM backend, meaning we needed to pass pointers that
were loaded/stored. Now that that is fixed we can switch to using the
type directly instead.
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vdup.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shuffle.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float32regloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-fmul.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vaddqr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpfr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-float16regloops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-fadd.ll
Commit 3395a336b02538d0bb768ccfae11c9b6151b102e by marek.kurdej
[clang-format] add case aware include sorting

* Adds an option to [clang-format] which sorts
  headers in an alphabetical manner using case
  only for tie-breakers. The options is off by
  default in favor of the current ASCIIbetical
  sorting style.

Reviewed By: curdeius, HazardyKnusperkeks

Differential Revision: https://reviews.llvm.org/D95017
The file was modifiedclang/unittests/Format/FormatTest.cpp
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/include/clang/Tooling/Inclusions/IncludeStyle.h
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was modifiedclang/unittests/Format/SortIncludesTest.cpp
Commit 3fbd3eaf28c1e6f2bb9519022611829dfe3b0464 by arthur.j.odwyer
[libc++] Implement [P0769] "Add shift to algorithm" (shift_left, shift_right)

I believe this is a complete implementation of std::shift_left and std::shift_right from
http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2018/p0769r2.pdf

Some test cases copied-with-modification from D60027.

Differential Revision: https://reviews.llvm.org/D93819
The file was modifiedlibcxx/include/algorithm
The file was addedlibcxx/test/std/algorithms/alg.modifying.operations/alg.shift/shift_right.pass.cpp
The file was modifiedlibcxx/docs/Cxx2aStatusPaperStatus.csv
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/algorithm.version.pass.cpp
The file was addedlibcxx/test/std/algorithms/alg.modifying.operations/alg.shift/shift_left.pass.cpp
The file was modifiedlibcxx/utils/generate_feature_test_macro_components.py
The file was modifiedlibcxx/docs/FeatureTestMacroTable.rst
The file was modifiedlibcxx/test/std/language.support/support.limits/support.limits.general/version.version.pass.cpp
The file was modifiedlibcxx/include/version
Commit c4355670b4bb12bc7181a99345bf8d09af1c5762 by erik.pilkington
[Sema] Fix an assertion failure in -Wcompletion-handler

NamedDecl::getName() was being called on a constructor.
The file was addedclang/test/SemaObjCXX/warn-called-once.mm
The file was modifiedclang/lib/Analysis/CalledOnceCheck.cpp
Commit f851db3dae5cc24ce1897918bd69fa989aa31b59 by arthur.j.odwyer
[libc++] [P0879] constexpr std::reverse, partition, *_permutation.

After this patch, the only parts of P0879 that remain missing will be
std::nth_element, std::sort, and the heap/partial_sort algorithms.

Differential Revision: https://reviews.llvm.org/D93443
The file was modifiedlibcxx/test/std/algorithms/alg.sorting/alg.permutation.generators/next_permutation.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.reverse/reverse.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/alg.sorting/alg.permutation.generators/next_permutation_comp.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/alg.sorting/alg.permutation.generators/prev_permutation_comp.pass.cpp
The file was modifiedlibcxx/test/std/algorithms/alg.sorting/alg.permutation.generators/prev_permutation.pass.cpp
The file was modifiedlibcxx/include/algorithm
The file was modifiedlibcxx/test/std/algorithms/alg.modifying.operations/alg.partitions/partition.pass.cpp
Commit c3324450b204392169d4ec7172cb32f74c03e376 by keithbsmiley
[clang] Add -fprofile-prefix-map

This flag allows you to re-write absolute paths in coverage data analogous to -fdebug-prefix-map. This flag is also implied by -ffile-prefix-map.
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/test/Driver/debug-prefix-map.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/CodeGen/CoverageMappingGen.cpp
The file was modifiedclang/lib/CodeGen/CoverageMappingGen.h
The file was modifiedclang/include/clang/Basic/CodeGenOptions.h
The file was addedclang/test/Profile/profile-prefix-map.c
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
Commit 1e739552ee96db4b3f2d792976ea849cb6f23650 by zinenko
[mlir] Use more C99 comments in C API header files

These were left over from the original reformatting commit.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D95357
The file was modifiedmlir/include/mlir-c/AffineMap.h
The file was modifiedmlir/include/mlir-c/Pass.h
The file was modifiedmlir/include/mlir-c/Support.h
The file was modifiedmlir/include/mlir-c/AffineExpr.h
The file was modifiedmlir/include/mlir-c/BuiltinTypes.h
The file was modifiedmlir/include/mlir-c/BuiltinAttributes.h
The file was modifiedmlir/include/mlir-c/Diagnostics.h
The file was modifiedmlir/include/mlir-c/IR.h
Commit 1150bfa6bb099f9a85a140f66fde7b7f7aa54e60 by nemanja.i.ibm
[PowerPC] Add missing negate for VPERMXOR on little endian subtargets

This intrinsic is supposed to have the permute control vector complemented on
little endian systems (as the ABI specifies and GCC implements). With the
current code gen, the result vector is byte-reversed.

Differential revision: https://reviews.llvm.org/D95004
The file was modifiedllvm/test/CodeGen/PowerPC/crypto_bifs.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrAltivec.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrVSX.td
Commit 299b0e5ee9ee30093ccc9fe78b7797c16887150d by sbc
[lld] Consistent help text for `--save-temps`

I noticed that this option was not appearing at all in the `--help`
messages for `wasm-ld` or `ld.lld`.

Add help text and make it consistent across all ports.

Differential Revision: https://reviews.llvm.org/D94925
The file was modifiedlld/COFF/Options.td
The file was modifiedlld/ELF/Options.td
The file was modifiedlld/MachO/Options.td
The file was modifiedlld/wasm/Options.td
Commit c9cd9a006632419ce7346e50564e6347a93181cc by wmi
[SampleFDO] Report error when reading a bad/incompatible profile instead of
turning off SampleFDO silently.

Currently sample loader pass turns off SampleFDO optimization silently when
it sees error in reading the profile. This behavior will defeat the tests
which could have caught those bad/incompatible profile problems. This patch
change the behavior to report error.

Differential Revision: https://reviews.llvm.org/D95269
The file was modifiedllvm/test/Transforms/SampleProfile/profile-format.ll
The file was addedllvm/test/Transforms/SampleProfile/Inputs/bad.extbinary.afdo
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
Commit c8fc5c0385dbb47623c1cca5efa0b96d5e5f8151 by diego.caballero
[mlir][Affine] Add support for multi-store producer fusion

This patch adds support for producer-consumer fusion scenarios with
multiple producer stores to the AffineLoopFusion pass. The patch
introduces some changes to the producer-consumer algorithm, including:

* For a given consumer loop, producer-consumer fusion iterates over its
producer candidates until a fixed point is reached.

* Producer candidates are gathered beforehand for each iteration of the
consumer loop and visited in reverse program order (not strictly guaranteed)
to maximize the number of loops fused per iteration.

In general, these changes were needed to simplify the multi-store producer
support and remove some of the workarounds that were introduced in the past
to support more fusion cases under the single-store producer limitation.

This patch also preserves the existing functionality of AffineLoopFusion with
one minor change in behavior. Producer-consumer fusion didn't fuse scenarios
with escaping memrefs and multiple outgoing edges (from a single store).
Multi-store producer scenarios will usually (always?) have multiple outgoing
edges so we couldn't fuse any with escaping memrefs, which would greatly limit
the applicability of this new feature. Therefore, the patch enables fusion for
these scenarios. Please, see modified tests for specific details.

Reviewed By: andydavis1, bondhugula

Differential Revision: https://reviews.llvm.org/D92876
The file was modifiedmlir/lib/Transforms/Utils/LoopFusionUtils.cpp
The file was modifiedmlir/lib/Analysis/Utils.cpp
The file was modifiedmlir/include/mlir/Analysis/AffineStructures.h
The file was modifiedmlir/lib/Analysis/AffineStructures.cpp
The file was modifiedmlir/include/mlir/Transforms/Passes.td
The file was modifiedmlir/test/Transforms/loop-fusion.mlir
The file was modifiedmlir/include/mlir/Transforms/LoopFusionUtils.h
The file was modifiedmlir/include/mlir/Analysis/Utils.h
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
Commit 988a5334ed40ee65c91bf30be93631b092316390 by rnk
[Win64] Ensure all stack frames are 8 byte aligned

The unwind info format requires that all adjustments are 8 byte aligned,
and the bottom three bits are masked out. Most Win64 calling conventions
have 32 bytes of shadow stack space for spilling parameters, and I
believe that constructing these fixed stack objects had the side effect
of ensuring an alignment of 8. However, the Intel regcall convention
does not have this shadow space, so when using that convention, it was
possible to make a 4 byte stack frame, which was impossible to describe
with unwind info.

Fixes pr48867
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.h
The file was addedllvm/test/CodeGen/X86/win64_regcall.ll
Commit 9d5095875754046972d8512d98194acf7f032e36 by Louis Dionne
[libc++] Fix build after 51faba35fd81fbd3af407a29c136895a718ccd96

Differential Revision: https://reviews.llvm.org/D95372
The file was modifiedlibcxx/include/variant
Commit 239cfbccb0509da1a08d9e746706013b732e646b by craig.topper
[RISCV] Custom type legalize i8/i16 UDIV/UREM/SDIV on RV64 so we can use divuw/remuw/divw.

This makes our i8/i16 codegen more similar to the i32 codegen.

I've also added computeKnownBits support for DIVUW/REMUW so
that we can remove zero extending ANDs from the output. Without
this we end up turning DIVUW/REMUW back into DIVU/REMU via some
isel patterns.

Reviewed By: frasercrmck, luismarques

Differential Revision: https://reviews.llvm.org/D95322
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.h
The file was modifiedllvm/lib/Target/RISCV/RISCVISelLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv64m-exhaustive-w-insts.ll
Commit f05b492aae4d4a741ec59f19518df91a3012824c by n.james93
[clangd][NFC] Simplify handing on methods with no params

Add bind methods handling the case when a method has an empty params interface and when it has no parameters.

Remove ShutdownParams and ExitParams from Protocol, In LSP they aren't defined, instead the methods are defined to have void as the params. This signature now better reflects that.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D95270
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.h
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
The file was modifiedclang-tools-extra/clangd/Protocol.h
Commit 27cc4a8138d819f78bc4fc028e39772bbda84dbd by tianshilei1992
[OpenMP][NVPTX] Rewrite CUDA intrinsics with NVVM intrinsics

This patch makes prep for dropping CUDA when compiling `deviceRTLs`.
CUDA intrinsics are replaced by NVVM intrinsics which refers to code in
`__clang_cuda_intrinsics.h`. We don't want to directly include it because in the
near future we're going to switch to OpenMP and by then the header cannot be
used anymore.

Reviewed By: JonChesterfield

Differential Revision: https://reviews.llvm.org/D95327
The file was modifiedopenmp/libomptarget/deviceRTLs/nvptx/src/target_impl.cu
Commit f5c7c031e2493168b3c2cfea3219e2131cc01483 by zinenko
[mlir] Add C API for IntegerSet

Depends On D95357

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D95368
The file was addedmlir/lib/CAPI/IR/IntegerSet.cpp
The file was modifiedmlir/include/mlir/IR/IntegerSet.h
The file was addedmlir/include/mlir-c/IntegerSet.h
The file was addedmlir/include/mlir/CAPI/IntegerSet.h
The file was modifiedmlir/lib/CAPI/IR/CMakeLists.txt
The file was modifiedmlir/test/CAPI/ir.c
Commit d36812892c16b551f058774babbc8727737f80cd by ndesaulniers
[GVN] do not repeat PRE on failure to split critical edge

Fixes an infinite loop encountered in GVN.

GVN will delay PRE if it encounters critical edges, attempt to split
them later via calls to SplitCriticalEdge(), then restart.

The caller of GVN::splitCriticalEdges() assumed a return value of true
meant that critical edges were split, that the IR had changed, and that
PRE should be re-attempted, upon which we loop infinitely.

This was exposed after D88438, by compiling the Linux kernel for s390,
but the test case is reproducible on x86.

Fixes: https://github.com/ClangBuiltLinux/linux/issues/1261

Reviewed By: void

Differential Revision: https://reviews.llvm.org/D94996
The file was addedllvm/test/Transforms/GVN/critical-edge-split-failure.ll
The file was modifiedllvm/lib/Transforms/Scalar/GVN.cpp
Commit 4bb6244871c6914517a21f56830b3765495792f2 by a20012251
[ThreadPlan] fix exec on Linux
The file was modifiedlldb/source/Plugins/Process/FreeBSD/ProcessFreeBSD.h
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.h
The file was modifiedlldb/unittests/Process/ProcessEventDataTest.cpp
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.h
The file was modifiedlldb/unittests/Thread/ThreadTest.cpp
The file was modifiedlldb/test/API/functionalities/exec/TestExec.py
The file was modifiedlldb/include/lldb/Target/ThreadPlan.h
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp
The file was modifiedlldb/source/Plugins/Process/Windows/Common/ProcessWindows.cpp
The file was modifiedlldb/source/Target/ThreadPlanStack.cpp
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.cpp
The file was modifiedlldb/unittests/Target/ExecutionContextTest.cpp
The file was modifiedlldb/source/Plugins/Process/elf-core/ProcessElfCore.h
The file was modifiedlldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.h
The file was modifiedlldb/include/lldb/Target/ThreadPlanStack.h
The file was modifiedlldb/include/lldb/Target/ProcessTrace.h
The file was modifiedlldb/source/Target/ThreadPlan.cpp
The file was modifiedlldb/source/Plugins/Process/minidump/ProcessMinidump.cpp
The file was modifiedlldb/source/Plugins/Process/FreeBSD/ProcessFreeBSD.cpp
The file was modifiedlldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp
The file was modifiedlldb/source/Plugins/Process/Windows/Common/ProcessWindows.h
The file was modifiedlldb/source/Target/ProcessTrace.cpp
The file was modifiedlldb/source/Plugins/Process/MacOSX-Kernel/ProcessKDP.cpp
The file was modifiedlldb/source/Plugins/Process/minidump/ProcessMinidump.h
The file was modifiedlldb/include/lldb/Target/Process.h
The file was modifiedlldb/source/Target/Process.cpp
Commit 76afbf60ed7fb48233c9af9f74f2e8399fd38214 by flo
[VPlan] Replace uses with new value in VPInstructionsToVPRecipe (NFC).

Now that VPRecipeBase inherits from VPDef, we can always use the new
VPValue for replacement, if the recipe defines one. Given the recipes
that are supported at the moment, all new recipes must have either 0 or
1 defined values.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanTransforms.cpp
Commit 9946b169c379daee603436a4753acfef8be373dd by julian.lettner
[lit] Use os.cpu_count() to cleanup TODO

We can now use Python3.  Let's use `os.cpu_count()` to cleanup this
helper.

Differential Revision: https://reviews.llvm.org/D94734
The file was modifiedllvm/utils/lit/lit/run.py
The file was modifiedllvm/utils/lit/lit/util.py
The file was modifiedllvm/utils/lit/lit/cl_arguments.py
Commit 9d9ceb37453ffe0186d04f4e9e4ba9fb41200b57 by keithbsmiley
Revert "[clangd][NFC] Simplify handing on methods with no params"

This broke the build http://lab.llvm.org:8011/#/builders/7/builds/1405

This reverts commit f05b492aae4d4a741ec59f19518df91a3012824c.

Differential Revision: https://reviews.llvm.org/D95385
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.cpp
The file was modifiedclang-tools-extra/clangd/ClangdLSPServer.h
The file was modifiedclang-tools-extra/clangd/Protocol.h
Commit 53176c168061d6f26dcf3ce4fa59288b7d67255e by Akira
[ObjC][ARC] Annotate calls with attributes instead of emitting retainRV
or claimRV calls in the IR

Background:

This patch makes changes to the front-end and middle-end that are
needed to fix a longstanding problem where llvm breaks ARC's autorelease
optimization (see the link below) by separating calls from the marker
instructions or retainRV/claimRV calls. The backend changes are in
https://reviews.llvm.org/D92569.

https://clang.llvm.org/docs/AutomaticReferenceCounting.html#arc-runtime-objc-autoreleasereturnvalue

What this patch does to fix the problem:

- The front-end annotates calls with attribute "clang.arc.rv"="retain"
  or "clang.arc.rv"="claim", which indicates the call is implicitly
  followed by a marker instruction and a retainRV/claimRV call that
  consumes the call result. This is currently done only when the target
  is arm64 and the optimization level is higher than -O0.

- ARC optimizer temporarily emits retainRV/claimRV calls after the
  annotated calls in the IR and removes the inserted calls after
  processing the function.

- ARC contract pass emits retainRV/claimRV calls after the annotated
  calls. It doesn't remove the attribute on the call since the backend
  needs it to emit the marker instruction. The retainRV/claimRV calls
  are emitted late in the pipeline to prevent optimization passes from
  transforming the IR in a way that makes it harder for the ARC
  middle-end passes to figure out the def-use relationship between the
  call and the retainRV/claimRV calls (which is the cause of PR31925).

- The function inliner removes the autoreleaseRV call in the callee that
  returns the result if nothing in the callee prevents it from being
  paired up with the calls annotated with "clang.arc.rv"="retain/claim"
  in the caller. If the call is annotated with "claim", a release call
  is inserted since autoreleaseRV+claimRV is equivalent to a release. If
  it cannot find an autoreleaseRV call, it tries to transfer the
  attributes to a function call in the callee. This is important since
  ARC optimizer can remove the autoreleaseRV call returning the callee
  result, which makes it impossible to pair it up with the retainRV or
  claimRV call in the caller. If that fails, it simply emits a retain
  call in the IR if the call is annotated with "retain" and does nothing
  if it's annotated with "claim".

- This patch teaches dead argument elimination pass not to change the
  return type of a function if any of the calls to the function are
  annotated with attribute "clang.arc.rv". This is necessary since the
  pass can incorrectly determine nothing in the IR uses the function
  return, which can happen since the front-end no longer explicitly
  emits retainRV/claimRV calls in the IR, and change its return type to
  'void'.

Future work:

- Use the attribute on x86-64.

- Fix the auto upgrader to convert call+retainRV/claimRV pairs into
  calls annotated with the attributes.

rdar://71443534

Differential Revision: https://reviews.llvm.org/D92808
The file was modifiedllvm/lib/Transforms/ObjCARC/ARCRuntimeEntryPoints.h
The file was modifiedllvm/lib/Transforms/ObjCARC/ObjCARCContract.cpp
The file was modifiedllvm/lib/Transforms/ObjCARC/PtrState.h
The file was modifiedllvm/test/CodeGen/AArch64/call-rv-marker.ll
The file was modifiedllvm/lib/Transforms/IPO/DeadArgumentElimination.cpp
The file was modifiedllvm/lib/Transforms/ObjCARC/ObjCARC.cpp
The file was modifiedllvm/lib/Transforms/ObjCARC/PtrState.cpp
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp
The file was addedllvm/test/Transforms/Inline/inline-retainRV-call.ll
The file was addedllvm/include/llvm/Analysis/ObjCARCRVAttr.h
The file was modifiedclang/test/CodeGenObjC/arc-unsafeclaim.m
The file was modifiedllvm/lib/Transforms/ObjCARC/ObjCARCOpts.cpp
The file was modifiedllvm/lib/Transforms/Utils/InlineFunction.cpp
The file was modifiedllvm/test/Transforms/DeadArgElim/deadretval.ll
The file was modifiedllvm/lib/IR/Instruction.cpp
The file was addedclang/test/CodeGenObjC/arc-rv-attr.m
The file was addedllvm/test/Transforms/ObjCARC/contract-rv-attr.ll
The file was modifiedllvm/test/Transforms/ObjCARC/rv.ll
The file was modifiedllvm/test/Transforms/ObjCARC/contract-marker-funclet.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedclang/lib/CodeGen/CGObjC.cpp
The file was modifiedllvm/lib/Transforms/ObjCARC/ObjCARC.h
Commit 6cb288797122ad931aba91e05030c24984e1031c by bjoern
[clang-format] [NFC] Use some constexpr StringRef

Instead of const char*.

Differential Revision: https://reviews.llvm.org/D95078
The file was modifiedclang/lib/Format/BreakableToken.cpp
Commit 7c8b9c102f38a4d29ac56ef7bd1da003f03900d0 by bjoern
[clang-format] [NFC] Restructure getLineCommentIndentPrefix

When sorting the known prefixes after length the if in the loop will hit
at most once, so we can return from there.

Also replace the inner loop with an algorithm, that makes it more
readable.

Differential Revision: https://reviews.llvm.org/D95081
The file was modifiedclang/lib/Format/BreakableToken.cpp
Commit 9aa38a0615119a7a9f3bee33a2b8915c45f1cab9 by bjoern
[clang-format] [NFC] Remove unsued arguments
The file was modifiedclang/lib/Format/BreakableToken.cpp
The file was modifiedclang/lib/Format/ContinuationIndenter.cpp
The file was modifiedclang/lib/Format/BreakableToken.h
Commit 60bf5826cfd3629b5200a8ab743d701c90f66af0 by bjoern
[clang-format] PR16518 Add flag to suppress empty line insertion before access modifier

Add new option called InsertEmptyLineBeforeAccessModifier. Empty line
before access modifier is inerted if this option is set to true (which
is the default value, because clang-format always inserts empty lines
before access modifiers), otherwise empty lines are removed.

Fixes issue #16518.

Differential Revision: https://reviews.llvm.org/D93846
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
The file was addedclang/test/Format/access-modifiers.cpp
The file was modifiedclang/lib/Format/Format.cpp
The file was modifiedclang/lib/Format/UnwrappedLineFormatter.cpp
The file was modifiedclang/include/clang/Format/Format.h
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit f02eca0f3feffc5e1afb92eeb4cfc23b9f28aa25 by bjoern
[clang-format] [NFC] Rerun dump_format_style.py
The file was modifiedclang/docs/ClangFormatStyleOptions.rst
Commit a206d991f96ba5c864aa6527f87b72ab1fdf3f4c by thakis
libcxx: Try to fix build after D92044
The file was modifiedlibcxx/include/variant
Commit 12b34ffc35f657034776ff8f20b249e26a8f91ab by llvmgnsyncbot
[gn build] Port e123cd674c02
The file was modifiedllvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
Co