FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. Fix LLVM_ENABLE_MODULES build after TypeSize.h change (details)
  2. Refactor CommandObjectTargetSymbolsAdd::AddModuleSymbols (details)
  3. Improve help text for (lldb) target symbols add (details)
  4. Fix modules build after PassManagerImpl.h addition (details)
  5. AMDGPU: Add flag to control mem intrinsic expansion (details)
  6. [AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation (details)
  7. [libFuzzer] Minor documentation fixes. (details)
  8. [ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access (details)
  9. [AArch64][GlobalISel] Fold G_XOR into TB(N)Z bit calculation (details)
  10. [OpenMP] [DOCS] Update OMP5.0 feature status table [NFC] (details)
  11. [lldb/DataExtractor] Fix UB shift in GetMaxS64Bitfield (details)
  12. [lldb/DataExtractor] Use an early return in GetMaxS64Bitfield, NFC (details)
  13. [lldb/StringPrinter] Simplify StringPrinterBufferPointer, NFC (details)
  14. [compiler-rt] implement sigaltstack interception (details)
  15. [TestKernVerStrLCNOTE] Strengthen a check. NFC. (details)
  16. Reland "[AArch64] Fix data race on RegisterBank initialization." (details)
  17. Revert "Reland "[AArch64] Fix data race on RegisterBank (details)
  18. [X86] Update the haswell and broadwell scheduler information for gather (details)
  19. DebugInfo: Add missing test coverage for DW_OP_convert in loclists (details)
  20. hwasan_symbolize: warn about missing symbols at most once per library (details)
  21. hwasan_symbolize: allow 0x in the address field (details)
Commit 9831e5c7b9fa3718376f2ed06091af6ac6490679 by rnk
Fix LLVM_ENABLE_MODULES build after TypeSize.h change
The file was modifiedllvm/include/llvm/Support/TypeSize.h
Commit c25938d57b1cf9534887313405bc409e570a9b69 by amccarth
Refactor CommandObjectTargetSymbolsAdd::AddModuleSymbols
* [NFC] Renamed local `matching_module_list` to `matching_modules` for
conciseness.
* [NFC] Eliminated redundant local variable `num_matches` to reduce the
risk that changes get it out of sync with `matching_modules.GetSize()`.
* Used an early return from case where the symbol file specified matches
multiple modules.  This is a slight behavior change, but it's an
improvement: It didn't make sense to tell the user that the symbol file
simultaneously matched multiple modules and no modules.
* [NFC] Used an early return from the case where no matches are found,
to better align with LLVM coding style.
* [NFC] Simplified call of `AppendWarningWithFormat("%s", stuff)` to
`AppendWarning(stuff)`.  I don't think this adds any copies.  It does
construct a StringRef, but it was going to have to scan the string for
the length anyway.
* [NFC] Removed unnecessary comments and reworded others for clarity.
* Used an early return if the symbol file could not be loaded.  This is
a behavior change because previously it could fail silently.
* Used an early return if the object file could not be retrieved from
the symbol file.  Again, this is a change because now there's an error
message.
* [NFC] Eliminated a namespace alias that wasn't particularly helpful.
Differential Revision: https://reviews.llvm.org/D73594
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp
Commit 0e362d82b97fe16b5671ceeb2f3e5b6f4ccf00dd by amccarth
Improve help text for (lldb) target symbols add
There were some missing words and awkward syntax.  I think this is
clearer.
Differential Revision: https://reviews.llvm.org/D73589
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp
Commit f8c4d70d11388ddbf3ccc63ca4ea35d09a987d41 by rnk
Fix modules build after PassManagerImpl.h addition
This new header needs to be in the LLVM_intrinsics_gen module.
The file was modifiedllvm/include/llvm/module.modulemap
Commit 7d3aace3f52f6b3f87aac432aa41ae1cdeb348eb by Matthew.Arsenault
AMDGPU: Add flag to control mem intrinsic expansion
GlobalISel doesn't implement the expansion for these yet, so add a flag
to force expanding these so it's possible to avoid these for a while.
The file was addedllvm/test/CodeGen/AMDGPU/lower-mem-intrinsics-threshold.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULowerIntrinsics.cpp
Commit 37910fd0e1fdd821c71c16572eca815218f54872 by Jessica Paquette
[AArch64][GlobalISel] Fold G_SHL into TB(N)Z bit calculation
This implements the following optimization:
```
(tbz (shl x, c), b) -> (tbz x, b-c)
```
Which appears in `getTestBitOperand` in AArch64ISelLowering.cpp.
If we test bit `b` of `shl x, c`, we can fold away the `shl` by looking
`c` bits to the right of `b` in `x` when this fits in the type. So, we
can just test the
`b-c`th bit.
Differential Revision: https://reviews.llvm.org/D73924
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/opt-fold-shift-tbz-tbnz.mir
Commit 2ddff6fab024d7fe6e4d571b7a53e16beed60e5e by mmoroz
[libFuzzer] Minor documentation fixes.
The file was modifiedllvm/docs/LibFuzzer.rst
Commit 2252cac694f142c84f53a45793b325f5bef9124f by jay.foad
[ANDGPU] getMemOperandsWithOffset: support BUF non-stack-access
instructions with resource but no vaddr
Summary: This enables clustering for many more BUF instructions.
Reviewers: rampitec, arsenm, nhaehnle
Subscribers: jvesely, wdng, hiraditya, kerbowa, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D73868
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.memcpy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bswap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/merge-stores.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cttz_zero_undef.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/sdiv.ll
Commit 9effe38b225f3dfd72d6f1800f2ea47175b5bf95 by Jessica Paquette
[AArch64][GlobalISel] Fold G_XOR into TB(N)Z bit calculation
This ports the existing case for G_XOR from `getTestBitOperand` in
AArch64ISelLowering into GlobalISel.
The idea is to flip between TBZ and TBNZ while walking through G_XORs.
Let's say we have
``` tbz (xor x, c), b
```
Let's say the `b`-th bit in `c` is 1. Then
- If the `b`-th bit in `x` is 1, the `b`-th bit in `(xor x, c)` is 0.
- If the `b`-th bit in `x` is 0, then the `b`-th bit in `(xor x, c)` is
1.
So, then
``` tbz (xor x, c), b == tbnz x, b
```
Let's say the `b`-th bit in `c` is 0. Then
- If the `b`-th bit in `x` is 1, the `b`-th bit in `(xor x, c)` is 1.
- If the `b`-th bit in `x` is 0, then the `b`-th bit in `(xor x, c)` is
0.
So, then
``` tbz (xor x, c), b == tbz x, b
```
Differential Revision: https://reviews.llvm.org/D73929
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/opt-fold-xor-tbz-tbnz.mir
The file was modifiedllvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
Commit ac430336318a1abe6e4726e8df49ee0e6b779691 by kkwli0
[OpenMP] [DOCS] Update OMP5.0 feature status table [NFC]
Differential Revision: https://reviews.llvm.org/D72901
The file was modifiedclang/docs/OpenMPSupport.rst
Commit 7b90cdedd1d3f743eeb2b7654d65386672d0f1a9 by Vedant Kumar
[lldb/DataExtractor] Fix UB shift in GetMaxS64Bitfield
DataExtractor::GetMaxS64Bitfield performs a shift with UB in order to
construct a bitmask when bitfield_bit_size is 64. The current
implementation actually does “work” in this case, because the assumption
that the shift result is 0 holds, and 0 minus 1 gives the all-ones value
(the correct mask). However, the more readable/maintainable approach
might be to use an off-the-shelf UB-free helper.
Fixes a UBSan issue:
  "col" : 37,
"description" : "invalid-shift-exponent",
"filename" :
"/Users/vsk/src/llvm-project-master/lldb/source/Utility/DataExtractor.cpp",
"instrumentation_class" : "UndefinedBehaviorSanitizer",
"line" : 615,
"memory_address" : 0,
"summary" : "Shift exponent 64 is too large for 64-bit type 'uint64_t'
(aka 'unsigned long long')",
rdar://59117758
Differential Revision: https://reviews.llvm.org/D73913
The file was modifiedlldb/source/Utility/DataExtractor.cpp
The file was modifiedlldb/unittests/Utility/DataExtractorTest.cpp
The file was modifiedlldb/include/lldb/Utility/DataExtractor.h
Commit bb6646ce0a2e59eda682f63696915d2dc7db40db by Vedant Kumar
[lldb/DataExtractor] Use an early return in GetMaxS64Bitfield, NFC
Shafik suggested this cleanup in https://reviews.llvm.org/D73913.
The file was modifiedlldb/source/Utility/DataExtractor.cpp
Commit 63e65082219983f1dba4faf273bad311715da14e by Vedant Kumar
[lldb/StringPrinter] Simplify StringPrinterBufferPointer, NFC
Remove its template arguments and delete its copy/assign methods.
The file was modifiedlldb/source/DataFormatters/StringPrinter.cpp
The file was modifiedlldb/include/lldb/DataFormatters/StringPrinter.h
Commit 28c91219c7e2180c3605ce403c05c4eccac6f615 by eugenis
[compiler-rt] implement sigaltstack interception
Summary: An implementation for `sigaltstack` to make its side effect be
visible to MSAN.
``` ninja check-msan
```
Reviewers: vitalybuka, eugenis
Reviewed By: eugenis
Subscribers: dberris, #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73816
Patch by Igor Sugak.
The file was modifiedcompiler-rt/include/sanitizer/linux_syscall_hooks.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_interceptors.h
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_interceptors.inc
The file was addedcompiler-rt/test/msan/sigaltstack.cpp
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_common_syscalls.inc
The file was modifiedcompiler-rt/lib/sanitizer_common/sanitizer_platform_limits_posix.h
Commit 246097a091bfddca081f4d0f7d84530579e3bb33 by ditaliano
[TestKernVerStrLCNOTE] Strengthen a check. NFC.
The file was modifiedlldb/packages/Python/lldbsuite/test/macosx/lc-note/kern-ver-str/TestKernVerStrLCNOTE.py
Commit 9c726e9d90583a4bf2934ada9c9d8030c44a868d by huihuiz
Reland "[AArch64] Fix data race on RegisterBank initialization."
Minor fix, lambda function should capture all automatic variables by
reference. Harbormaster pass with: https://reviews.llvm.org/B45640
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
Commit 9a40670a0a4e9a3139bd082c9e48ae47b2cb876f by huihuiz
Revert "Reland "[AArch64] Fix data race on RegisterBank
initialization.""
This reverts commit 9c726e9d90583a4bf2934ada9c9d8030c44a868d.
There still buildbot failure:
http://lab.llvm.org:8011/builders/clang-armv7-linux-build-cache/builds/25749
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterBankInfo.cpp
Commit c7768ce52224297fd5d39e8dae69cf6b0df4ece1 by craig.topper
[X86] Update the haswell and broadwell scheduler information for gather
instructions
Broadwell was missing half the gather instructions. Both models had some
mixups in the resource costs and number of uops.
I've updated here based on what I think the original IACA source says
with some cross checking against the microcode.
I'm not sure about latency as the IACA source I have doesn't have that
information. So I'm using the latency from uops.info.
I plan to update Skylake models as well, but I'll do that in a separate
patch.
Differential Revision: https://reviews.llvm.org/D73844
The file was modifiedllvm/lib/Target/X86/X86SchedBroadwell.td
The file was modifiedllvm/test/tools/llvm-mca/X86/Haswell/resources-avx2.s
The file was modifiedllvm/test/tools/llvm-mca/X86/Broadwell/resources-avx2.s
The file was modifiedllvm/lib/Target/X86/X86SchedHaswell.td
Commit 5327b917e3bd0b3db352cb5a61eea7409f2d1972 by dblaikie
DebugInfo: Add missing test coverage for DW_OP_convert in loclists
The file was addedllvm/test/DebugInfo/X86/convert-loclist.ll
Commit 0dc634babf9eff587ea9b4cf5b847749f6225dee by eugenis
hwasan_symbolize: warn about missing symbols at most once per library
Reviewers: vitalybuka
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73822
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize
Commit 6da6153759a1cb77a65084d86de813bd9134c2a1 by eugenis
hwasan_symbolize: allow 0x in the address field
Summary: Fix parsing of mangled stack trace lines where the address has
been replaced with "0x", literally.
Reviewers: vitalybuka
Subscribers: #sanitizers, llvm-commits
Tags: #sanitizers, #llvm
Differential Revision: https://reviews.llvm.org/D73823
The file was modifiedcompiler-rt/lib/hwasan/scripts/hwasan_symbolize