Changes from Git (git http://labmaster3.local/git/llvm-project.git)


  1. [NFC] Encapsulate MemOp logic (details)
  2. [ARM][VecReduce] Force expand vector_reduce_fmin (details)
  3. Revert "[X86] Use X86ISD::SUB instead of X86ISD::CMP in some places." (details)
Commit b8144c053620c2c8b3d100815f806004970ed936 by gchatelet
[NFC] Encapsulate MemOp logic
Summary: This patch simply introduces functions instead of directly
accessing the fields. This helps introducing additional check logic. A
second patch will add simplifying functions.
Reviewers: courbet
Subscribers: arsenm, nemanjai, jvesely, nhaehnle, hiraditya, kbarton,
jsji, kerbowa, llvm-commits
Tags: #llvm
Differential Revision:
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/BPF/BPFISelLowering.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/lib/Target/ARM/ARMISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
Commit 362d00e0510ee75750499e2993a782428e377215 by
[ARM][VecReduce] Force expand vector_reduce_fmin
Under MVE, we do not have any lowering for fminimum, which a
vector_reduce_fmin without NoNan will be expanded into. As with the
other recent patches, force this to expand in the pre-isel pass. Note
that Neon lowering would be OK because the scalar fminimum uses the
vector VMIN instruction, but is probably better to just rely on the
scalar operations, which is what is done here.
Also fixes what appears to be the reversal of INF vs -INF in the
vector_reduce_fmin widening code.
The file was addedllvm/test/CodeGen/Thumb2/mve-vecreduce-fminmax.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/test/CodeGen/AArch64/vecreduce-fmax-legalization.ll
Commit d2b6ac6ccda5ad8e38eee38e7ee46acad03540be by kadircet
Revert "[X86] Use X86ISD::SUB instead of X86ISD::CMP in some places."
This reverts commit 8413116bf10402eef12f556cb9d80b08faeb9890.
this seems to be causing crashes while compiling ncurses.
$ ./bin/llc bugpoint-reduced-simplified.ll LLVM ERROR: Cannot emit
physreg copy instruction
Here are the crashers:
executing with an llc compiled at
904d54de9ba9f71e937b24e04ad5941281cd50b7 works fine.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp