Changes

[Clang][CodeGen][RISCV] Add hard float ABI tests with empty struct

This patch adds tests that showcase a behavior that is currently buggy.
Fix in a follow-up patch.

Differential Revision: https://reviews.llvm.org/D91269

[Clang][CodeGen][RISCV] Fix hard float ABI test cases with empty struct

The code seemed not to account for the field 1 offset.

Differential Revision: https://reviews.llvm.org/D91270

[Clang][CodeGen][RISCV] Fix hard float ABI for struct with empty struct and complex

Fixes bug 44904.

Differential Revision: https://reviews.llvm.org/D91278

[mlir] properly support min/max in affine parallelization

The existing implementation of the affine parallelization silently copies over
the lower and upper bound maps from affine.for to affine.parallel. However, the
semantics of these maps differ between these two ops: in affine.for, a max(min)
of results is taken for the lower(upper) bound; in affine.parallel, multiple
induction variables can be defined an each result corresponds to one induction
variable. Thus the existing implementation could generate invalid IR or IR that
passes the verifier but has different semantics than the original code. Fix the
parallelization utility to emit dedicated min/max operations before the
affine.parallel in such cases. Disallow parallelization if min/max would have
been in an operation without the AffineScope trait, e.g., in another loop,
since the result of these operations is not considered a valid affine dimension
identifier and may not be properly handled by the affine analyses.

Reviewed By: wsmoses

Differential Revision: https://reviews.llvm.org/D92763

[mlir] Add an option to control the number of loops in affine parallelizer

Add a pass option to control the number of nested parallel loops produced by
the parallelization passes. This is useful to build end-to-end passes targeting
systems that don't need multiple parallel dimensions (e.g., CPUs typically need
only one).

Reviewed By: wsmoses, chelini

Differential Revision: https://reviews.llvm.org/D92765

[DSE][NFC] Need to be carefull mixing signed and unsigned types

Currently in some places we use signed type to represent size of an access and put explicit casts from unsigned to signed.
For example: int64_t EarlierSize = int64_t(Loc.Size.getValue());

Even though it doesn't loos bits (immidiatly) it may overflow and we end up with negative size. Potentially that cause later code to work incorrectly. A simple expample is a check that size is not negative.

I think it would be safer and clearer if we use unsigned type for the size and handle it appropriately.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D92648

[JITLink][ELF] Route objects to their matching linker backends based on header info

Distinguish objects by target properties address size, endian and machine architecture. So far we only
support x86-64 (ELFCLASS64, ELFDATA2LSB, EM_X86_64).

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D90860

[Orc] Two small fixes in TPCDynamicLibrarySearchGenerator

There is one result per lookup symbol, so we have to advance the result iterator no matter whether it's NULL or not.
MissingSymbols variable is unused.

Reviewed By: lhames

Differential Revision: https://reviews.llvm.org/D91707