Changes

Summary

[X86][SSE] combineX86ShufflesRecursively - add basic handling for combining shuffles of different widths (PR45974) (details)
[NFC]{AMDGPU] Update AMDGPUUsage with AMD RDNA 2 reference (details)

Commit d5c434d7dda25909cd7886e419baf3db3578953e by llvm-dev [X86][SSE] combineX86ShufflesRecursively - add basic handling for combining shuffles of different widths (PR45974) If a faux shuffle uses smaller shuffle inputs, try to recursively combine with those inputs directly instead of widening them immediately. Then widen all smaller inputs at the bottom of the recursion. This will still mean we're generating nodes on the fly (PR45974) even if we don't combine to a new shuffle but it does help AVX2+ targets combine across xmm/ymm/zmm types, mainly as variable shuffles.
	llvm/test/CodeGen/X86/vector-shuffle-256-v8.ll
	llvm/test/CodeGen/X86/x86-interleaved-access.ll
	llvm/test/CodeGen/X86/min-legal-vector-width.ll
	llvm/lib/Target/X86/X86ISelLowering.cpp
	llvm/test/CodeGen/X86/vector-shuffle-v1.ll
	llvm/test/CodeGen/X86/vector-shuffle-256-v16.ll
Commit 828602c772c80e11f5416127e5fad4375fa09cd8 by Tony.Tye [NFC]{AMDGPU] Update AMDGPUUsage with AMD RDNA 2 reference Differential Revision: https://reviews.llvm.org/D93172
	llvm/docs/AMDGPUUsage.rst