1. [ARM] Match dual lane vmovs from insert_vector_elt (details)
  2. [mlir] Add std op for X raised to the power of Y (details)
  3. [NFC] Fix a few SVEInstrInfo related stylistic issues. (details)
Commit 6cc3d80a84884a79967fffa4596c14001b8ba8a3 by
[ARM] Match dual lane vmovs from insert_vector_elt

MVE has a dual lane vector move instruction, capable of moving two
general purpose registers into lanes of a vector register. They look
like one of:
  vmov q0[2], q0[0], r2, r0
  vmov q0[3], q0[1], r3, r1
They only accept these lane indices though (and only insert into an
i32), either moving lanes 1 and 3, or 0 and 2.

This patch adds some tablegen patterns for them, selecting from vector
inserts elements. Because the insert_elements are know to be
canonicalized to ascending order there are several patterns that we need
to select. These lane indices are:

3 2 1 0    -> vmovqrr 31; vmovqrr 20
3 2 1      -> vmovqrr 31; vmov 2
3 1        -> vmovqrr 31
2 1 0      -> vmovqrr 20; vmov 1
2 0        -> vmovqrr 20

With the top one being the most common. All other potential patterns of
lane indices will be matched by a combination of these and the
individual vmov pattern already present. This does mean that we are
selecting several machine instructions at once due to the need to
re-arrange the inserts, but in this case there is nothing else that will
attempt to match an insert_vector_elt node.

Differential Revision:
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-not.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-sext.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vdup.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-simple-arith.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-minmax.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcvt.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqshrn.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vabdus.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst3.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld2-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld3.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-loadstore.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpz.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-neg.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shifts.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-xor.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
The file was modifiedllvm/test/CodeGen/Thumb2/active_lane_mask.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-div-expand.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-phireg.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld4-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-saturating-arith.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst2.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-and.ll
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmp.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind8-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-increment.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-ext.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqmovn.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-widen-narrow.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-or.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-abs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcreate.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmull-loop.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpr.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll
The file was modifiedllvm/lib/Target/ARM/
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld2.ll
Commit 73c580405ffae0243c113a1db6b77c0b595adf05 by tpopp
[mlir] Add std op for X raised to the power of Y


Differential Revision:
The file was modifiedmlir/test/IR/core-ops.mlir
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/
Commit 632f4d2747f0777157d10456dd431d8f4cece845 by paul.walker
[NFC] Fix a few SVEInstrInfo related stylistic issues.
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/
The file was modifiedllvm/lib/Target/AArch64/
The file was modifiedllvm/lib/Target/AArch64/
The file was modifiedllvm/lib/Target/AArch64/