1. new altera single work item barrier check (details)
  2. [LLDB] Unbreak the build after recent clang changes (details)
  3. No longer reject tag declarations in the clause-1 of a for loop. (details)
  4. [gn build] Port e69e551e0e5 (details)
  5. [NFC][SVE] Clean up bfloat isel patterns that emit non-bfloat instructions. (details)
  6. [AArch64] Fix Copy Elemination for negative values (details)
  7. Revert "[ARM] Match dual lane vmovs from insert_vector_elt" (details)
Commit e69e551e0e5fddffb6479da6a2998457104ba9e6 by aaron
new altera single work item barrier check

This lint check is a part of the FLOCL (FPGA Linters for OpenCL)
project out of the Synergy Lab at Virginia Tech.

FLOCL is a set of lint checks aimed at FPGA developers who write code
in OpenCL.

The altera single work item barrier check finds OpenCL kernel functions
that call a barrier function but do not call an ID function. These
kernel functions will be treated as single work-item kernels, which
could be inefficient or lead to errors.

Based on the "Altera SDK for OpenCL: Best Practices Guide."
The file was modifiedclang-tools-extra/clang-tidy/altera/CMakeLists.txt
The file was addedclang-tools-extra/clang-tidy/altera/SingleWorkItemBarrierCheck.cpp
The file was addedclang-tools-extra/docs/clang-tidy/checks/altera-single-work-item-barrier.rst
The file was addedclang-tools-extra/clang-tidy/altera/SingleWorkItemBarrierCheck.h
The file was modifiedclang-tools-extra/clang-tidy/altera/AlteraTidyModule.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was addedclang-tools-extra/test/clang-tidy/checkers/altera-single-work-item-barrier.cpp
Commit 430d5d8429473c2b10b109991d7577a3cea41140 by dave
[LLDB] Unbreak the build after recent clang changes

9e08e51a20d0d2b1c5724bb17e969d036fced4cd introduced a new enum case.
The file was modifiedlldb/include/lldb/lldb-enumerations.h
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.cpp
Commit 2d2498ec6c42b12eae873257e6ddce3333fe8348 by aaron
No longer reject tag declarations in the clause-1 of a for loop.

We currently reject this valid C construct by claiming it declares a
non-local variable: for (struct { int i; } s={0}; s.i != 0; s.i--) ;

We expected all declaration in the clause-1 declaration statement to be
a local VarDecl, but there can be other declarations involved such as a
tag declaration. This fixes PR35757.
The file was modifiedclang/lib/Sema/SemaStmt.cpp
The file was modifiedclang/test/Sema/for.c
Commit 07622b696f32a2080e0591e6e85b590d6a422cce by llvmgnsyncbot
[gn build] Port e69e551e0e5
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/altera/
Commit c0bc169cb17397e981952dad7321b263756ddaa0 by paul.walker
[NFC][SVE] Clean up bfloat isel patterns that emit non-bfloat instructions.

During isel there's no need to protect illegal types. Patch also
adds a missing unit test for tbl2 intrinsic using bfloat types.

Differential Revision:
The file was modifiedllvm/lib/Target/AArch64/
The file was modifiedllvm/test/CodeGen/AArch64/sve2-intrinsics-perm-tb.ll
The file was modifiedllvm/lib/Target/AArch64/
Commit fc712eb7aa00aabcdafda54776038efdc486d570 by paul.walker
[AArch64] Fix Copy Elemination for negative values

Redundant Copy Elimination was eliminating a MOVi32imm -1 when it
determined that the value of the destination register is already -1.
However, it didn't take into account that the MOVi32imm zeroes the upper
32 bits (which are FFFFFFFF) and therefore cannot be eliminated.

Reviewed By: paulwalker-arm

Differential Revision:
The file was modifiedllvm/lib/Target/AArch64/AArch64RedundantCopyElimination.cpp
The file was modifiedllvm/test/CodeGen/AArch64/machine-copy-remove.mir
Commit 6e913e44519245a79ec098c9b1459007dae84804 by
Revert "[ARM] Match dual lane vmovs from insert_vector_elt"

This one needed more testing.
The file was modifiedllvm/lib/Target/ARM/
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-not.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld4-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-add.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-neg.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld2.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-masked-ldst.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-mla.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcreate.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ptrs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-or.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-saturating-arith.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-minmax.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-shifts.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-widen-narrow.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpz.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-soft-float-abi.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-opt.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst3.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vabdus.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind8-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmp.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-ind32-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld3.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-scatter-ind8-unscaled.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-div-expand.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-ext.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-phireg.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-sext.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst2.ll
The file was modifiedllvm/test/CodeGen/Thumb2/active_lane_mask.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqshrn.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-abs.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-shuffle.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vdup.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmulh.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-increment.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-and.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vst4.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-mlapred.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vld2-post.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcvt.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-simple-arith.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vmull-loop.ll
The file was modifiedllvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqmovn.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-xor.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-loadstore.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-bitcast.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vqdmulh.ll
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vcmpr.ll