1. [AMDGPU][MC] Improved errors handling for v_interp* operands (details)
  2. [RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics. (details)
  3. [AMDGPU] Split edge to make si_if dominate end_cf (details)
  4. [clangd] Add error handling (elog) in code completion. (details)
  5. [clang-tidy][NFC] Remove unnecessary headers (details)
Commit 8c25bb3d0d5e956a3dc3a8d26b2e7ab509d0b72c by dmitry.preobrazhensky
[AMDGPU][MC] Improved errors handling for v_interp* operands

See bug 48596 (

Reviewers: rampitec

Differential Revision:
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/MC/AMDGPU/vintrp-err.s
The file was modifiedllvm/test/MC/AMDGPU/gfx10_err_pos.s
Commit e673d40199477f48b78ed9ad790ce7356474f907 by zakk.chen
[RISCV] Define vmsbf.m/vmsif.m/vmsof.m/viota.m/vid.v intrinsics.

Define those intrinsics and lower to V instructions.

Use for viota.m tests to check
earlyclobber is applied correctly.
mask viota.m tests uses the same argument as input and mask for
avoid dependency of D93364.

We work with @rogfer01 from BSC to come out this patch.

Reviewed By: HsiangKai

Differential Revision:
The file was addedllvm/test/CodeGen/RISCV/rvv/vmsif-rv64.ll
The file was modifiedllvm/include/llvm/IR/
The file was addedllvm/test/CodeGen/RISCV/rvv/vmsbf-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/viota-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vid-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vmsof-rv64.ll
The file was modifiedllvm/lib/Target/RISCV/
The file was addedllvm/test/CodeGen/RISCV/rvv/viota-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vmsif-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vid-rv32.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vmsbf-rv64.ll
The file was addedllvm/test/CodeGen/RISCV/rvv/vmsof-rv32.ll
Commit 644da789e364b338227a13b5cc11dd03c8ae5ba8 by Alexander Timofeev
[AMDGPU] Split edge to make si_if dominate end_cf

Basic block containing "if" not necessarily dominates block that is the "false" target for the if.

That "false" target block may have another predecessor besides the "if" block. IR value corresponding to the Exec mask is generated by the

si_if intrinsic and then used by the end_cf intrinsic. In this case IR verifier complains that 'Def does not dominate all uses'.

This change split the edge between the "if" block and "false" target block to make it dominated by the "if" block.

Reviewed By: arsenm

Differential Revision:
The file was addedllvm/test/CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp
Commit 0999408aea79dd69f182cfcb618006f6cf2b6d4e by adamcz
[clangd] Add error handling (elog) in code completion.

Differential Revision:
The file was modifiedclang-tools-extra/clangd/CodeComplete.cpp
Commit c3b9d85bd4b7249af9efe3594c6c152a032f83f8 by n.james93
[clang-tidy][NFC] Remove unnecessary headers
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyProfiling.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidy.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyOptions.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyCheck.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyDiagnosticConsumer.cpp
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyModule.h