Changes

Summary

Use unary CreateShuffleVector if possible (details)
clang-format, address warnings (details)

Commit 9b29610228c838a66a88edf43ddd25acf8d1b477 by aqjune Use unary CreateShuffleVector if possible As mentioned in D93793, there are quite a few places where unary `IRBuilder::CreateShuffleVector(X, Mask)` can be used instead of `IRBuilder::CreateShuffleVector(X, Undef, Mask)`. Let's update them. Actually, it would have been more natural if the patches were made in this order: (1) let them use unary CreateShuffleVector first (2) update IRBuilder::CreateShuffleVector to use poison as a placeholder value (D93793) The order is swapped, but in terms of correctness it is still fine. Reviewed By: spatel Differential Revision: https://reviews.llvm.org/D93923
	llvm/test/Transforms/SROA/vector-promotion.ll
	llvm/test/Transforms/LoopVectorize/invariant-store-vectorization.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-float-contraction.ll
	clang/test/CodeGen/X86/avx2-builtins.c
	clang/lib/CodeGen/CGBuiltin.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double-contraction-fmf.ll
	clang/test/CodeGen/X86/avx512dq-builtins.c
	clang/test/CodeGen/arm64-abi-vector.c
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-float-contraction-fmf.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/transpose-i32-row-major.ll
	clang/test/CodeGen/X86/avx512vlbw-builtins.c
	llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
	llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses.ll
	clang/test/CodeGenOpenCL/as_type.cl
	llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts-inseltpoison.ll
	clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
	clang/test/CodeGen/X86/sse2-builtins.c
	clang/test/CodeGen/arm-mve-intrinsics/vmovn.c
	llvm/test/Transforms/InterleavedAccess/ARM/interleaved-accesses.ll
	llvm/test/Transforms/SLPVectorizer/AMDGPU/horizontal-store.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-add-sub-double-row-major.ll
	llvm/test/Transforms/LoopVectorize/select-reduction.ll
	llvm/lib/Analysis/VectorUtils.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/strided-store-double.ll
	clang/test/CodeGen/X86/avx512vl-builtins.c
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double-contraction.ll
	clang/test/CodeGen/X86/avx512vldq-builtins.c
	clang/test/CodeGenOpenCL/preserve_vec3.cl
	clang/lib/CodeGen/CGExpr.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/strided-load-float.ll
	llvm/test/Transforms/SLPVectorizer/AMDGPU/reduction.ll
	llvm/test/Transforms/LoopVectorize/AMDGPU/packed-math.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-fused-volatile.ll
	llvm/test/CodeGen/Generic/expand-experimental-reductions.ll
	llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
	llvm/test/Instrumentation/MemorySanitizer/clmul.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/strided-store-i32.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/transpose-double-row-major.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backward.ll
	clang/test/CodeGen/X86/avx512bw-builtins.c
	llvm/test/Transforms/InterleavedAccess/X86/interleavedStore-inseltpoison.ll
	llvm/lib/Transforms/Scalar/SROA.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/store-align-volatile.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-float.ll
	llvm/test/Transforms/LoopVectorize/interleaved-accesses.ll
	llvm/test/CodeGen/AArch64/aarch64-interleaved-ld-combine.ll
	llvm/test/CodeGen/AMDGPU/rewrite-out-arguments.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/strided-load-double.ll
	llvm/unittests/IR/PatternMatch.cpp
	clang/lib/CodeGen/CGExprScalar.cpp
	llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp
	llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-call.ll
	clang/test/CodeGen/X86/f16c-builtins.c
	llvm/test/Transforms/InterleavedAccess/ARM/interleaved-accesses-inseltpoison.ll
	llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
	llvm/test/Transforms/InstCombine/canonicalize-vector-insert.ll
	clang/test/CodeGen/X86/f16c-builtins-constrained.c
	llvm/test/Transforms/LowerMatrixIntrinsics/strided-load-i32.ll
	clang/test/CodeGen/X86/avx512vl-builtins-constrained.c
	llvm/lib/Target/AMDGPU/AMDGPUInstCombineIntrinsic.cpp
	llvm/test/Transforms/PhaseOrdering/X86/vector-reductions-expanded.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/propagate-mixed-users.ll
	llvm/lib/CodeGen/InterleavedLoadCombinePass.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/propagate-forward.ll
	clang/test/CodeGen/arm-mve-intrinsics/vrev.c
	llvm/test/Transforms/LoopVectorize/float-minmax-instruction-flag.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/transpose-double.ll
	clang/test/CodeGenOpenCL/partial_initializer.cl
	llvm/test/Transforms/LoopVectorize/ARM/sphinx.ll
	llvm/test/Transforms/LoopVectorize/PowerPC/widened-massv-vfabi-attr.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-double-row-major.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/load-align-volatile.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/const-gep.ll
	llvm/test/CodeGen/AMDGPU/rewrite-out-arguments-address-space.ll
	llvm/lib/Target/Hexagon/HexagonVectorCombine.cpp
	llvm/test/CodeGen/AMDGPU/lower-kernargs.ll
	llvm/test/Transforms/InterleavedAccess/AArch64/interleaved-accesses-inseltpoison.ll
	clang/test/CodeGen/X86/avx512f-builtins.c
	llvm/test/Transforms/LowerMatrixIntrinsics/bigger-expressions-double.ll
	clang/test/CodeGen/arm-mve-intrinsics/vmovl.c
	clang/test/CodeGenOpenCL/vectorLoadStore.cl
	llvm/lib/Target/X86/X86InterleavedAccess.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-i32.ll
	llvm/test/Transforms/InterleavedAccess/X86/interleavedStore.ll
	llvm/lib/Target/AMDGPU/AMDGPURewriteOutArguments.cpp
	llvm/test/Transforms/InstCombine/AMDGPU/amdgcn-demanded-vector-elts.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/strided-store-float.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/propagate-backwards-unsupported.ll
	llvm/lib/Transforms/Utils/LoopUtils.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/multiply-i32-row-major.ll
	llvm/lib/CodeGen/CodeGenPrepare.cpp
	llvm/test/Transforms/LoopVectorize/reduction.ll
	clang/test/CodeGen/X86/avx-builtins.c
	llvm/lib/IR/AutoUpgrade.cpp
	llvm/test/Transforms/LowerMatrixIntrinsics/transpose-i32.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/transpose-float-row-major.ll
	llvm/test/Transforms/LowerMatrixIntrinsics/transpose-float.ll
	clang/test/CodeGenOpenCL/vector_literals_valid.cl
Commit 420d046d6bdd8d950dad389a97e31f841052efb2 by aqjune clang-format, address warnings
	clang/test/CodeGen/X86/avx512vl-builtins-constrained.c
	clang/test/CodeGen/X86/avx512f-builtins.c
	llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp
	clang/test/CodeGen/arm64-abi-vector.c
	llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp
	clang/test/CodeGen/X86/avx512-reduceMinMaxIntrin.c
	llvm/lib/Target/AMDGPU/AMDGPULowerKernelArguments.cpp
	llvm/lib/IR/AutoUpgrade.cpp