SuccessChanges

Summary

  1. [AARCH64] Improve accumulator forwarding for Cortex-A57 model (details)
  2. [VE] Change default CPU name to "generic" (details)
  3. [AArch64] Attempt to fix Mac tests with a more specific triple. NFC (details)
  4. [docs] Release notes for IsDecl in DIModule. (details)
  5. [Sparc] Fixes for the internal assembler (details)
Commit 685c8b537af3138cff24ec6060a86140b8963a1e by david.green
[AARCH64] Improve accumulator forwarding for Cortex-A57 model

The old CPU model only had MLA->MLA forwarding. I added some missing
MUL->MLA read advances and a missing absolute diff accumulator read
advance according to the Cortex A57 Software Optimization Guide.

The patch improves performance in EEMBC rgbyiqv2 by about 6%-7% and
spec2006/milc by 8% (repeated runs on multiple devices), causes no
significant regressions (none in SPEC).

Differential Revision: https://reviews.llvm.org/D92296
The file was modifiedllvm/lib/Target/AArch64/AArch64SchedA57WriteRes.td
The file was modifiedllvm/lib/Target/AArch64/AArch64SchedA57.td
The file was addedllvm/test/tools/llvm-mca/AArch64/Cortex/forwarding-A57.s
Commit c287f90ccd33b3aa47488e8f2b3a24aa0717066b by marukawa
[VE] Change default CPU name to "generic"

Change default CPU name of SX-Aurora VE from "ve" to "generic" similar
to other architectures.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93836
The file was addedllvm/test/CodeGen/VE/Scalar/cpu.ll
The file was modifiedllvm/lib/Target/VE/VE.td
The file was modifiedllvm/lib/Target/VE/VESubtarget.cpp
The file was modifiedllvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
Commit 6c89f6fae4913eba07093fe7c268e828f801c78b by david.green
[AArch64] Attempt to fix Mac tests with a more specific triple. NFC
The file was modifiedllvm/test/tools/llvm-mca/AArch64/Cortex/forwarding-A57.s
Commit 975b64b29375cdfb3672fedee4216c6512672fbf by chih-ping.chen
[docs] Release notes for IsDecl in DIModule.

Please see https://reviews.llvm.org/D93462 for the actual code change.

Differential Revision: https://reviews.llvm.org/D93558
The file was modifiedllvm/docs/ReleaseNotes.rst
Commit 42652c1d6e21345173f5dd971cd453520aa5a7ef by cederman
[Sparc] Fixes for the internal assembler

* Prevent the generation of invalid shift instructions by constraining
  the immediate field. I've limited the shift field to constant values
  only, adding the `R_SPARC_5`/`R_SPARC_6` relocations is trivial if
  needed (but I can't really think of a use case for those).
* Fix the generation of PC-relative `call`
* Fix the transformation of `jmp sym` into `jmpl`
* Emit fixups for simm13 operands

I moved the choice of the correct relocation into the code emitter as I've
seen the other backends do, it can be definitely cleaner but the aim was
to reduce the scope of the patch as much as possible.

Fixes the problems raised by joerg in L254199

Reviewed By: dcederman

Differential Revision: https://reviews.llvm.org/D78193
The file was modifiedllvm/lib/Target/Sparc/SparcISelLowering.cpp
The file was modifiedllvm/lib/Target/Sparc/SparcInstr64Bit.td
The file was modifiedllvm/test/MC/Sparc/sparc-ctrl-instructions.s
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcInstPrinter.cpp
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.cpp
The file was modifiedllvm/test/MC/Sparc/sparc-asm-errors.s
The file was modifiedllvm/lib/Target/Sparc/AsmParser/SparcAsmParser.cpp
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcMCCodeEmitter.cpp
The file was modifiedllvm/lib/Target/Sparc/MCTargetDesc/SparcMCExpr.h
The file was modifiedllvm/lib/Target/Sparc/SparcAsmPrinter.cpp
The file was modifiedllvm/test/MC/Sparc/sparc-relocations.s
The file was modifiedllvm/lib/Target/Sparc/SparcInstrInfo.td
The file was modifiedllvm/lib/Target/Sparc/SparcInstrFormats.td