FailedChanges

Summary

  1. [MC][WebAssembly] Avoid recalculating indexes in -gsplit-dwarf mode (details)
  2. [AArch64] Use faddp to implement fadd reductions. (details)
  3. [AArch64][SVE] Emit DWARF location expression for SVE stack objects. (details)
Commit 30d314aae10eee1e66aff6515a764ee696a03e8d by sbc
[MC][WebAssembly] Avoid recalculating indexes in -gsplit-dwarf mode

Be consistent about asserting before setting WasmIndices.  Adding
these assertions revealed that we were duplicating a lot of work
and setting these indexed twice when running in DWO mode.

Differential Revision: https://reviews.llvm.org/D93650
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp
Commit a9f5e4375b36e5316b8d6f9731be6bfa5a70e276 by sander.desmalen
[AArch64] Use faddp to implement fadd reductions.

Custom-expand legal VECREDUCE_FADD SDNodes
to benefit from pair-wise faddp instructions.

Reviewed By: dmgreen

Differential Revision: https://reviews.llvm.org/D59259
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/include/llvm/Target/TargetSelectionDAG.td
The file was modifiedllvm/test/CodeGen/AArch64/vecreduce-fadd.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64InstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/vecreduce-fadd-legalization.ll
Commit a7e3339f3b0eb71e43d44e6f59cc8db6a7b110bf by sander.desmalen
[AArch64][SVE] Emit DWARF location expression for SVE stack objects.

Extend PEI to emit a DWARF expression for StackOffsets that have
a fixed and scalable component. This means the expression that needs
to be added is either:
  <base> + offset
or:
  <base> + offset + scalable_offset * scalereg

where for SVE, the scale reg is the Vector Granule Dwarf register, which
encodes the number of 64bit 'granules' in an SVE vector and which
the debugger can evaluate at runtime.

Reviewed By: jmorse

Differential Revision: https://reviews.llvm.org/D90020
The file was modifiedllvm/lib/CodeGen/PrologEpilogInserter.cpp
The file was modifiedllvm/lib/CodeGen/TargetRegisterInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetRegisterInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.h
The file was addedllvm/test/CodeGen/AArch64/debug-info-sve-dbg-value.mir