Commit
c5be0e0cc0e2fca19a5d130b742ae16c66f99111
by yuanke.luo[X86] Fix tile register spill issue.
The tile register spill need 2 instructions. %46:gr64_nosp = MOV64ri 64 TILESTORED %stack.2, 1, killed %46:gr64_nosp, 0, $noreg, %43:tile The first instruction load the stride to a GPR, and the second instruction store tile register to stack slot. The optimization of merge spill instruction is done after register allocation. And spill tile register need create a new virtual register to for stride, so we can't hoist tile spill instruction in postOptimization() of register allocation. We can't hoist TILESTORED alone and we can't hoist the 2 instuctions together because MOV64ri will clobber some GPR. This patch is to disble the spill merge for any spill which need 2 instructions.
Differential Revision: https://reviews.llvm.org/D93898
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 | llvm/lib/CodeGen/InlineSpiller.cpp |
 | llvm/test/CodeGen/X86/AMX/amx-spill-merge.ll |
Commit
675be651062476cd0cd4b491b35c275bb03d7b2c
by bjorn.a.petterssonRequire chained analyses in BasicAA and AAResults to be transitive
This patch fixes a bug that could result in miscompiles (at least in an OOT target). The problem could be seen by adding checks that the DominatorTree used in BasicAliasAnalysis and ValueTracking was valid (e.g. by adding DT->verify() call before every DT dereference and then running all tests in test/CodeGen).
Problem was that the LegacyPassManager calculated "last user" incorrectly for passes such as the DominatorTree when not telling the pass manager that there was a transitive dependency between the different analyses. And then it could happen that an incorrect dominator tree was used when doing alias analysis (which was a pretty serious bug as the alias analysis result could be invalid).
Fixes: https://bugs.llvm.org/show_bug.cgi?id=48709
Reviewed By: nikic
Differential Revision: https://reviews.llvm.org/D94138
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 | llvm/lib/Analysis/AliasAnalysis.cpp |
 | llvm/lib/Target/Hexagon/HexagonLoopIdiomRecognition.cpp |
 | llvm/lib/Transforms/Scalar/GVNHoist.cpp |
 | llvm/lib/Analysis/BasicAliasAnalysis.cpp |
Commit
c37f68a8885cf55e9a6603613a918c4e7474e9af
by kerry.mclaughlin[SVE][CodeGen] Fix legalisation of floating-point masked gathers
Changes in this patch: - When lowering floating-point masked gathers, cast the result of the gather back to the original type with reinterpret_cast before returning. - Added patterns for reinterpret_casts from integer to floating point, and concat_vector patterns for bfloat16. - Tests for various legalisation scenarios with floating point types.
Reviewed By: sdesmalen, david-arm
Differential Revision: https://reviews.llvm.org/D94171
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 | llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td |
 | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp |
 | llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll |
Commit
41bf338dd1e7f07c1e89f171ff6d53578f5125be
by llvm-devRevert rGd43a264a5dd3 "Revert "[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())""
This reapplies commit rG80dee7965dffdfb866afa9d74f3a4a97453708b2.
[X86][SSE] Fold unpack(hop(),hop()) -> permute(hop())
UNPCKL/UNPCKH only uses one op from each hop, so we can merge the hops and then permute the result.
REAPPLIED with a fix for unary unpacks of HOP.
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 | llvm/lib/Target/X86/X86ISelLowering.cpp |
 | llvm/test/CodeGen/X86/horizontal-shuffle-2.ll |
Commit
5963229266303d83b2e9de09bce7e063276e41d0
by llvm-dev[X86][SSE] Add missing SSE test coverage for permute(hop,hop) folds
Should help avoid bugs like reported in rG80dee7965dff
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 | llvm/test/CodeGen/X86/horizontal-shuffle-3.ll |
 | llvm/test/CodeGen/X86/horizontal-shuffle-2.ll |
Commit
b72ca799823e97b94ac0144bb87c094fb2db7324
by marukawa[VE] Support intrinsic to isnert/extract_subreg of v512i1
Support insert/extract_subreg intrinsic instructions for v512i1 registers and add regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D94298
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 | llvm/test/CodeGen/VE/VELIntrinsics/extract.ll |
 | llvm/test/CodeGen/VE/VELIntrinsics/insert.ll |
 | llvm/lib/Target/VE/VEInstrIntrinsicVL.td |
 | llvm/include/llvm/IR/IntrinsicsVE.td |
Commit
d02de13932488841eb104ad2a5665fdf7db4026b
by marukawa[VE] Support additional VMRGW and VMV intrinsic instructions
Support missing VMRGW and VMV intrinsic instructions and add regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D94300
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 | llvm/test/CodeGen/VE/VELIntrinsics/vmrg.ll |
 | llvm/lib/Target/VE/VEInstrIntrinsicVL.td |
 | llvm/test/CodeGen/VE/VELIntrinsics/vmv.ll |
Commit
c74751d4b5bd8e6753ba8dbc5baa88d7c8929c5c
by grimar[obj2yaml] - Fix the crash in getUniquedSectionName().
`getUniquedSectionName(const Elf_Shdr *Sec)` assumes that `Sec` is not `nullptr`.
I've found one place in `getUniquedSymbolName` where it is not true (because of that we crash when trying to dump unnamed null section symbols).
Patch fixes the crash and changes the signature of the `getUniquedSectionName` section to accept a reference.
Differential revision: https://reviews.llvm.org/D93754
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 | llvm/test/tools/obj2yaml/ELF/symbol.yaml |
 | llvm/tools/obj2yaml/elf2yaml.cpp |
Commit
8ea72b388734ce660f861e0dfbe53d203e94876a
by joe.ellis[clang][AArch64][SVE] Avoid going through memory for coerced VLST return values
VLST return values are coerced to VLATs in the function epilog for consistency with the VLAT ABI. Previously, this coercion was done through memory. It is preferable to use the llvm.experimental.vector.insert intrinsic to avoid going through memory here.
Reviewed By: c-rhodes
Differential Revision: https://reviews.llvm.org/D94290
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 | clang/test/CodeGen/attr-arm-sve-vector-bits-call.c |
 | clang/lib/CodeGen/CGCall.cpp |
 | clang/test/CodeGen/attr-arm-sve-vector-bits-codegen.c |
 | clang/test/CodeGen/attr-arm-sve-vector-bits-cast.c |
 | clang/test/CodeGen/aarch64-sve-acle-__ARM_FEATURE_SVE_VECTOR_OPERATORS.cpp |
Commit
a6db7cf1ce7f3523adb132819c1697a572bdcfde
by grimar[llvm-readelf/obj] - Index phdrs and relocations from 0 when reporting warnings.
As was mentioned in comments here: https://reviews.llvm.org/D92636#inline-864967
we are not consistent and sometimes index things from 0, but sometimes from 1 in warnings.
This patch fixes 2 places: messages reported for program headers and messages reported for relocations.
Differential revision: https://reviews.llvm.org/D93805
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 | llvm/tools/llvm-readobj/ELFDumper.cpp |
 | llvm/test/tools/llvm-readobj/ELF/gnu-notes.test |
 | llvm/test/tools/llvm-readobj/ELF/note-core-ntfile-bad.test |
 | llvm/test/tools/llvm-readobj/ELF/stack-sizes.test |
 | llvm/test/tools/llvm-readobj/ELF/relocation-errors.test |
 | llvm/test/tools/llvm-readobj/ELF/relocations.test |
Commit
a94497a34290bea077398c83d3031179c08ec2e7
by flo[VPlan] Move initial quote emission from ::print to ::dumpBasicBlock.
This means there will be no stray " when printing individual recipes using print()/dump() in a debugger, for example.
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 | llvm/lib/Transforms/Vectorize/VPlan.cpp |
Commit
a5b484c4d41a7452b590a2c1c98dc31f43d3dc1a
by grimar[obj2yaml][test] - Improve and fix section-group.yaml test.
It has multiple issues fixed by this patch: 1) It shouldn't test how llvm-readelf/yaml2obj works. 2) It should use "-NEXT" prefix for check lines. 3) It can use YAML macros, that allows to use a single YAML. 4) It should probably test the case when a group member is a null section.
Differential revision: https://reviews.llvm.org/D93753
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 | llvm/test/tools/obj2yaml/ELF/section-group.yaml |