SuccessChanges

Summary

  1. [ELF][NFCI] small cleanup to OutputSections.h (details)
  2. Add sample-profile-suffix-elision-policy attribute with -funique-internal-linkage-names. (details)
  3. [MIPatternMatch] Add matcher for G_PTR_ADD (details)
  4. [Sanitizer][Darwin] Fix test for macOS 11+ point releases (details)
  5. [NFC] Disallow unused prefixes under MC/AMDGPU (details)
  6. Delete unused function (was breaking the -Werror build) (details)
  7. [AMDGPU] Add _e64 suffix to VOP3 Insts (details)
  8. [libc] add isascii and toascii implementations (details)
  9. [libc][NFC] Use more specific comparison macros in LdExpTest.h. (details)
  10. [LangRef] State that a nocapture pointer cannot be returned (details)
Commit 6166b91e83716fbe930b2dc4e2a2217c52ee31a7 by llvm
[ELF][NFCI] small cleanup to OutputSections.h

OutputSections.h used to close the lld::elf namespace only to
immediately open it again. This change merges both parts into
one.

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D94538
The file was modifiedlld/ELF/OutputSections.h
Commit 175288a1afef2b6976455aab5ce51c66d28f8bca by hoy
Add sample-profile-suffix-elision-policy attribute with -funique-internal-linkage-names.

Adding sample-profile-suffix-elision-policy attribute to functions whose linkage names are uniquefied so that their unique name suffix won't be trimmed when applying AutoFDO profiles.

Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D94455
The file was modifiedllvm/lib/Transforms/Utils/UniqueInternalLinkageNames.cpp
The file was modifiedllvm/test/Transforms/UniqueInternalLinkageNames/unique-internal-linkage-names.ll
Commit ddcb0aae8b0dd87414105d264d1ee9eac9567476 by Jessica Paquette
[MIPatternMatch] Add matcher for G_PTR_ADD

Add a matcher which recognizes G_PTR_ADD and add a test.

Differential Revision: https://reviews.llvm.org/D94348
The file was modifiedllvm/unittests/CodeGen/GlobalISel/PatternMatchTest.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/MIPatternMatch.h
Commit 8f5ec4593754a58a4feb835a9d44d59c655bd0d1 by julian.lettner
[Sanitizer][Darwin] Fix test for macOS 11+ point releases

This test wrongly asserted that the minor version is always 0 when
running on macOS 11 and above.
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/sanitizer_mac_test.cpp
Commit 585612355cdf836b434a5331b1263e961135a1ab by mtrofin
[NFC] Disallow unused prefixes under MC/AMDGPU

This patches remaining tests, and patches lit.local.cfg to block future
such cases (until we flip FileCheck's flag)

Differential Revision: https://reviews.llvm.org/D94556
The file was modifiedllvm/test/MC/AMDGPU/mtbuf-gfx10.s
The file was modifiedllvm/test/MC/AMDGPU/vop_dpp.s
The file was modifiedllvm/test/MC/AMDGPU/vintrp.s
The file was modifiedllvm/test/MC/AMDGPU/vop_sdwa.s
The file was modifiedllvm/test/MC/AMDGPU/literals.s
The file was modifiedllvm/test/MC/AMDGPU/out-of-range-registers.s
The file was modifiedllvm/test/MC/AMDGPU/sopk-err.s
The file was modifiedllvm/test/MC/AMDGPU/vop_dpp_expr.s
The file was modifiedllvm/test/MC/AMDGPU/literal16.s
The file was modifiedllvm/test/MC/AMDGPU/smrd.s
The file was modifiedllvm/test/MC/AMDGPU/sop1.s
The file was modifiedllvm/test/MC/AMDGPU/sopk.s
The file was modifiedllvm/test/MC/AMDGPU/mubuf-gfx9.s
The file was modifiedllvm/test/MC/AMDGPU/sop2.s
The file was modifiedllvm/test/MC/AMDGPU/sopp-err.s
The file was modifiedllvm/test/MC/AMDGPU/isa-version-unk.s
The file was modifiedllvm/test/MC/AMDGPU/isa-version-hsa.s
The file was modifiedllvm/test/MC/AMDGPU/reg-syntax-extra.s
The file was modifiedllvm/test/MC/AMDGPU/sop1-err.s
The file was modifiedllvm/test/MC/AMDGPU/sopp.s
The file was modifiedllvm/test/MC/AMDGPU/mtbuf.s
The file was modifiedllvm/test/MC/AMDGPU/vintrp-err.s
The file was modifiedllvm/test/MC/AMDGPU/isa-version-pal.s
The file was modifiedllvm/test/MC/AMDGPU/lit.local.cfg
The file was modifiedllvm/test/MC/AMDGPU/sopc.s
The file was modifiedllvm/test/MC/AMDGPU/vop3-gfx9.s
The file was modifiedllvm/test/MC/AMDGPU/xdl-insts-err.s
The file was modifiedllvm/test/MC/AMDGPU/vop3-convert.s
The file was modifiedllvm/test/MC/AMDGPU/mubuf.s
The file was modifiedllvm/test/MC/AMDGPU/smem.s
The file was modifiedllvm/test/MC/AMDGPU/vop1.s
Commit 0d88d7d82bc44b211a8187650a06c6cd3492186a by dblaikie
Delete unused function (was breaking the -Werror build)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
Commit 314e29ed2b78c69111635ecab94541b94c9e4c67 by Joseph.Nash
[AMDGPU] Add _e64 suffix to VOP3 Insts

Previously, instructions which could be
expressed as VOP3 in addition to another
encoding had a _e64 suffix on the tablegen
record name, while those
only available as VOP3 did not. With this
patch, all VOP3s will have the _e64 suffix.
The assembly does not change, only  the mir.

Reviewed By: foad

Differential Revision: https://reviews.llvm.org/D94341

Change-Id: Ia8ec8890d47f8f94bbbdac43745b4e9dd2b03423
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-handleMoveUp-subreg-def-across-subreg-def.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fshr.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subranges-another-prune-error.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-xor3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm-gfx10.mir
The file was modifiedllvm/unittests/MI/LiveIntervalTest.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoalesce-dbg.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-build-spill.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-add3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-assert-onlydbg-value-empty-region.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-vgpr-copy.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP2Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr-gfx10.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-or3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subregjoin-fullcopy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fold-immediate-output-mods.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.fma.legacy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/rename-independent-subregs.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/stale-livevar-in-twoaddr-pass.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-bswap.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-subranges-another-copymi-not-live.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/merge-load-store-vreg.mir
The file was modifiedllvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/schedule-barrier.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-smed3.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/smem-no-clause-coalesced.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/power-sched-no-instr-sunit.mir
The file was modifiedllvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/fold_16bit_imm.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shuffle-vector.v2s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/coalescer-with-subregs-bad-identical.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fcanonicalize.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-umed3.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/promote-constOffset-to-imm.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/pei-build-spill-partial-agpr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/vcmpx-permlane-hazard.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmed3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext-inreg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-smulh.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-sext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr-partially-undef.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-umulh.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/clamp-omod-special-case.mir
The file was modifiedllvm/lib/Target/AMDGPU/SISchedule.td
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-prefer-non-mfma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/v_swap_b32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-mul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/memory-legalizer-atomic-insert-end.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-scalar-ops.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fma.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/hazard-pass-ordering.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/twoaddr-mad.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.load.ll
The file was modifiedllvm/lib/Target/AMDGPU/VOP3PInstructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/shrink-vop3-carry-out.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.s16.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fract.f64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/inserted-wait-states.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sched-crash-dbg-value.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/s_add_co_pseudo_lowering.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmaxnum-ieee.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-lshr.mir
The file was modifiedllvm/lib/Target/AMDGPU/VOP3Instructions.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmad.s32.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-peephole-instr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/fdiv-nofpexcept.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/regbank-reassign.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-zext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fmad.ftz.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/accvgpr-copy.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoalescing-remove-partial-redundancy-assert.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/mai-hazards.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/subreg-split-live-in-error.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/regcoal-subrange-join-seg.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/sdwa-preserve.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/couldnt-join-subrange-3.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.s64.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-pattern-and-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/debug-value-scheduler-crash.mir
Commit 04edcc02638bc70772baa50a74e582bb8e029872 by michaelrj
[libc] add isascii and toascii implementations

adding both at once since these are trivial functions.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D94558
The file was modifiedlibc/spec/gnu_ext.td
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
The file was modifiedlibc/test/src/ctype/CMakeLists.txt
The file was addedlibc/test/src/ctype/isascii_test.cpp
The file was addedlibc/src/ctype/isascii.h
The file was addedlibc/src/ctype/isascii.cpp
The file was addedlibc/test/src/ctype/toascii_test.cpp
The file was modifiedlibc/spec/posix.td
The file was addedlibc/src/ctype/toascii.cpp
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was addedlibc/src/ctype/toascii.h
The file was modifiedlibc/src/ctype/CMakeLists.txt
Commit 0c8466c0015eb8e4061b177e125e588b2138cc8a by sivachandra
[libc][NFC] Use more specific comparison macros in LdExpTest.h.
The file was modifiedlibc/test/src/math/LdExpTest.h
Commit 76643c48cdddfa220680f1ab4a83829bd83faa7a by aqjune
[LangRef] State that a nocapture pointer cannot be returned

This is a small patch stating that a nocapture pointer cannot be returned.

Discussed in D93189.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D94386
The file was modifiedllvm/docs/LangRef.rst