SuccessChanges

Summary

  1. [lldb][docs] Expand CSS fix for LLDB doc tables (details)
  2. [GlobalISel] Add missing operand update when copy is required (details)
  3. [AMDGPU][MC] Add tfe disassembler support MIMG opcodes (details)
  4. [clang][cli] Port more options to new parsing system (details)
Commit b3c260d8fa07ed1202afdda9ca4c437a2a847080 by Raphael Isemann
[lldb][docs] Expand CSS fix for LLDB doc tables

Apparently the sphinx version on the server doesn't place <p> tags in the
table cells, so the previous fix from commit 7fce3b240b6b313b1becf19ddf3f2a90
didn't fix the bug for that sphinx version. Just expand the CSS workaround
to all <td> tags.
The file was modifiedlldb/docs/_static/lldb.css
Commit 2aeaaf841b58b2a6721f9271ae897e392fd0b357 by mikael.holmen
[GlobalISel] Add missing operand update when copy is required

When constraining an operand register using constrainOperandRegClass(),
the function may emit a COPY in case the provided register class does
not match the current operand register class. However, the operand
itself is not updated to make use of the COPY, thereby resulting in
incorrect code. This patch fixes that bug by updating the machine
operand accordingly.

Reviewed By: dsanders

Differential Revision: https://reviews.llvm.org/D91244
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64CallLowering.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/InstructionSelector.cpp
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/Utils.h
Commit 4ab704d62820396af5bd4a4322a5cbc2700a7ec3 by petar.avramovic
[AMDGPU][MC] Add tfe disassembler support MIMG opcodes

With tfe on there can be a vgpr write to vdata+1.
Add tablegen support for 5 register vdata store.
This is required for 4 register vdata store with tfe.

Differential Revision: https://reviews.llvm.org/D94960
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/MIMGInstructions.td
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/mimg_vi.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx10_mimg.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx8_dasm_all.txt
The file was modifiedllvm/test/MC/Disassembler/AMDGPU/gfx9_dasm_all.txt
Commit e20d46628a31a984074f2e1029e67734d5c2ab0d by jan_svoboda
[clang][cli] Port more options to new parsing system

This patch adds marshalling information to more options.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D94957
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp