FailedChanges

Summary

  1. [TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true (details)
Commit 8e8a75ad50828b5093d6ba7aae0eba6dc290c90a by maskray
[TargetRegisterInfo] Default trackLivenessAfterRegAlloc() to true
Except AMDGPU/R600RegisterInfo (a bunch of MIR tests seem to have
problems), every target overrides it with true. PostMachineScheduler
requires livein information. Not providing it can cause assertion
failures in ScheduleDAGInstrs::addSchedBarrierDeps().
The file was modifiedllvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsRegisterInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMBaseRegisterInfo.h
The file was modifiedllvm/lib/Target/XCore/XCoreRegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.h
The file was modifiedllvm/lib/Target/SystemZ/SystemZRegisterInfo.h
The file was modifiedllvm/lib/Target/XCore/XCoreRegisterInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetRegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/R600RegisterInfo.h
The file was modifiedllvm/lib/Target/Lanai/LanaiRegisterInfo.h
The file was modifiedllvm/lib/Target/AArch64/AArch64FalkorHWPFFix.cpp
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.cpp
The file was modifiedllvm/lib/Target/X86/X86RegisterInfo.h
The file was modifiedllvm/lib/Target/Lanai/LanaiRegisterInfo.cpp
The file was modifiedllvm/lib/Target/Mips/MipsRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AVR/AVRRegisterInfo.h
The file was modifiedllvm/lib/Target/ARC/ARCRegisterInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.h
The file was modifiedllvm/lib/Target/RISCV/RISCVRegisterInfo.h
The file was modifiedllvm/lib/Target/Hexagon/HexagonRegisterInfo.h
The file was modifiedllvm/lib/Target/ARC/ARCRegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp