Started 1 mo 0 days ago
Took 2 hr 25 min

Success Build #24591 (Oct 26, 2020 3:52:04 AM)

  1. [ARM][SchedModels] Convert IsLdstsoMinusRegPred to MCSchedPredicate (details)
  2. [ARM][SchedModels] Get rid of IsLdrAm2ScaledPred (details)
  3. [VE] Support atomic load (details)
  4. [PowerPC] Add test case for pr47830. NFC. (details)
  5. [ARM][SchedModels] Rename and generalize predicate. NFC (details)
  6. [AMDGPU] Emit new pal metadata by default (details)
  7. [AsmPrinter] Add per BB instruction mix remark. (details)
  8. [VE] Add integer arithmetic vector instructions (details)
  9. [VE] Add vector comparison and min/max (details)
  10. [Annotation] Allows annotation to carry some additional constant arguments. (details)
  11. [flang] Tighten rules to resolve procedure as intrinsic procedure (details)
  12. Try to fix buildbots after d3205bbca3e0002d76282878986993e7e7994779 (details)

Started by timer (12 times)

This run spent:

  • 1 hr 57 min waiting;
  • 2 hr 25 min build duration;
  • 4 hr 22 min total from scheduled to completion.
Revision: e8ba87e92b857c14b7eb5466c4266a9e09a1f5fb
  • refs/remotes/origin/master
Revision: 4afa077899b1e3def4cff475deae73681db04e21
  • refs/remotes/origin/master
Revision: e8ba87e92b857c14b7eb5466c4266a9e09a1f5fb
  • refs/remotes/origin/master
Test Result (no failures)