Commit
d1beb95d1241ec50bdf19db351d273374a146a4a
by Stanislav.Mekhanoshin[AMDGPU] gfx1032 target
Differential Revision: https://reviews.llvm.org/D89487
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 | clang/test/Driver/amdgpu-mcpu.cl |
 | llvm/test/MC/AMDGPU/gfx1030_new.s |
 | llvm/test/CodeGen/AMDGPU/hsa-note-no-func.ll |
 | clang/test/Driver/amdgpu-macros.cl |
 | llvm/test/CodeGen/AMDGPU/elf-header-flags-mach.ll |
 | llvm/include/llvm/Support/TargetParser.h |
 | llvm/test/MC/AMDGPU/gfx1030_err.s |
 | clang/include/clang/Basic/Cuda.h |
 | clang/lib/Basic/Targets/AMDGPU.cpp |
 | clang/test/CodeGenOpenCL/amdgpu-features.cl |
 | llvm/include/llvm/BinaryFormat/ELF.h |
 | llvm/test/MC/Disassembler/AMDGPU/gfx1030_dasm_new.txt |
 | llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUTargetStreamer.cpp |
 | llvm/tools/llvm-readobj/ELFDumper.cpp |
 | clang/lib/Basic/Targets/NVPTX.cpp |
 | llvm/lib/Target/AMDGPU/GCNProcessors.td |
 | llvm/docs/AMDGPUUsage.rst |
 | llvm/lib/ObjectYAML/ELFYAML.cpp |
 | llvm/lib/Support/TargetParser.cpp |
 | clang/lib/CodeGen/CGOpenMPRuntimeGPU.cpp |
Commit
2f63e57fa59e7fbfe5999ec1e6e60fa7a2ba70bb
by eugenis[MTE] Pin the tagged base pointer to one of the stack slots.
Summary: Pin the tagged base pointer to one of the stack slots, and (if necessary) rewrite tag offsets so that an object that occupies that slot has both address and tag offsets of 0. This allows ADDG instructions for that object to be eliminated and their uses replaced with the tagged base pointer itself.
This optimization must be done in machine instructions and not in the IR instrumentation pass, because referring to a stack slot through an IRG pointer would confuse the stack coloring pass.
The optimization makes a (pretty naive) attempt to find the slot that would benefit the most by counting the uses of stack slots in the function.
Reviewers: ostannard, pcc
Subscribers: merge_guards_bot, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72365
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 | llvm/lib/Target/AArch64/AArch64MachineFunctionInfo.h |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
 | llvm/include/llvm/IR/IntrinsicsAArch64.td |
 | llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp |
 | llvm/test/CodeGen/AArch64/irg_sp_tagp.ll |
Commit
2e794a46b58c5878c5ab71c8517c5417f791860e
by eugenis[AArch64] Stack frame reordering.
Implement stack frame reordering in the AArch64 backend.
Unlike the X86 implementation, AArch64 does not seem to benefit from "access density" based frame reordering, mainly because it has a much smaller variety of addressing modes, and the fact that all instructions are 4 bytes so each frame object is either in range of an instruction (and then the access is "free") or not (and that has a code size cost of 4 bytes).
This change improves Memory Tagging codegen by * Placing an object that has been chosen as the base tagged pointer of the function at SP + 0. This saves one instruction to setup the pointer (IRG does not have an offset immediate), and more because that object can now be referenced without materializing its tagged address in a scratch register. * Placing objects that go out of scope simultaneously together. This exposes opportunities for instruction merging in tryMergeAdjacentSTG.
Differential Revision: https://reviews.llvm.org/D72366
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 | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp |
 | llvm/test/CodeGen/AArch64/settag-merge.ll |
 | llvm/test/CodeGen/AArch64/settag-merge-order.ll |
 | llvm/lib/Target/AArch64/AArch64FrameLowering.h |
Commit
6601dfb0b8c78cdd5de0e50fb3549f9b8f947eb3
by thakis[gn bulid] Remove phantom WebAssembly tablegen() calls
Apparenlty I added these in https://reviews.llvm.org/rL350628 but I'm not sure why. They never existed in the CMake build, and now they're causing trouble.
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 | llvm/utils/gn/secondary/llvm/lib/Target/WebAssembly/BUILD.gn |
Commit
b3d2df42f7ac60ff7645cf944a93f0fde144a195
by lebedev.ri[NFC][SCEV] Autogenerate check lines in tests being affected by upcoming patch
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 | llvm/test/Analysis/ScalarEvolution/scalable-vector.ll |
 | llvm/test/Analysis/ScalarEvolution/no-wrap-add-exprs.ll |
 | llvm/test/Analysis/ScalarEvolution/max-backedge-taken-count-guard-info.ll |
 | llvm/test/Analysis/ScalarEvolution/load.ll |
Commit
dfdfcdc8d3c99cfe9fdef7c604ecc3b165e79572
by lebedev.ri[NFC][LSR] Autogenerate check lines in tests being affected by upcoming patch
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 | llvm/test/Transforms/LoopStrengthReduce/2011-10-03-CritEdgeMerge.ll |
 | llvm/test/Transforms/LoopStrengthReduce/post-inc-icmpzero.ll |
Commit
2008dacf6ed3fbb862769c6936fd615c4ae05434
by lebedev.ri[NFC][IndVars] Autogenerate check lines in tests being affected by upcoming patch
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 | llvm/test/Transforms/IndVarSimplify/2011-11-01-lftrptr.ll |
 | llvm/test/Transforms/IndVarSimplify/widen-i32-i8ptr.ll |
Commit
42ed3881200801651a2af47505dc7c59c0a5c959
by Alexander Timofeev[AMDGPU] SILowerControlFlow::removeMBBifRedundant should not try to change MBB layout if it can fallthrough
removeMBBifRedundant normally tries to keep predecessors fallthrough when removing redundant MBB. It has to change MBBs layout to keep the new successor to immediately follow the predecessor of removed MBB. It only may be allowed in case the new successor itself has no successors to which it fall through.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D89397
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 | llvm/test/CodeGen/AMDGPU/collapse-endcf.mir |
 | llvm/lib/Target/AMDGPU/SILowerControlFlow.cpp |
Commit
f6bf2823c44eb81be6c74d909c17d77e811b3bbc
by michaelrj[libc] Use entrypoints.txt as the single source of list of functions for a platform.
The function listings in api.td are removed. The same lists are now deduced using the information in entrypoints.txt.
Reviewed By: sivachandra
Differential Revision: https://reviews.llvm.org/D89267
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 | libc/config/linux/api.td |
 | libc/utils/HdrGen/PublicAPICommand.cpp |
 | libc/utils/HdrGen/PublicAPICommand.h |
 | libc/utils/HdrGen/Generator.cpp |
 | libc/cmake/modules/LLVMLibCHeaderRules.cmake |
 | libc/CMakeLists.txt |
 | libc/utils/HdrGen/Generator.h |
 | libc/utils/HdrGen/Main.cpp |
Commit
68f116aa23434b577743307c487b2edf037fca4c
by richardPR47864: Fix assertion in pointer-to-member emission if there are multiple declarations of the same base class.
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 | clang/include/clang/AST/RecordLayout.h |
 | clang/test/CodeGenCXX/pointers-to-data-members.cpp |
Commit
65cb4fdd69f43b6c39a8e4ca27b509284b11d807
by yitzhakm[libTooling] Change `after` range-selector to operate only on source ranges
Currently, `after` fails when applied to locations in macro arguments. This change projects the subrange into a file source range and then applies `after`.
Differential Revision: https://reviews.llvm.org/D89468
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 | clang/unittests/Tooling/RangeSelectorTest.cpp |
 | clang/lib/Tooling/Transformer/RangeSelector.cpp |
Commit
89c0124273339076b25bf860f6c2ee765ab96db3
by flo[LoopVersion] Unify SCEVChecks and alias check handling (NFC).
This is an initial cleanup of the way LoopVersioning interacts with LAA.
Currently LoopVersioning has 2 ways of initializing things:
1. Passing LAI and passing UseLAIChecks = true 2. Passing UseLAIChecks = false, followed by calling setSCEVChecks and setAliasChecks.
Both ways of initializing lead to the same result and the duplication seems more complicated than necessary.
This patch removes the UseLAIChecks flag from the constructor and the setSCEVChecks & setAliasChecks helpers and move initialization exclusively to the constructor.
This simplifies things, by providing a single way to initialize LoopVersioning and reducing duplication.
Reviewed By: Meinersbur, lebedev.ri
Differential Revision: https://reviews.llvm.org/D84406
|
 | llvm/lib/Transforms/Scalar/LoopLoadElimination.cpp |
 | llvm/include/llvm/Transforms/Utils/LoopVersioning.h |
 | llvm/lib/Transforms/Scalar/LoopVersioningLICM.cpp |
 | llvm/lib/Transforms/Scalar/LoopDistribute.cpp |
 | llvm/lib/Transforms/Utils/LoopVersioning.cpp |
 | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp |
Commit
122d92dfc31f27263f281244756f576147cec1f6
by vtjnashfix symbol printing on windows
Similar to MCSymbol::print in 3d6c8ebb584375d01b1acead4c2056b3f0c501fc (llvm-svn: 81682, PR4966), these symbols may need to be quoted to be handled by the linker correctly.
Reviewed By: compnerd
Differential Revision: https://reviews.llvm.org/D87099
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 | llvm/lib/IR/Mangler.cpp |
 | llvm/test/CodeGen/X86/dllexport.ll |
Commit
1992e30c2d751f6f1f6ad5190f84e37dece04f7f
by tlively[WebAssembly] Prototype i8x16.popcnt
As proposed at https://github.com/WebAssembly/simd/pull/379. Use a target builtin and intrinsic rather than normal codegen patterns to make the instruction opt-in until it is merged to the proposal and stabilized in engines.
Differential Revision: https://reviews.llvm.org/D89446
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 | clang/lib/CodeGen/CGBuiltin.cpp |
 | clang/include/clang/Basic/BuiltinsWebAssembly.def |
 | llvm/include/llvm/IR/IntrinsicsWebAssembly.td |
 | clang/test/CodeGen/builtins-wasm.c |
 | llvm/test/MC/WebAssembly/simd-encodings.s |
 | llvm/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td |
 | llvm/test/CodeGen/WebAssembly/simd-intrinsics.ll |
Commit
79829a47040512fe54001db839ac59146ca55aec
by leonardchanRevert "[clang] Add -fc++-abi= flag for specifying which C++ ABI to use"
This reverts commits 683b308c07bf827255fe1403056413f790e03729 and 8487bfd4e9ae186f9f588ef989d27a96cc2438c9.
We will go for a more restricted approach that does not give freedom to everyone to change ABIs on whichever platform.
See the discussion on https://reviews.llvm.org/D85802.
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 | clang/lib/Frontend/CompilerInvocation.cpp |
 | clang/include/clang/Basic/TargetCXXABI.h |
 | clang/lib/AST/ASTContext.cpp |
 | clang/include/clang/Basic/TargetCXXABI.def |
 | clang/lib/CodeGen/CodeGenModule.cpp |
 | clang/test/Frontend/invalid-cxx-abi.cpp |
 | clang/include/clang/Basic/DiagnosticDriverKinds.td |
 | clang/include/clang/Basic/LangOptions.h |
 | clang/include/clang/Driver/Options.td |
 | clang/lib/CodeGen/ItaniumCXXABI.cpp |
 | clang/include/clang/AST/ASTContext.h |
 | clang/lib/Driver/ToolChains/Clang.cpp |
Commit
e384e94fbe7c1d5c89fcdde33ffda04e9802c2ce
by Yaxun.LiuRevert "[HIP] Change default --gpu-max-threads-per-block value to 1024"
This reverts commit 187658b8a6112446d9e7797d495bc7542ac83905 due to AMDGPU backend issues.
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 | clang/test/CodeGenCUDA/kernel-amdgcn.cu |
 | clang/include/clang/Basic/LangOptions.def |
 | clang/lib/CodeGen/TargetInfo.cpp |
 | clang/test/CodeGenCUDA/amdgpu-kernel-attrs.cu |
Commit
410e5b17cf11691de7775315dbf9d5e94f5c4808
by marukawa[VE] Support fabs/fcos/fsin/fsqrt math functions
VE doesn't have instruction for fabs/fcos/fsin/fsqrt, so expand them. Add regression tests also. Update fcopysign regression test, also.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89457
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 | llvm/test/CodeGen/VE/fsqrt.ll |
 | llvm/test/CodeGen/VE/fcos.ll |
 | llvm/test/CodeGen/VE/fcopysign.ll |
 | llvm/lib/Target/VE/VEISelLowering.cpp |
 | llvm/test/CodeGen/VE/fsin.ll |
 | llvm/test/CodeGen/VE/fp_copysign.ll |
 | llvm/test/CodeGen/VE/fabs.ll |
Commit
a91dd3d37d3f10831e544c5a797b3837b7e5744a
by marukawa[VE] Add VGT/VSC/PFCHV instructions
Add VGT/VSC/PFCHV vector instructions and regression tests.
Reviewed By: simoll
Differential Revision: https://reviews.llvm.org/D89471
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 | llvm/lib/Target/VE/VEInstrVec.td |
 | llvm/test/MC/VE/PFCHV.s |
 | llvm/test/MC/VE/VSC.s |
 | llvm/test/MC/VE/VGT.s |
Commit
6754caa9bf21a759c4080a797f23e2b7a77a71e1
by jinghamAdd an SB API to get the SBTarget from an SBBreakpoint
Differential Revision: https://reviews.llvm.org/D89358
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 | lldb/source/API/SBBreakpoint.cpp |
 | lldb/test/API/python_api/breakpoint/TestBreakpointAPI.py |
 | lldb/bindings/interface/SBBreakpoint.i |
 | lldb/include/lldb/API/SBBreakpoint.h |