SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [LSR] Canonicalize a formula before insert it into the list (details)
  2. [clang] Remove a stray semicolon, fixing pedantic GCC warnings. NFC. (details)
  3. [PowerPC] Add parentheses to silence gcc warning (details)
  4. [AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long (details)
  5. [PowerPC] Fix getMemOperandWithOffsetWidth (details)
  6. [Test] More tests where IndVars fails to eliminate a range check (details)
  7. [flang] Convert release notes to markdown (details)
  8. [obj2yaml] Stop parsing the debug_str section when it encounters a string without the null terminator. (details)
  9. [mlir][Vector] Make VectorToSCF deterministic (details)
  10. getClangStripDependencyFileAdjuster(): Do not remove -M args when using MSVC cl driver (details)
  11. Provide anchor for compiler extensions (details)
  12. [mlir] Conv ops vectorization pass (details)
  13. [mlir][VectorOps] Redo the scalar loop emission in VectoToSCF to pad instead of clipping (details)
  14. Revert "[PowerPC] Implement instruction clustering for stores" (details)
  15. [ARM][LowOverheadLoops] Remove modifications to the correct element (details)
  16. [mlir] Fix of broken build on windows caused by using uint (details)
  17. [SyntaxTree] Ignore implicit non-leaf `CXXConstructExpr` (details)
  18. [SyntaxTree] Ignore implicit leaf `CXXConstructExpr` (details)
  19. [SyntaxTree] Ignore implicit `CXXFunctionalCastExpr` wrapping constructor (details)
  20. [SyntaxTree] Fix crash on functions with default arguments. (details)
  21. [mlir][VectorOps] Clean up outdated comments. NFCI. (details)
  22. [OpenMP] Fix typo in CodeGenFunction::EmitOMPWorksharingLoop (PR46412) (details)
  23. [mlir] remove BufferAssignmentPlacer from BufferAssignmentOpConversionPattern (details)
  24. [DWARFYAML] Make the debug_ranges section optional. (details)
  25. X86DomainReassignment.cpp - improve auto const/pointer/reference qualifiers. NFCI. (details)
  26. X86CallLowering.cpp - improve auto const/pointer/reference qualifiers. NFCI. (details)
  27. [Codegen][X86] Begin moving X86 specific codegen tests into X86 subfolder. (details)
  28. [mlir][VectorOps] (details)
  29. [mlir] Fix bug in copy removal (details)
  30. [CMake] Remove dead FindPythonInterp code (details)
  31. [analyzer] [NFC] Introduce refactoring of PthreadLockChecker (details)
  32. [InstCombine] add bitwise logic fold tests for D86395; NFC (details)
  33. Add a new altera check for structure packing and alignment. (details)
  34. [clang] Limit the maximum level of fold-expr expansion. (details)
  35. [mlir][VectorOps] Fix more GCC5 weirdness (details)
  36. [NFC][ARM] Precommit test (details)
  37. [DSE,MemorySSA] Increase walker limit a bit. (details)
  38. [gn build] (manually) port 156b127945a8 (details)
  39. StructPackAlignCheck: Fix a -Winconsistent-missing-override warning (details)
  40. Revert 3e782bf809 "[Sema][MSVC] warn at dynamic_cast when /GR- is given" (details)
  41. [clang-tidy] Fix dynamic build failures after 156b127945a8c923d141e608b7380427da024376 (details)
  42. [DAGTypeLegalizer] Handle ZERO_EXTEND of promoted type in WidenVecRes_Convert. (details)
  43. [libc++] Make sure we always print all available features (details)
  44. [libc++] Allow overriding the cached value of LIBCXX_TEST_CONFIG (details)
  45. [clang-format] Handle shifts within conditions (details)
  46. [AMDGPU] Support disassembly for AMDGPU kernel descriptors (details)
  47. [clang-tidy] Fix linking for FrontendOpenMP (details)
  48. Add an option for unrolling loops up to a factor. (details)
  49. LiveRegUnits.h - reduce MachineRegisterInfo.h include. NFC. (details)
  50. [WebAssembly] Fix fixEndsAtEndOfFunction for try-catch (details)
  51. GlobalISel: Combine `op undef, x` to 0 (details)
  52. [ARM] Follow AACPS standard for volatile bit-fields access width (details)
  53. [GVN] Add testcase that uses masked loads and stores, NFC (details)
  54. Add more explicit error message when creating a type or attribute for an unregistered dialect (NFC) (details)
  55. [sanitizers] Remove unneeded MaybeCall*DefaultOptions() and nullptr checks (details)
  56. RISCVMatInt.h - remove unnecessary includes. NFCI. (details)
  57. CFGUpdate.h - remove unused APInt include. NFCI. (details)
  58. Revert "[ARM] Follow AACPS standard for volatile bit-fields access width" (details)
  59. Add detailed reference for the SearchableTables backend. (details)
  60. [X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend. (details)
Commit 78071fb52456f5da9d044588e58a946c0ad96830 by weiwei64
[LSR] Canonicalize a formula before insert it into the list

In GenerateConstantOffsetsImpl, we may generate non canonical Formula
if BaseRegs of that Formula is updated and includes a recurrent expr reg
related with current loop while its ScaledReg is not.

Patched by: mdchen
Reviewed By: qcolombet

Differential Revision: https://reviews.llvm.org/D86939
The file was addedllvm/test/Transforms/LoopStrengthReduce/AArch64/pr47329.ll
The file was modifiedllvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
Commit 28b9ace85f6871cdb48f1483314d8342e099b136 by martin
[clang] Remove a stray semicolon, fixing pedantic GCC warnings. NFC.
The file was modifiedclang/include/clang/AST/IgnoreExpr.h
Commit ea795304ec073a63c3c5b4fd0c5579e667201dad by mikael.holmen
[PowerPC] Add parentheses to silence gcc warning

Without gcc 7.4 warns with

../lib/Target/PowerPC/PPCInstrInfo.cpp:2284:25: warning: suggest parentheses around '&&' within '||' [-Wparentheses]
          BaseOp1.isFI() &&
          ~~~~~~~~~~~~~~~^~
              "Only base registers and frame indices are supported.");
              ~
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Commit 8ee1419ab688ee2da2ac2cb0cf19db03f4c4742e by simon.wallis2
[AARCH64][RegisterCoalescer] clang miscompiles zero-extension to long long

Implement AArch64 variant of shouldCoalesce() to detect a known failing case
and prevent the coalescing of a 32-bit copy into a 64-bit sign-extending load.

Do not coalesce in the following case:
COPY where source is bottom 32 bits of a 64-register,
and destination is a 32-bit subregister of a 64-bit register,
ie it causes the rest of the register to be implicitly set to zero.

A mir test has been added.

In the test case, the 32-bit copy implements a 32 to 64 bit zero extension
and relies on the upper 32 bits being zeroed.

Coalescing to the result of the 64-bit load meant overwriting
the upper 32 bits incorrectly when the loaded byte was negative.

Reviewed By: john.brawn

Differential Revision: https://reviews.llvm.org/D85956
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64RegisterInfo.h
The file was addedllvm/test/CodeGen/AArch64/zext-reg-coalesce.mir
Commit bb39eb9e7f42ba8d1f86f961d7f887f9d626b733 by qiucofan
[PowerPC] Fix getMemOperandWithOffsetWidth

Commit 3c0b3250 introduced memory cluster under pwr10 target, but a
check for operands was unexpectedly removed. This adds it back to avoid
regression.
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
Commit 046f2402025c2ac93c1efc02acd60c5222e052f7 by mkazantsev
[Test] More tests where IndVars fails to eliminate a range check
The file was modifiedllvm/test/Transforms/IndVarSimplify/monotonic_checks.ll
Commit 69230e75f120141979248becac30ceaca4ab2e87 by richard.barton
[flang] Convert release notes to markdown

Switch ReleaseNotes from .rst to .md to match the other docs.

At the same time, fix the version number for master.
The file was addedflang/docs/ReleaseNotes.md
The file was removedflang/docs/ReleaseNotes.rst
Commit 3cda69872362526b1672ae23de4ac968b7564c2b by Xing
[obj2yaml] Stop parsing the debug_str section when it encounters a string without the null terminator.

When obj2yaml encounters a string without the null terminator, it should
stop parsing the debug_str section. This patch addresses comments in
[D86867](https://reviews.llvm.org/D86867#inline-803291).

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D87261
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
The file was modifiedllvm/tools/obj2yaml/macho2yaml.cpp
The file was modifiedllvm/tools/obj2yaml/obj2yaml.h
The file was modifiedllvm/test/tools/obj2yaml/ELF/DWARF/debug-str.yaml
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_str.yaml
Commit 9be6178449555576645ac922e342936319445cac by ntv
[mlir][Vector] Make VectorToSCF deterministic

Differential Revision: https://reviews.llvm.org/D87273
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was modifiedmlir/test/Conversion/VectorToSCF/vector-to-loops.mlir
Commit 2168dbf4cc766dfb552076d9b1e84b00122b7993 by hans
getClangStripDependencyFileAdjuster(): Do not remove -M args when using MSVC cl driver

MSVC's cl.exe has a few command line arguments which start with -M such
as "-MD", "-MDd", "-MT", "-MTd", "-MP".
These arguments are not dependency file generation related, and these
arguments were being removed by getClangStripDependencyFileAdjuster()
which was wrong.

Differential revision: https://reviews.llvm.org/D86999
The file was modifiedclang/lib/Tooling/ArgumentsAdjusters.cpp
The file was modifiedclang/unittests/Tooling/ToolingTest.cpp
Commit 38778e1087b2825e91b07ce4570c70815b49dcdc by sguelton
Provide anchor for compiler extensions

This patch is cherry-picked from 04b0a4e22e3b4549f9d241f8a9f37eebecb62a31, and
amended to prevent an undefined reference to `llvm::EnableABIBreakingChecks'
The file was modifiedllvm/lib/Extensions/Extensions.cpp
The file was modifiedllvm/lib/Extensions/LLVMBuild.txt
Commit 67b37f571cc27d5684125f694d719b114ad72a18 by limo
[mlir] Conv ops vectorization pass

In this commit a new way of convolution ops lowering is introduced.
The conv op vectorization pass lowers linalg convolution ops
into vector contractions. This lowering is possible when conv op
is first tiled by 1 along specific dimensions which transforms
it into dot product between input and kernel subview memory buffers.
This pass converts such conv op into vector contraction and does
all necessary vector transfers that make it work.

Differential Revision: https://reviews.llvm.org/D86619
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp
The file was addedmlir/test/Conversion/LinalgToVector/linalg-to-vector.mlir
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
The file was addedmlir/test/lib/Transforms/TestConvVectorization.cpp
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt
Commit 239eff502bca64f544f311e7d7a65fdec01cb9c4 by benny.kra
[mlir][VectorOps] Redo the scalar loop emission in VectoToSCF to pad instead of clipping

This replaces the select chain for edge-padding with an scf.if that
performs the memory operation when the index is in bounds and uses the
pad value when it's not. For transfer_write the same mechanism is used,
skipping the store when the index is out of bounds.

The integration test has a bunch of cases of how I believe this should
work.

Differential Revision: https://reviews.llvm.org/D87241
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was modifiedmlir/test/Conversion/VectorToSCF/vector-to-loops.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/integration_test/Dialect/Vector/CPU/test-transfer-to-loops.mlir
Commit 8d9c13f37d2081c11186718ae8b5aef8b507d152 by qiucofan
Revert "[PowerPC] Implement instruction clustering for stores"

This reverts commit 3c0b3250230b3847a2a47dfeacfdb794c2285f02, (along
with ea795304 and bb39eb9e) since it breaks test with UB sanitizer.
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was removedllvm/test/CodeGen/PowerPC/fusion-load-store.ll
Commit 7aabb6ad7764366fd3150d18b16da9aef35e6492 by samuel.tebbs
[ARM][LowOverheadLoops] Remove modifications to the correct element
count register

After my patch at D86087, code that now uses the mov operand rather than
the vctp operand will no longer remove modifications to the vctp operand
as they should. This patch fixes that by explicitly removing
modifications to the vctp operand rather than the register used as the
element count.
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-after-dlstp.mir
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/mov-operand.ll
Commit 83d82d1fb1cfac06257ebbd7c063a3d2d1af20fb by limo
[mlir] Fix of broken build on windows caused by using uint
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp
Commit 2325d6b42f096bf93d2ab0bed7096759e5c96ce8 by ecaldas
[SyntaxTree] Ignore implicit non-leaf `CXXConstructExpr`

Differential Revision: https://reviews.llvm.org/D86699
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
Commit 46f4439dc9bf9b8cfee0001b6752c3d074c83b00 by ecaldas
[SyntaxTree] Ignore implicit leaf `CXXConstructExpr`

Differential Revision: https://reviews.llvm.org/D86700
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 134455a07c1f1de4cff62a6afb4ccd98b98343ec by ecaldas
[SyntaxTree] Ignore implicit `CXXFunctionalCastExpr` wrapping constructor

Differential Revision: https://reviews.llvm.org/D87229
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit f5087d5c7248104b6580c7b079ed5f227332c2ef by ecaldas
[SyntaxTree] Fix crash on functions with default arguments.

* Do not visit `CXXDefaultArgExpr`
* To build `CallArguments` nodes, just go through non-default arguments

Differential Revision: https://reviews.llvm.org/D87249
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 307dc7b236924b5eeb5bf46b725a67dcb41bcd89 by benny.kra
[mlir][VectorOps] Clean up outdated comments. NFCI.

While there
- De-templatify code that can use function_ref
- Make BoundCaptures usable when they're const
- Address post-submit review comment (static function into global namespace)
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
The file was modifiedmlir/include/mlir/Dialect/StandardOps/EDSC/Builders.h
Commit 58970eb7d1ddd067e98f49fdcfb04373086245bc by llvm-dev
[OpenMP] Fix typo in CodeGenFunction::EmitOMPWorksharingLoop (PR46412)

Fixes issue noticed by static analysis where we have a copy+paste typo, testing ScheduleKind.M1 twice instead of ScheduleKind.M2.

Differential Revision: https://reviews.llvm.org/D87250
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp
Commit 847299d3f00507f172097bad9dde61dfad0d355b by ehsan.nadjaran_toosi
[mlir] remove BufferAssignmentPlacer from BufferAssignmentOpConversionPattern

BufferPlacement has been removed, as allocations are no longer placed during the conversion.

Differential Revision: https://reviews.llvm.org/D87079
The file was modifiedmlir/test/lib/Transforms/TestBufferPlacement.cpp
The file was modifiedmlir/lib/Transforms/BufferPlacement.cpp
The file was modifiedmlir/include/mlir/Transforms/BufferPlacement.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/TensorsToBuffers.cpp
Commit 25c3fa3f13336b2da7c63162b0d9da164a0a96a1 by Xing
[DWARFYAML] Make the debug_ranges section optional.

This patch makes the debug_ranges section optional. When we specify an
empty debug_ranges section, yaml2obj only emits the section header.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D87263
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_ranges.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-ranges.yaml
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
Commit 0729ae367af07c2c75d08cfa881795b325fcf922 by llvm-dev
X86DomainReassignment.cpp - improve auto const/pointer/reference qualifiers. NFCI.

Fix clang-tidy warnings by ensuring auto variables are more cleanly qualified, or just avoid auto entirely.
The file was modifiedllvm/lib/Target/X86/X86DomainReassignment.cpp
Commit fcff2c32c0f3a85f7fce02a120de3f1b5778252c by llvm-dev
X86CallLowering.cpp - improve auto const/pointer/reference qualifiers. NFCI.

Fix clang-tidy warnings by ensuring auto variables are more cleanly qualified, or just avoid auto entirely.
The file was modifiedllvm/lib/Target/X86/X86CallLowering.cpp
Commit ae85da86ad8fbd022129650d0b2a6b615709a790 by llvm-dev
[Codegen][X86] Begin moving X86 specific codegen tests into X86 subfolder.

Discussed with @craig.topper and @spatel - this is to try and tidyup the codegen folder and move the x86 specific tests (as opposed to general tests that just happen to use x86 triples) into subfolders. Its up to other targets if they follow suit.

It also helps speed up test iterations as using wildcards on lit commands often misses some filenames.
The file was removedclang/test/CodeGen/x86_32-arguments-realign.c
The file was removedclang/test/CodeGen/x86-cf-protection.c
The file was addedclang/test/CodeGen/X86/x86_64-mno-sse2.c
The file was addedclang/test/CodeGen/X86/x86_64-profiling-keep-fp.c
The file was addedclang/test/CodeGen/X86/x86_64-floatvectors.c
The file was addedclang/test/CodeGen/X86/x86_32-arguments-darwin.c
The file was addedclang/test/CodeGen/X86/x86-vec-i128.c
The file was removedclang/test/CodeGen/x86_64-arguments-darwin.c
The file was addedclang/test/CodeGen/X86/x86-vec-struct-packing.c
The file was removedclang/test/CodeGen/x86-GCC-inline-asm-Y-constraints.c
The file was addedclang/test/CodeGen/X86/x86_64-arguments-nacl.c
The file was removedclang/test/CodeGen/x86_32-arguments-iamcu.c
The file was removedclang/test/CodeGen/x86-enqcmd-builtins.c
The file was removedclang/test/CodeGen/x86_64-arguments-nacl.c
The file was removedclang/test/CodeGen/x86_64-atomic-128.c
The file was removedclang/test/CodeGen/x86-builtins-vector-width.c
The file was removedclang/test/CodeGen/x86_32-fpcc-struct-return.c
The file was removedclang/test/CodeGen/x86_32-inline-asm.c
The file was addedclang/test/CodeGen/X86/x86_32-inline-asm.c
The file was removedclang/test/CodeGen/x86.c
The file was removedclang/test/CodeGen/x86_64-PR42672.c
The file was addedclang/test/CodeGen/X86/x86_64-xsave.c
The file was addedclang/test/CodeGen/X86/x86-builtins.c
The file was removedclang/test/CodeGen/x86_64-mno-sse.c
The file was removedclang/test/CodeGen/x86-inline-asm-min-vector-width.c
The file was addedclang/test/CodeGen/X86/x86_64-instrument-functions.c
The file was removedclang/test/CodeGen/x86-builtins.c
The file was addedclang/test/CodeGen/X86/x86-tsxldtrk-builtins.c
The file was removedclang/test/CodeGen/x86-crc-builtins.c
The file was removedclang/test/CodeGen/x86-soft-float.c
The file was addedclang/test/CodeGen/X86/x86-vector-width.c
The file was removedclang/test/CodeGen/x86_64-profiling-keep-fp.c
The file was addedclang/test/CodeGen/X86/x86-atomic-long_double.c
The file was removedclang/test/CodeGen/x86-nontemporal.c
The file was removedclang/test/CodeGen/x86_64-floatvectors.c
The file was addedclang/test/CodeGen/X86/x86-64-inline-asm.c
The file was removedclang/test/CodeGen/x86-long-double.cpp
The file was addedclang/test/CodeGen/X86/x86-inline-asm-v-constraint.c
The file was removedclang/test/CodeGen/x86_64-longdouble.c
The file was addedclang/test/CodeGen/X86/x86.c
The file was removedclang/test/CodeGen/x86-vector-width.c
The file was addedclang/test/CodeGen/X86/x86_32-arguments-win32.c
The file was addedclang/test/CodeGen/X86/x86-bswap.c
The file was addedclang/test/CodeGen/X86/x86_64-PR42672.c
The file was addedclang/test/CodeGen/X86/x86_32-arguments-realign.c
The file was removedclang/test/CodeGen/x86_64-mno-sse2.c
The file was addedclang/test/CodeGen/X86/x86-builtins-vector-width.c
The file was addedclang/test/CodeGen/X86/x86_32-xsave.c
The file was addedclang/test/CodeGen/X86/x86_64-arguments-darwin.c
The file was removedclang/test/CodeGen/x86_64-arguments.c
The file was removedclang/test/CodeGen/x86_64-xsave.c
The file was removedclang/test/CodeGen/x86_32-arguments-win32.c
The file was addedclang/test/CodeGen/X86/x86_32-fpcc-struct-return.c
The file was removedclang/test/CodeGen/x86-64-inline-asm.c
The file was addedclang/test/CodeGen/X86/x86_64-arguments.c
The file was removedclang/test/CodeGen/x86-atomic-long_double.c
The file was addedclang/test/CodeGen/X86/x86-cf-protection.c
The file was removedclang/test/CodeGen/x86_64-instrument-functions.c
The file was addedclang/test/CodeGen/X86/x86-soft-float.c
The file was addedclang/test/CodeGen/X86/x86-inline-asm-min-vector-width.c
The file was addedclang/test/CodeGen/X86/x86_64-arguments-win32.c
The file was addedclang/test/CodeGen/X86/x86_64-mno-sse.c
The file was removedclang/test/CodeGen/x86-vec-i128.c
The file was removedclang/test/CodeGen/x86_32-arguments-nommx.c
The file was addedclang/test/CodeGen/X86/x86-nontemporal.c
The file was removedclang/test/CodeGen/x86-vec-struct-packing.c
The file was addedclang/test/CodeGen/X86/x86_inlineasm_curly_bracket_escape.c
The file was addedclang/test/CodeGen/X86/x86_64-longdouble.c
The file was addedclang/test/CodeGen/X86/x86_32-arguments-iamcu.c
The file was addedclang/test/CodeGen/X86/x86-crc-builtins.c
The file was removedclang/test/CodeGen/x86-inline-asm-v-constraint.c
The file was removedclang/test/CodeGen/x86_32-arguments-darwin.c
The file was removedclang/test/CodeGen/x86-serialize-intrin.c
The file was addedclang/test/CodeGen/X86/x86-long-double.cpp
The file was addedclang/test/CodeGen/X86/x86-enqcmd-builtins.c
The file was removedclang/test/CodeGen/x86_inlineasm_curly_bracket_escape.c
The file was addedclang/test/CodeGen/X86/x86_32-arguments-linux.c
The file was addedclang/test/CodeGen/X86/x86-GCC-inline-asm-Y-constraints.c
The file was removedclang/test/CodeGen/x86_32-arguments-linux.c
The file was addedclang/test/CodeGen/X86/x86_64-atomic-128.c
The file was removedclang/test/CodeGen/x86-bswap.c
The file was addedclang/test/CodeGen/X86/x86-serialize-intrin.c
The file was addedclang/test/CodeGen/X86/x86_32-arguments-nommx.c
The file was removedclang/test/CodeGen/x86_32-xsave.c
The file was removedclang/test/CodeGen/x86-tsxldtrk-builtins.c
The file was removedclang/test/CodeGen/x86_64-arguments-win32.c
Commit df63eedef64d715ce1f31843f7de9c11fe1e597f by benny.kra
[mlir][VectorOps]

Put back anonymous namespace to work around GCC5 bug.

VectorToSCF.cpp:241:61: error: specialization of 'template<class ConcreteOp> mlir::LogicalResult {anonymous}::NDTransferOpHelper<ConcreteOp>::doReplace()' in different namespace [-fpermissive]
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
Commit 4e9f4d0b9d1dbf2c1d3e389b870a16c3dbd5c302 by ehsan.nadjaran_toosi
[mlir] Fix bug in copy removal

A crash could happen due to copy removal. The bug is fixed and two more
test cases are added.

Differential Revision: https://reviews.llvm.org/D87128
The file was modifiedmlir/test/Transforms/copy-removal.mlir
The file was modifiedmlir/lib/Transforms/CopyRemoval.cpp
Commit 86bd8f82cc74725a08a40efe176d3d6b9c9cef92 by raul.tambre
[CMake] Remove dead FindPythonInterp code

LLVM has bumped the minimum required CMake version to 3.13.4, so this has become dead code.

Reviewed By: #libc, ldionne

Differential Revision: https://reviews.llvm.org/D87189
The file was modifiedclang/CMakeLists.txt
The file was modifiedlld/CMakeLists.txt
The file was modifiedcompiler-rt/CMakeLists.txt
The file was modifiedlibcxx/CMakeLists.txt
The file was modifiedllvm/CMakeLists.txt
Commit e67405141836fcd88183863758eeb42f32e847a6 by dpetrov
[analyzer] [NFC] Introduce refactoring of PthreadLockChecker

Change capitalization of some names due to LLVM naming rules.
Change names of some variables to make them more speaking.
Rework similar bug reports into one common function.

Prepare code for the next patches to reduce unrelated changes.

Differential Revision: https://reviews.llvm.org/D87138
The file was modifiedclang/lib/StaticAnalyzer/Checkers/PthreadLockChecker.cpp
Commit 4964d75d7078b932ac6b17c1990adaa6eada75c1 by spatel
[InstCombine] add bitwise logic fold tests for D86395; NFC
The file was modifiedllvm/test/Transforms/InstCombine/xor.ll
Commit 156b127945a8c923d141e608b7380427da024376 by aaron
Add a new altera check for structure packing and alignment.

The altera struct pack align lint check finds structs that are inefficiently
packed or aligned and recommends packing/aligning of the structs using the
packed and aligned attributes as needed in a warning.
The file was addedclang-tools-extra/clang-tidy/altera/AlteraTidyModule.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/altera-struct-pack-align.cpp
The file was modifiedclang-tools-extra/docs/clang-tidy/index.rst
The file was addedclang-tools-extra/docs/clang-tidy/checks/altera-struct-pack-align.rst
The file was modifiedclang-tools-extra/docs/ReleaseNotes.rst
The file was modifiedclang-tools-extra/clang-tidy/ClangTidyForceLinker.h
The file was addedclang-tools-extra/clang-tidy/altera/StructPackAlignCheck.cpp
The file was addedclang-tools-extra/clang-tidy/altera/StructPackAlignCheck.h
The file was modifiedclang-tools-extra/docs/clang-tidy/checks/list.rst
The file was modifiedclang-tools-extra/clang-tidy/CMakeLists.txt
The file was addedclang-tools-extra/clang-tidy/altera/CMakeLists.txt
Commit 9c9974c3ccb6468cc83f759240293538cf123fcd by hokein.wu
[clang] Limit the maximum level of fold-expr expansion.

Introduce a new diagnostic, and respect the bracket-depth (256) by default.

Differential Revision: https://reviews.llvm.org/D86936
The file was modifiedclang/lib/Sema/TreeTransform.h
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was addedclang/test/SemaCXX/fold_expr_expansion_limit.cpp
Commit 51d30c3429fa0f46bf8c0e4a38840952c11be4f9 by benny.kra
[mlir][VectorOps] Fix more GCC5 weirdness

VectorToSCF.cpp:515:47: error: specialization of 'template<class TransferOpTy> mlir::LogicalResult mlir::VectorTransferRewriter<TransferOpTy>::matchAndRewrite(mlir::Operation*, mlir::PatternRewriter&) const' in different namespace [-fpermissive]
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp
Commit 94cfbef0a74ec3e5490878dc417fea5ecfcf2a6a by sam.parker
[NFC][ARM] Precommit test
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/remat-vctp.ll
Commit c7b7c32f4a25d15e992215c8524871bef47d959b by flo
[DSE,MemorySSA] Increase walker limit a bit.

This slightly bumps the walker limit so that it covers more cases while
not increasing compile-time too much:
http://llvm-compile-time-tracker.com/compare.php?from=0fc1c2b51ba0cfb9145139af35be638333865251&to=91144a50ea4fa82c0c877e77784f60371640b263&stat=instructions
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit e09e1d97c112ef9488b2f88db560d3d459c0652e by thakis
[gn build] (manually) port 156b127945a8
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/BUILD.gn
The file was addedllvm/utils/gn/secondary/clang-tools-extra/clang-tidy/altera/BUILD.gn
Commit 9933188c90615c9c264ebb69117f09726e909a25 by thakis
StructPackAlignCheck: Fix a -Winconsistent-missing-override warning
The file was modifiedclang-tools-extra/clang-tidy/altera/StructPackAlignCheck.h
Commit 2d9d270e77918dfc19ad9b3150ee7d40eeb8ca79 by hans
Revert 3e782bf809 "[Sema][MSVC] warn at dynamic_cast when /GR- is given"

This caused more warnings than expected, see https://crbug.com/1126019

Also reverts the follow-up 7907e5516.

> Differential Revision: https://reviews.llvm.org/D86369
The file was removedclang/test/SemaCXX/ms_no_dynamic_cast.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td
The file was modifiedclang/lib/Sema/SemaCast.cpp
The file was modifiedclang/test/SemaCXX/no-rtti.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp
The file was removedclang/test/SemaCXX/no_dynamic_cast.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td
Commit 32ae37b038b16a1ff9c81428ae4f003377439a22 by hokein.wu
[clang-tidy] Fix dynamic build failures after 156b127945a8c923d141e608b7380427da024376
The file was modifiedclang-tools-extra/clang-tidy/altera/CMakeLists.txt
Commit 6dc3e22b575267d2ede36f741bb9eb2455f36cff by paulsson
[DAGTypeLegalizer] Handle ZERO_EXTEND of promoted type in WidenVecRes_Convert.

On SystemZ, a ZERO_EXTEND of an i1 vector handled by WidenVecRes_Convert()
always ended up being scalarized, because the type action of the input is
promotion which was previously an unhandled case in this method.

This fixes https://bugs.llvm.org/show_bug.cgi?id=47132.

Differential Revision: https://reviews.llvm.org/D86268

Patch by Eli Friedman.
Review: Ulrich Weigand
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/test/CodeGen/SystemZ/vec-zext.ll
Commit 6454140ab34cb29cc0b9de4f1e80199d717f1a97 by Louis Dionne
[libc++] Make sure we always print all available features

Previously, we'd only print the features added through the new config,
however printing all the features is important for debugging purposes.
The file was modifiedlibcxx/utils/libcxx/test/config.py
Commit c2f6a0012882ba9b39ccee53f3d7f4f1aedf2181 by Louis Dionne
[libc++] Allow overriding the cached value of LIBCXX_TEST_CONFIG
The file was modifiedlibcxx/CMakeLists.txt
Commit c81dd3d159ab03d46e4280c458d3c29e56648218 by mydeveloperday
[clang-format] Handle shifts within conditions

In some situation shifts can be treated as a template, and is thus formatted as one. So, by doing a couple extra checks to assure that the condition doesn't contain a template, and is in fact a bit shift should solve this problem.

This is a fix for [[ https://bugs.llvm.org/show_bug.cgi?id=46969 | bug 46969 ]]

Reviewed By: MyDeveloperDay

Patch By: Saldivarcher

Differential Revision: https://reviews.llvm.org/D86581
The file was modifiedclang/lib/Format/TokenAnnotator.cpp
The file was modifiedclang/unittests/Format/FormatTest.cpp
Commit 487a80531006add8102d50dbcce4b6fd729ab1f6 by RonakNilesh.Chauhan
[AMDGPU] Support disassembly for AMDGPU kernel descriptors

Decode AMDGPU Kernel descriptors as assembler directives.

Reviewed By: scott.linder, jhenderson, kzhuravl

Differential Revision: https://reviews.llvm.org/D80713
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-sgpr.s
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-vgpr.s
The file was modifiedllvm/tools/llvm-objdump/llvm-objdump.cpp
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.h
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx10.s
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-gfx9.s
The file was modifiedllvm/test/CodeGen/AMDGPU/nop-data.ll
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-failure.s
The file was addedllvm/test/tools/llvm-objdump/ELF/AMDGPU/kd-zeroed-raw.s
The file was modifiedllvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp
The file was modifiedllvm/include/llvm/Support/AMDHSAKernelDescriptor.h
Commit 71133e8b5bceaf68a2cee59af371df570a1aed79 by aheejin
[clang-tidy] Fix linking for FrontendOpenMP

Without this, builds with `-DBUILD_SHARED_LIBS=ON` fail.
The file was modifiedclang-tools-extra/clang-tidy/altera/CMakeLists.txt
Commit e2394245eb28695d5eed5d7c015e99141993c723 by Lubomir.Litchev
Add an option for unrolling loops up to a factor.

Currently, there is no option to allow for unrolling a loop up to a specific factor (specified by the user).
The code for doing that is there and there are benefits when unrolling is done  to smaller loops (smaller than the factor specified).

Reviewed By: bondhugula

Differential Revision: https://reviews.llvm.org/D87111
The file was modifiedmlir/test/Dialect/SCF/loop-unroll.mlir
The file was modifiedmlir/include/mlir/Dialect/Affine/Passes.td
The file was modifiedmlir/include/mlir/Dialect/Affine/Passes.h
The file was modifiedmlir/lib/Transforms/Utils/LoopUtils.cpp
The file was modifiedmlir/test/lib/Transforms/TestLoopUnrolling.cpp
The file was modifiedmlir/lib/Dialect/Affine/Transforms/LoopUnroll.cpp
Commit 3c83b967cf223ce6a2e0813e48b64f7689512f20 by llvm-dev
LiveRegUnits.h - reduce MachineRegisterInfo.h include. NFC.

We only need to include MachineInstrBundle.h, but exposes an implicit dependency in MachineOutliner.h.

Also, remove duplicate includes from LiveRegUnits.cpp + MachineOutliner.cpp.
The file was modifiedllvm/lib/CodeGen/MachineOutliner.cpp
The file was modifiedllvm/lib/CodeGen/LiveRegUnits.cpp
The file was modifiedllvm/include/llvm/CodeGen/MachineOutliner.h
The file was modifiedllvm/include/llvm/CodeGen/LiveRegUnits.h
Commit d25c17f3175b344420c1f30040b206a47a512c9d by aheejin
[WebAssembly] Fix fixEndsAtEndOfFunction for try-catch

When the function return type is non-void and `end` instructions are at
the very end of a function, CFGStackify's `fixEndsAtEndOfFunction`
function fixes the corresponding block/loop/try's type to match the
function's return type. This is applied to consecutive `end` markers at
the end of a function. For example, when the function return type is
`i32`,
```
block i32    ;; return type is fixed to i32
  ...
  loop i32   ;; return type is fixed to i32
    ...
  end_loop
end_block
end_function
```

But try-catch is a little different, because it consists of two parts:
a try part and a catch part, and both parts' return type should satisfy
the function's return type. Which means,
```
try i32      ;; return type is fixed to i32
  ...
  block i32  ;; this should be changed i32 too!
    ...
  end_block
catch
  ...
end_try
end_function
```
As you can see in this example, it is not sufficient to only `end`
instructions at the end of a function; in case of `try`, we should
check instructions before `catch`es, in case their corresponding `try`'s
type has been fixed.

This changes `fixEndsAtEndOfFunction`'s algorithm to use a worklist
that contains a reverse iterator, each of which is a starting point for
a new backward `end` instruction search.

Fixes https://bugs.llvm.org/show_bug.cgi?id=47413.

Reviewed By: dschuff, tlively

Differential Revision: https://reviews.llvm.org/D87207
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyCFGStackify.cpp
The file was modifiedllvm/test/CodeGen/WebAssembly/cfg-stackify-eh.ll
Commit 1242dd330d9054a57c1403f16d5487f9e3a3a92f by vkeles
GlobalISel: Combine `op undef, x` to 0

https://reviews.llvm.org/D86611
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/combine-shl.mir
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
Commit 514df1b2bb1ecd1a33327001ea38a347fd2d0380 by ties.stuij
[ARM] Follow AACPS standard for volatile bit-fields access width

This patch resumes the work of D16586.
According to the AAPCS, volatile bit-fields should
be accessed using containers of the widht of their
declarative type. In such case:
```
struct S1 {
  short a : 1;
}
```
should be accessed using load and stores of the width
(sizeof(short)), where now the compiler does only load
the minimum required width (char in this case).
However, as discussed in D16586,
that could overwrite non-volatile bit-fields, which
conflicted with C and C++ object models by creating
data race conditions that are not part of the bit-field,
e.g.
```
struct S2 {
  short a;
  int  b : 16;
}
```
Accessing `S2.b` would also access `S2.a`.

The AAPCS Release 2020Q2
(https://documentation-service.arm.com/static/5efb7fbedbdee951c1ccf186?token=)
section 8.1 Data Types, page 36, "Volatile bit-fields -
preserving number and width of container accesses" has been
updated to avoid conflict with the C++ Memory Model.
Now it reads in the note:
```
This ABI does not place any restrictions on the access widths of bit-fields where the container
overlaps with a non-bit-field member or where the container overlaps with any zero length bit-field
placed between two other bit-fields. This is because the C/C++ memory model defines these as being
separate memory locations, which can be accessed by two threads simultaneously. For this reason,
compilers must be permitted to use a narrower memory access width (including splitting the access into
multiple instructions) to avoid writing to a different memory location. For example, in
struct S { int a:24; char b; }; a write to a must not also write to the location occupied by b, this requires at least two
memory accesses in all current Arm architectures. In the same way, in struct S { int a:24; int:0; int b:8; };,
writes to a or b must not overwrite each other.
```

Patch D16586 was updated to follow such behavior by verifying that we
only change volatile bit-field access when:
- it won't overlap with any other non-bit-field member
- we only access memory inside the bounds of the record
- avoid overlapping zero-length bit-fields.

Regarding the number of memory accesses, that should be preserved, that will
be implemented by D67399.

Differential Revision: https://reviews.llvm.org/D72932

The following people contributed to this patch:
- Diogo Sampaio
- Ties Stuij
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/test/CodeGen/bitfield-2.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedclang/test/CodeGen/aapcs-bitfield.c
The file was modifiedclang/lib/CodeGen/CGRecordLayout.h
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/lib/CodeGen/CGRecordLayoutBuilder.cpp
Commit d0ccfcb040c684e91d8b5fe5111ba7f4ec7e019a by kparzysz
[GVN] Add testcase that uses masked loads and stores, NFC
The file was addedllvm/test/Transforms/GVN/masked-load-store.ll
Commit 97e77ac0ed80877cda58b1dddf98890cc7b0d167 by joker.eph
Add more explicit error message when creating a type or attribute for an unregistered dialect (NFC)

Differential Revision: https://reviews.llvm.org/D87177
The file was modifiedmlir/include/mlir/IR/AttributeSupport.h
The file was modifiedmlir/include/mlir/IR/TypeSupport.h
The file was modifiedmlir/lib/Support/StorageUniquer.cpp
The file was modifiedmlir/include/mlir/Support/StorageUniquer.h
Commit 2d7fd38cf7db18edbbfa0e6dfb7454a255171867 by i
[sanitizers] Remove unneeded MaybeCall*DefaultOptions() and nullptr checks

D28596 added SANITIZER_INTERFACE_WEAK_DEF which can guarantee `*_default_options` are always defined.
The weak attributes on the `__{asan,lsan,msan,ubsan}_default_options` declarations can thus be removed.

`MaybeCall*DefaultOptions` no longer need nullptr checks, so their call sites can just be replaced by `__*_default_options`.

Reviewed By: #sanitizers, vitalybuka

Differential Revision: https://reviews.llvm.org/D87175
The file was modifiedcompiler-rt/lib/lsan/lsan_common.cpp
The file was modifiedcompiler-rt/lib/msan/msan.cpp
The file was modifiedcompiler-rt/lib/msan/msan_interface_internal.h
The file was modifiedcompiler-rt/lib/tsan/rtl/tsan_flags.cpp
The file was modifiedcompiler-rt/lib/hwasan/hwasan.cpp
The file was modifiedcompiler-rt/lib/ubsan/ubsan_flags.cpp
The file was modifiedcompiler-rt/lib/ubsan/ubsan_flags.h
The file was modifiedcompiler-rt/lib/asan/asan_flags.cpp
The file was modifiedcompiler-rt/lib/lsan/lsan.cpp
The file was modifiedcompiler-rt/lib/asan/asan_interface_internal.h
The file was modifiedcompiler-rt/lib/cfi/cfi.cpp
Commit 0dacf3b5ac3a8c4079b781c788f758709345883f by llvm-dev
RISCVMatInt.h - remove unnecessary includes. NFCI.

Add APInt forward declaration and move include to RISCVMatInt.cpp
The file was modifiedllvm/lib/Target/RISCV/Utils/RISCVMatInt.h
The file was modifiedllvm/lib/Target/RISCV/Utils/RISCVMatInt.cpp
Commit cd5c5c484830e65854cc12cb64a0feb0a9060734 by llvm-dev
CFGUpdate.h - remove unused APInt include. NFCI.
The file was modifiedllvm/include/llvm/Support/CFGUpdate.h
Commit d6f3f612318f31c46b95dd62eee45a75397ccfcf by ties.stuij
Revert "[ARM] Follow AACPS standard for volatile bit-fields access width"

This reverts commit 514df1b2bb1ecd1a33327001ea38a347fd2d0380.

Some of the buildbots got llvm-lit errors on CodeGen/volatile.c
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/test/CodeGen/aapcs-bitfield.c
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was modifiedclang/lib/CodeGen/CGRecordLayoutBuilder.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/lib/CodeGen/CGRecordLayout.h
The file was modifiedclang/lib/CodeGen/CGExpr.cpp
The file was modifiedclang/test/CodeGen/bitfield-2.c
Commit 1f870bd9284ad55dff96ab6f99afd92fd5f294be by paul
Add detailed reference for the SearchableTables backend.
The file was modifiedllvm/docs/TableGen/BackEnds.rst
Commit e6bb4c8e7b3e27f214c9665763a2dd09aa96a5ac by craig.topper
[X86] SSE4_A should only imply SSE3 not SSSE3 in the frontend.

SSE4_1 and SSE4_2 due imply SSSE3. So I guess I got confused when
switching the code to being table based in D83273.

Fixes PR47464
The file was modifiedllvm/lib/Support/X86TargetParser.cpp
The file was modifiedclang/test/Preprocessor/predefined-arch-macros.c