SuccessChanges

Summary

  1. AMDGPU/GlobalISel: Implement LLT version of allowsMisalignedMemoryAccesses (details)
  2. AMDGPU/GlobalISel: Stop using G_EXTRACT in argument lowering (details)
  3. AMDGPU/GlobalISel: Fix trying to widen <3 x s1> boolean ops (details)
  4. AMDGPU/GlobalISel: Implement expansion for rsq.clamp (details)
  5. [XCOFF][AIX] Put each jump table in an independent section if -ffunction-sections is specified (details)
  6. AMDGPU: Fix code duplication between the selectors (details)
  7. AMDGPU/GlobalISel: Move frame index selection to patterns (details)
  8. [PatternMatch] allow intrinsic form of min/max with existing matchers (details)
  9. AMDGPU/GlobalISel: Try to promote to use packed saturating add/sub (details)
  10. AMDGPU/GlobalISel: Handle llvm.amdgcn.ds.{fadd|fmin|fmax} (details)
  11. [ELF] Allow sections after a non-SHF_ALLOC section to be covered by PT_LOAD (details)
  12. PDBExtras.h - remove unnecessary raw_ostream forward declaration. NFCI. (details)
  13. [InstCombine] Add tests for mul(sub(x,y),negpow2) -> mul(sub(y,x),pow2) fold (details)
  14. [lldb][NFC] Document and encapsulate OriginMap in ASTContextMetadata (details)
  15. [OpenMP] Fix ref count dec for implicit map of partial data (details)
  16. [llvm][MLInliner] Don't log 'mandatory' events (details)
  17. [InstCombine] Add tests for mul(add(x,c),negpow2) -> mul(sub(-c,x),pow2) fold (details)
  18. [OPENMP]Redesign of OMPExecutableDirective/OMPDeclarativeDirective representation. (details)
  19. [OPENMP]Fix for Windows buildbots, NFC. (details)
  20. GlobalISel: Define InvalidRegBankID enum value (details)
  21. AMDGPU/GlobalISel: Start trying to handle AGPR bank (details)
  22. AMDGPU: Fix spilling of 96-bit AGPRs (details)
  23. [NFC]{MLInliner] Point out the tests' model dependencies (details)
  24. [SLP][X86] Regenerate sdiv test noticed in D83779. NFC. (details)
  25. AArch64/GlobalISel: Fix verifier error after selecting returnaddress (details)
  26. Remove unused variable "saved_opts". (details)
  27. AMDGPU: Define raw/struct variants of buffer atomic fadd (details)
  28. [NewPM] Pin -assumption-cache-tracker tests to legacy PM (details)
  29. [lldb/testsuite] Change get_debugserver_exe to support Rosetta (details)
  30. [HIP] Ignore invalid ar linker options (details)
  31. [NewPM][LoopUnswitch] Pin loop-unswitch to legacy PM or use simple-loop-unswitch (details)
  32. GlobalISel: Implement fewerElementsVector for G_EXTRACT_VECTOR_ELT (details)
  33. [AMDGPU][CostModel] Add f16, f64 and contract cases to fused costs estimation. (details)
  34. [clangd] Fix crash in bugprone-bad-signal-to-kill-thread clang-tidy check. (details)
  35. [lldb] Use target.GetLaunchInfo() instead of creating an empty one. (details)
  36. [mlir][SPIR-V] Fix wrongly placed Rationale section. (details)
  37. Add freeze keyword to IR emacs mode (details)
  38. Fix CFI issues in <future> (details)
  39. [SLP] Fix order of `insertelement`/`insertvalue` seed operands (details)
  40. [libc] Add tolower, toupper implementation. (details)
  41. Correctly detect legacy iOS simulator Mach-O objectfiles (details)
  42. [VectorCombine] add tests for load+insert; NFC (details)
  43. clang: Use byref for aggregate kernel arguments (details)
  44. [LLDB] Skip test_launch_simple from TestTargetAPI.py when remote (details)
Commit 6c7f640bf7ae4bffc460c6af66f3ecd93c3156ed by Matthew.Arsenault
AMDGPU/GlobalISel: Implement LLT version of allowsMisalignedMemoryAccesses
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
Commit 28124a0a636b6218f5439a1ddf87ec09a8a3c1a2 by Matthew.Arsenault
AMDGPU/GlobalISel: Stop using G_EXTRACT in argument lowering

We really need to put this undef padding stuff into a helper
somewhere, but leave that for when this is moved to generic code.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-llvm.amdgcn.image.load.2d.d16.ll (diff)
Commit c015cbc68b80e02b651988855b61b588f5069ef6 by Matthew.Arsenault
AMDGPU/GlobalISel: Fix trying to widen <3 x s1> boolean ops
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-implicit-def.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-freeze.mir (diff)
Commit 5a503521e7b757bda70325f4c01bdbc0f4e3128e by Matthew.Arsenault
AMDGPU/GlobalISel: Implement expansion for rsq.clamp

Not sure why we handle this removed instruction on newer subtargets
for this one and no others, but maintain compatibility with the DAG.
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-amdgcn.rsq.clamp.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.rsq.clamp.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
Commit e5062a6caf754de30b4ecba5bf670ee250f78554 by jasonliu
[XCOFF][AIX] Put each jump table in an independent section if -ffunction-sections is specified

If a function is in a unique section, putting all jump tables in
.rodata will prevent functions that have a jump table to get
garbage collect by the linker.
Therefore, we need to put jump table into a unique section as well.

Reviewed By: Xiangling_L

Differential Revision: https://reviews.llvm.org/D84761
The file was modifiedllvm/test/CodeGen/PowerPC/aix-lower-jump-table.ll (diff)
The file was modifiedllvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp (diff)
Commit d188a608bd89f4792215c6d699f5076fb547685c by Matthew.Arsenault
AMDGPU: Fix code duplication between the selectors

Not sure this is the right place for this helper.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp (diff)
Commit dcf3ffb0a856264bba56b7fe5b5128537903e50a by Matthew.Arsenault
AMDGPU/GlobalISel: Move frame index selection to patterns

Doesn't really save any code until global value is handled too.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
Commit 60f2c6a94cdff51fb8906030bbb73ba1c90da1c4 by spatel
[PatternMatch] allow intrinsic form of min/max with existing matchers

I skimmed the existing users of these matchers and don't see any problems
(eg, the caller assumes the matched value was a select instruction without checking).

So I think we can generalize the matching to allow the new intrinsics or the cmp+select idioms.

I did not find any unit tests for the matchers, so added some basics there. The instsimplify
tests are adapted from existing tests for the cmp+select pattern and cover the folds in
simplifyICmpWithMinMax().

Differential Revision: https://reviews.llvm.org/D85230
The file was modifiedllvm/test/Transforms/InstSimplify/maxmin_intrinsics.ll (diff)
The file was modifiedllvm/unittests/IR/PatternMatch.cpp (diff)
The file was modifiedllvm/include/llvm/IR/PatternMatch.h (diff)
Commit 63c4be53cf5569369e67b5cd7958e5eb1bfcd85a by Matthew.Arsenault
AMDGPU/GlobalISel: Try to promote to use packed saturating add/sub

This produces worse results right now for i8 vectors, but that should
be addressed when we actually try to optimize packed vectors.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddsat.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubsat.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddsat.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubsat.mir (diff)
Commit 63cdc9a49f1fdd7df80dc964bf647f89982a2569 by Matthew.Arsenault
AMDGPU/GlobalISel: Handle llvm.amdgcn.ds.{fadd|fmin|fmax}

These intrinsics are missing mangling for both the pointer and data
type.
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.h (diff)
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmax.mir
The file was removedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-amdgcn.ds.fmin.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmin.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmax.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fadd.ll
Commit a6db64ef4a9906c96ef5652739ac15aefaa7827c by i
[ELF] Allow sections after a non-SHF_ALLOC section to be covered by PT_LOAD

GNU ld allows sections after a non-SHF_ALLOC section to be covered by PT_LOAD
(PR37607) and assigns addresses to non-SHF_ALLOC output sections (similar to
SHF_ALLOC NOBITS sections. The location counter is not advanced).

This patch tries to fix PR37607 (remove a special case in
`Writer<ELFT>::createPhdrs`). To make the created PT_LOAD meaningful, we cannot
reset dot to 0 for a middle non-SHF_ALLOC output section. This results in
removal of two special cases in LinkerScript::assignOffsets. Non-SHF_ALLOC
non-orphan sections can have non-zero addresses like in GNU ld.

The zero address rule for non-SHF_ALLOC sections is weakened to apply to orphan
only. This results in a special case in createSection and findOrphanPos, respectively.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D85100
The file was modifiedlld/ELF/Writer.cpp (diff)
The file was modifiedlld/test/ELF/linkerscript/sections.s (diff)
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/Inputs/debug-line-basic.script (diff)
The file was modifiedlld/test/ELF/linkerscript/compress-debug-sections-custom.s (diff)
The file was modifiedlld/test/ELF/linkerscript/symbols-non-alloc.test (diff)
The file was modifiedlld/ELF/LinkerScript.cpp (diff)
Commit b7b1a38d41ca3fc07894c48f050c32d49199972d by llvm-dev
PDBExtras.h - remove unnecessary raw_ostream forward declaration. NFCI.

We already need to include raw_ostream.h, also add missing StringRef.h implicit dependency.
The file was modifiedllvm/include/llvm/DebugInfo/PDB/PDBExtras.h (diff)
Commit d1a91d947f49548cf17b21671f9c6ea806e40116 by llvm-dev
[InstCombine] Add tests for mul(sub(x,y),negpow2) -> mul(sub(y,x),pow2) fold

Add full vector coverage (that currently are not folded).
The file was modifiedllvm/test/Transforms/InstCombine/mul.ll (diff)
Commit f6913e74400aa932b3edc7cc765495247799fcb0 by Raphael Isemann
[lldb][NFC] Document and encapsulate OriginMap in ASTContextMetadata

Just adds the respective accessor functions to ASTContextMetadata instead
of directly exposing the OriginMap to the whole world.
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.h (diff)
The file was modifiedlldb/source/Plugins/ExpressionParser/Clang/ClangASTImporter.cpp (diff)
Commit 518a27e5591c211ceeef3091edc59012e6ace2b2 by jdenny.ornl
[OpenMP] Fix ref count dec for implicit map of partial data

D85342 broke this case.  The new test case presents an example.

Reviewed By: grokos

Differential Revision: https://reviews.llvm.org/D85369
The file was addedopenmp/libomptarget/test/mapping/target_implicit_partial_map.c
The file was modifiedopenmp/libomptarget/src/omptarget.cpp (diff)
Commit 87fb7aa137eaf389359d14bb73de5b72ec5e9bdf by mtrofin
[llvm][MLInliner] Don't log 'mandatory' events

We don't want mandatory events in the training log. We do want to handle
them, to keep the native size accounting accurate, but that's all.

Fixed the code, also expanded the test to capture this.

Differential Revision: https://reviews.llvm.org/D85373
The file was modifiedllvm/test/Transforms/Inline/ML/bounds-checks-rewards.ll (diff)
The file was modifiedllvm/lib/Analysis/DevelopmentModeInlineAdvisor.cpp (diff)
Commit 8f5b2cb828074e685f8a40569524d8c93536202a by llvm-dev
[InstCombine] Add tests for mul(add(x,c),negpow2) -> mul(sub(-c,x),pow2) fold

Also fix some undef vector elements in the similar vector tests that I missed.
The file was modifiedllvm/test/Transforms/InstCombine/mul.ll (diff)
Commit 0af7835eae698330f6362220ff1fcbfe92516de8 by a.bataev
[OPENMP]Redesign of OMPExecutableDirective/OMPDeclarativeDirective representation.

Summary:
Introduced OMPChildren class to handle all associated clauses, statement
and child expressions/statements. It allows to represent some directives
more correctly (like flush, depobj etc. with pseudo clauses, ordered
depend directives, which are standalone, and target data directives).
Also, it will make easier to avoid using of CapturedStmt in directives,
if required (atomic, tile etc. directives).
Also, it simplifies serialization/deserialization of the
executable/declarative directives.
Reduces number of allocation operations for mapper declarations.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, jfb, cfe-commits, sstefan1, aaron.ballman, caomhin

Tags: #clang

Differential Revision: https://reviews.llvm.org/D83261
The file was modifiedclang/include/clang/AST/OpenMPClause.h (diff)
The file was modifiedclang/lib/Serialization/ASTReaderStmt.cpp (diff)
The file was modifiedclang/include/clang/Serialization/ASTRecordWriter.h (diff)
The file was modifiedclang/lib/Sema/SemaTemplateInstantiateDecl.cpp (diff)
The file was modifiedclang/test/OpenMP/declare_mapper_messages.cpp (diff)
The file was modifiedclang/lib/Serialization/ASTWriter.cpp (diff)
The file was modifiedclang/test/AST/ast-dump-openmp-ordered.c (diff)
The file was modifiedclang/include/clang/Sema/Sema.h (diff)
The file was modifiedclang/include/clang/Serialization/ASTRecordReader.h (diff)
The file was modifiedclang/include/clang/AST/DeclOpenMP.h (diff)
The file was modifiedclang/test/OpenMP/declare_mapper_messages.c (diff)
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp (diff)
The file was modifiedclang/lib/AST/StmtOpenMP.cpp (diff)
The file was modifiedclang/lib/Sema/SemaExpr.cpp (diff)
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp (diff)
The file was modifiedclang/lib/Parse/ParseOpenMP.cpp (diff)
The file was modifiedclang/lib/Serialization/ASTWriterStmt.cpp (diff)
The file was modifiedclang/lib/AST/DeclOpenMP.cpp (diff)
The file was modifiedclang/lib/CodeGen/CGStmtOpenMP.cpp (diff)
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp (diff)
The file was modifiedclang/lib/Serialization/ASTReader.cpp (diff)
The file was modifiedclang/include/clang/AST/StmtOpenMP.h (diff)
Commit 8d072a4405213623a1b13dbac2e451df81457343 by a.bataev
[OPENMP]Fix for Windows buildbots, NFC.
The file was modifiedclang/include/clang/AST/OpenMPClause.h (diff)
Commit 34040a4f61fecaa8e901ca2e5e587df13d7097ac by Matthew.Arsenault
GlobalISel: Define InvalidRegBankID enum value
The file was modifiedllvm/utils/TableGen/RegisterBankEmitter.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
Commit 56270d1d421e00c98be169d9734c84350660781c by Matthew.Arsenault
AMDGPU/GlobalISel: Start trying to handle AGPR bank

Try to use AGPR banks for the various merge/unmerge type
operations. Previously these would introduce copies to VGPR.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-concat-vector.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-insert.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-merge-values.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.h (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-build-vector.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-unmerge-values.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-phi.mir (diff)
Commit 90eb7d5283df7655188142d8e0c064bd4a688e00 by Matthew.Arsenault
AMDGPU: Fix spilling of 96-bit AGPRs
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.mir (diff)
Commit ca7973cf18207b7d501c852852257c0b02be3b6c by mtrofin
[NFC]{MLInliner] Point out the tests' model dependencies
The file was addedllvm/lib/Analysis/models/inliner/README.txt
The file was modifiedllvm/unittests/Analysis/TFUtilsTest.cpp (diff)
Commit 3b93464dcf2f4bcaa4a8fe3d888fee027aa2100b by llvm-dev
[SLP][X86] Regenerate sdiv test noticed in D83779. NFC.
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/alternate-int.ll (diff)
Commit eae9c541484b75e4b3514ed47344adf3352f5d40 by Matthew.Arsenault
AArch64/GlobalISel: Fix verifier error after selecting returnaddress

This was caching the wrong register to re-use later.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-returnaddress-liveins.mir (diff)
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp (diff)
Commit 9dbdaea9a0e6f58417b5bd8980e7ea6723fd1783 by saugustine
Remove unused variable "saved_opts".

wattr_get is a macro, and the documentation states:
"The parameter opts is reserved for  future use,
applications must supply a null pointer."

In practice, passing a variable there is harmless, except
that it is unused inside the macro, which causes unused
variable warnings.

The various places where
The file was modifiedlldb/source/Core/IOHandlerCursesGUI.cpp (diff)
Commit 1a0c0944c62576632a390b11c654e92ea0c9014d by Matthew.Arsenault
AMDGPU: Define raw/struct variants of buffer atomic fadd

Somehow the new FP atomic buffer intrinsics ended up using the legacy
style for buffer intrinsics.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSearchableTables.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was addedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.atomic.fadd.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.atomic.fadd.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/BUFInstructions.td (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.raw.buffer.atomic.fadd.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.struct.buffer.atomic.fadd.ll
Commit 5bb6b8250ad9b61c548a1fb29d36f705ecfbe2ee by aeubanks
[NewPM] Pin -assumption-cache-tracker tests to legacy PM

All tests have corresponding NPM RUN lines.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D85395
The file was modifiedllvm/test/Transforms/Util/assume-builder.ll (diff)
The file was modifiedllvm/test/Transforms/Util/assume-simplify.ll (diff)
Commit 99298c7fc540c74c89c92f0e5d617e00cb87cf19 by Fred Riss
[lldb/testsuite] Change get_debugserver_exe to support Rosetta

In order to be able to run the debugserver tests against the Rosetta
debugserver, detect the Rosetta run configuration and return the
system Rosetta debugserver.
The file was modifiedlldb/packages/Python/lldbsuite/test/tools/lldb-server/lldbgdbserverutils.py (diff)
Commit 96c2d5e99e32340be1379959977f2d6247788db6 by enye.shi
[HIP] Ignore invalid ar linker options

Instead of accepting the same arguments as regular linker,
the static linker will only accept input files.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D85442
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp (diff)
The file was modifiedclang/test/Driver/hip-link-static-library.hip (diff)
Commit d0acd97c68eceada71a96173bdff745dd4307038 by aeubanks
[NewPM][LoopUnswitch] Pin loop-unswitch to legacy PM or use simple-loop-unswitch

As mentioned in
http://lists.llvm.org/pipermail/llvm-dev/2020-July/143395.html,
loop-unswitch has not been ported to the NPM. Instead people are using
simple-loop-unswitch.

Pin all tests in Transforms/LoopUnswitch to legacy PM and replace all
other uses of loop-unswitch with simple-loop-unswitch.

One test that didn't fit into the above was
2014-06-21-congruent-constant.ll which seems to only pass with
loop-unswitch. That is also pinned to legacy PM.

Now all tests containing "-loop-unswitch" anywhere in the test succeed with
NPM turned on by default.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D85360
The file was modifiedllvm/test/Transforms/LoopUnswitch/2015-06-17-Metadata.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2007-08-01-LCSSA.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2011-06-02-CritSwitch.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/callbr.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/unswitch-select.ll (diff)
The file was modifiedllvm/test/Transforms/IndVarSimplify/2014-06-21-congruent-constant.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2008-11-03-Invariant.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2007-08-01-Dom.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/invalidate-scev.ll (diff)
The file was modifiedllvm/test/Transforms/LCSSA/2007-07-12-LICM.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/msan.ll (diff)
The file was modifiedllvm/test/Other/2007-09-10-PassManager.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/elseif-non-exponential-behavior.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/basictest.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/crash.ll (diff)
The file was modifiedllvm/test/Analysis/MemorySSA/loop-unswitch.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2007-05-09-Unreachable.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/exponential-behavior.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2012-04-30-LoopUnswitch-LPad-Crash.ll (diff)
The file was modifiedllvm/test/Transforms/LICM/Preserve-LCSSA.ll (diff)
The file was modifiedllvm/test/Analysis/MemorySSA/pr39197.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/guards.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/infinite-loop.ll (diff)
The file was modifiedllvm/test/Transforms/LCSSA/2007-07-12-LICM-3.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/trivial-unswitch.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/simplify-with-nonvalness.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/copy-metadata.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2007-07-18-DomInfo.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/LIV-loop-condtion.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/cleanuppad.ll (diff)
The file was modifiedllvm/test/Transforms/LoopDeletion/2008-05-06-Phi.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2015-09-18-Addrspace.ll (diff)
The file was modifiedllvm/test/Analysis/Dominators/2007-07-11-SplitBlock.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2010-11-18-LCSSA.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2007-07-12-ExitDomInfo.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2011-09-26-EHCrash.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2011-11-18-SimpleSwitch.ll (diff)
The file was modifiedllvm/test/Analysis/Dominators/2007-07-12-SplitBlock.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2012-04-02-IndirectBr.ll (diff)
The file was modifiedllvm/test/Analysis/MemorySSA/pr40749_2.ll (diff)
The file was modifiedllvm/test/Transforms/LICM/2007-07-30-AliasSet.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2007-07-13-DomInfo.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2006-06-13-SingleEntryPHI.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2007-05-09-tl.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2012-05-20-Phi.ll (diff)
The file was modifiedllvm/test/Transforms/LCSSA/2007-07-12-LICM-2.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/pr32818.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2011-11-18-TwoSwitches-Threshold.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2008-06-17-DomFrontier.ll (diff)
The file was modifiedllvm/test/Transforms/LICM/pr32129.ll (diff)
The file was modifiedllvm/test/Analysis/AliasSet/unknown-inst-tracking.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2008-06-02-DomInfo.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/unswitch-equality-undef.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/preserve-analyses.ll (diff)
The file was modifiedllvm/test/Transforms/LoopUnswitch/2006-06-27-DeadSwitchCase.ll (diff)
Commit e00201539f9c5c540a037add790eb31032aaea8f by Matthew.Arsenault
GlobalISel: Implement fewerElementsVector for G_EXTRACT_VECTOR_ELT

Use the same basic strategy as LegalizeVectorTypes. Try to index into
smaller pieces if there's a constant index, and otherwise fall back to
a stack temporary.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll (diff)
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-extract-vector-elt.mir (diff)
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
Commit 4ccc38813eb76c7984f2700df527c643abeb9a58 by dfukalov
[AMDGPU][CostModel] Add f16, f64 and contract cases to fused costs estimation.

Add cases of fused fmul+fadd/fsub with f16 and f64 operands to cost model.
Also added operations with contract attribute.

Fixed line endings in test.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D84995
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp (diff)
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h (diff)
The file was modifiedllvm/test/Analysis/CostModel/AMDGPU/fused_costs.ll (diff)
Commit 9f24148b212698aca220ac923d215c2073e443ce by platonov.aleksandr
[clangd] Fix crash in bugprone-bad-signal-to-kill-thread clang-tidy check.

Inside clangd, clang-tidy checks don't see preprocessor events in the preamble.
This leads to `Token::PtrData == nullptr` for tokens that the macro is defined to.
E.g. `#define SIGTERM 15`:
- Token::Kind == tok::numeric_constant (Token::isLiteral() == true)
- Token::UintData == 2
- Token::PtrData == nullptr

As the result of this, bugprone-bad-signal-to-kill-thread check crashes at null-dereference inside clangd.

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D85417
The file was modifiedclang-tools-extra/clangd/unittests/DiagnosticsTests.cpp (diff)
The file was modifiedclang-tools-extra/clang-tidy/bugprone/BadSignalToKillThreadCheck.cpp (diff)
Commit 86aa8e6363c7e00f211de62ccb3236556e9841df by Jonas Devlieghere
[lldb] Use target.GetLaunchInfo() instead of creating an empty one.

Update tests that were creating an empty LaunchInfo instead of using the
one coming from the target. This ensures target properties are honored.
The file was modifiedlldb/test/API/python_api/process/io/TestProcessIO.py (diff)
The file was modifiedlldb/test/API/commands/target/auto-install-main-executable/TestAutoInstallMainExecutable.py (diff)
The file was modifiedlldb/test/API/functionalities/tail_call_frames/thread_step_out_or_return/TestSteppingOutWithArtificialFrames.py (diff)
The file was modifiedlldb/test/API/macosx/thread-names/TestInterruptThreadNames.py (diff)
The file was modifiedlldb/test/API/commands/disassemble/basic/TestFrameDisassemble.py (diff)
The file was modifiedlldb/test/API/functionalities/signal/TestSendSignal.py (diff)
The file was modifiedlldb/test/API/python_api/process/TestProcessAPI.py (diff)
The file was modifiedlldb/test/API/functionalities/breakpoint/auto_continue/TestBreakpointAutoContinue.py (diff)
The file was modifiedlldb/test/API/commands/frame/var/TestFrameVar.py (diff)
The file was modifiedlldb/test/API/functionalities/breakpoint/address_breakpoints/TestAddressBreakpoints.py (diff)
The file was modifiedlldb/test/API/functionalities/tail_call_frames/sbapi_support/TestTailCallFrameSBAPI.py (diff)
The file was modifiedlldb/test/API/commands/frame/language/TestGuessLanguage.py (diff)
Commit 25e8668e88bb1fa7bfa359b56ba7c663ebec5d3b by ravishankarm
[mlir][SPIR-V] Fix wrongly placed Rationale section.

Differential Revision: https://reviews.llvm.org/D85461
The file was modifiedmlir/docs/Dialects/SPIR-V.md (diff)
Commit 87ce06e3155775f63ce8b6693282c130e7dff21d by Matthew.Arsenault
Add freeze keyword to IR emacs mode
The file was modifiedllvm/utils/emacs/llvm-mode.el (diff)
Commit 189ba3db8653eaefc191599dd60d9aa6b0127c44 by eugenis
Fix CFI issues in <future>

This change fixes errors reported by Control Flow Integrity (CFI) checking when using `std::packaged_task`.  The errors mostly stem from casting the underlying storage (`__buf_`) to `__base*`, even if it is uninitialized.  The solution is to wrap `__base*` access to `__buf_` behind a getter marked with _LIBCPP_NO_CFI.

Differential Revision: https://reviews.llvm.org/D82627
The file was modifiedlibcxx/include/future (diff)
Commit a7478fab6ce82532c1545614362a3688e8a4ed36 by anton.a.afanasyev
[SLP] Fix order of `insertelement`/`insertvalue` seed operands

Summary:
This patch takes the indices operands of `insertelement`/`insertvalue`
into account while generation of seed elements for `findBuildAggregate()`.
This function has kept the original order of `insert`s before.
Also this patch optimizes `findBuildAggregate()` preventing it from
redundant temporary vector allocations and its multiple reversing.

Fixes llvm.org/pr44067

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83779
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp (diff)
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/insert-element-build-vector.ll (diff)
The file was modifiedllvm/test/Transforms/PhaseOrdering/X86/horiz-math.ll (diff)
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/pr42022.ll (diff)
The file was modifiedllvm/test/Transforms/SLPVectorizer/X86/pr44067.ll (diff)
Commit 128bf458ab8c5bdbb02e5b13769a618b357d5ae2 by gyurgyikcp
[libc] Add tolower, toupper implementation.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D85326
The file was modifiedlibc/src/ctype/isupper.cpp (diff)
The file was addedlibc/src/ctype/tolower.cpp
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt (diff)
The file was modifiedlibc/src/ctype/ctype_utils.h (diff)
The file was modifiedlibc/config/linux/api.td (diff)
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt (diff)
The file was modifiedlibc/src/ctype/CMakeLists.txt (diff)
The file was addedlibc/src/ctype/tolower.h
The file was addedlibc/test/src/ctype/tolower_test.cpp
The file was addedlibc/src/ctype/toupper.h
The file was addedlibc/test/src/ctype/toupper_test.cpp
The file was addedlibc/src/ctype/toupper.cpp
The file was modifiedlibc/src/ctype/islower.cpp (diff)
The file was modifiedlibc/test/src/ctype/CMakeLists.txt (diff)
The file was modifiedlibc/spec/stdc.td (diff)
Commit 05df9cc70367a60cb34bee773389ab2522984f8b by Adrian Prantl
Correctly detect legacy iOS simulator Mach-O objectfiles

The code in ObjectFileMachO didn't disambiguate between ios and
ios-simulator object files for Mach-O objects using the legacy
ambiguous LC_VERSION_MIN load commands. This used to not matter before
taught ArchSpec that ios and ios-simulator are no longer compatible.

rdar://problem/66545307

Differential Revision: https://reviews.llvm.org/D85358
The file was modifiedlldb/source/Plugins/ObjectFile/Mach-O/ObjectFileMachO.cpp (diff)
The file was modifiedlldb/source/Utility/ArchSpec.cpp (diff)
The file was modifiedlldb/test/API/macosx/simulator/TestSimulatorPlatform.py (diff)
The file was modifiedlldb/unittests/Utility/ArchSpecTest.cpp (diff)
Commit c9bcc237a284af16d25ae89e5e3178ed210a840f by spatel
[VectorCombine] add tests for load+insert; NFC
The file was modifiedllvm/test/Transforms/VectorCombine/X86/load.ll (diff)
Commit 30eeb742f1d11d7a7036e3b8a3bffc1dfd252082 by Matthew.Arsenault
clang: Use byref for aggregate kernel arguments

Add address space to indirect abi info and use it for kernels.

Previously, indirect arguments assumed assumed a stack passed object
in the alloca address space using byval. A stack pointer is unsuitable
for kernel arguments, which are passed in a separate, constant buffer
with a different address space.

Start using the new byref for aggregate kernel arguments. Previously
these were emitted as raw struct arguments, and turned into loads in
the backend. These will lower identically, although with byref you now
have the option of applying an explicit alignment. In the future, a
reasonable implementation would use byref for all kernel arguments
(this would be a practical problem at the moment due to losing things
like noalias on pointer arguments).

This is mostly to avoid fighting the optimizer's treatment of
aggregate load/store. SROA and instcombine both turn aggregate loads
and stores into a long sequence of element loads and stores, rather
than the optimizable memcpy I would expect in this situation. Now an
explicit memcpy will be introduced up-front which is better understood
and helps eliminate the alloca in more situations.

This skips using byref in the case where HIP kernel pointer arguments
in structs are promoted to global pointers. At minimum an additional
patch is needed to allow coercion with indirect arguments. This also
skips using it for OpenCL due to the current workaround used to
support kernels calling kernels. Distinct function bodies would need
to be generated up front instead of emitting an illegal call.
The file was modifiedclang/include/clang/CodeGen/CGFunctionInfo.h (diff)
The file was modifiedclang/test/CodeGenOpenCL/amdgpu-abi-struct-coerce.cl (diff)
The file was modifiedclang/lib/CodeGen/CGCall.cpp (diff)
The file was modifiedclang/test/CodeGenCUDA/kernel-args.cu (diff)
The file was modifiedclang/lib/CodeGen/TargetInfo.cpp (diff)
Commit ba37b144e6cf7ecaa7e6eb5bb34c02aeaa8a9e3c by Jonas Devlieghere
[LLDB] Skip test_launch_simple from TestTargetAPI.py when remote
The file was modifiedlldb/test/API/python_api/target/TestTargetAPI.py (diff)