FailedChanges

Summary

  1. [InstSimplify] Fold degenerate abs of abs form (details)
  2. Add proper move ctor/move assign to APValue. NFCI. (details)
  3. [ARM] Regenerate tests. NFC (details)
  4. [ARM] Remove -O3 from mve intrinsic tests. NFC (details)
  5. [X86][AVX] lowerShuffleWithPERMV - adjust binary shuffle masks to account for widening on non-VLX targets (details)
  6. [SmallVector] Move error handling out of line (details)
  7. Thread safety analysis: Test and document release_generic_capability (details)
  8. Thread safety analysis: Improve documentation for scoped capabilities (details)
  9. [mlir] Add Shaped Type, Tensor Type and MemRef Type to python bindings. (details)
  10. [DSE,MemorySSA] Add a few additional debug messages. (details)
  11. [compiler-rt] Implement __clear_cache() on OpenBSD/arm (details)
  12. [ValueTracking] Avoid known bits fallback for non-zero get check (NFCI) (details)
  13. [asan_symbolize] Pass --demangle/--no-demangle instead of --demangle={True,False} (details)
  14. [PowerPC] Implement Vector Expand Mask builtins in LLVM/Clang (details)
  15. [WebAssembly] Fix incorrect assumption of simple value types (details)
  16. [machinesink] add testcase for more sinking - NFC (details)
  17. [ELF] Add a new e_machine value EM_CSKY and add some CSKY relocation types (details)
  18. Move targetHasSVE function to lldbtest.py (details)
  19. When dumping results of StackLifetime, it will print the following (details)
  20. Move NativeRegisterContextLinux/RegisterContextPOSIX*_arm to RegisterInfoAndSetInterface (details)
  21. Extend PyConcreteType to support intermediate base classes. (details)
  22. [Sparc] Select the UltraSPARC instruction set with the external assembler (details)
  23. [scan-view] Explicitly use utf-8 in send_string (details)
  24. [CMake][TableGen] Simplify code by using list(TRANSFORM) (details)
  25. [CMake][Polly] Remove dead CMake code (details)
  26. [CMake][OpenMP] Remove old dead CMake code (details)
  27. [CMake][TableGen] Remove dead CMake version checks (details)
  28. [cmake] Fix build of attribute plugin example on Windows (details)
  29. [KnownBits] Implement accurate unsigned and signed max and min (details)
  30. Add BinaryFormat/ELFRelocs/CSKY.def to LLVM modulemap (details)
  31. [DWARFYAML] Make the debug_addr section optional. (details)
  32. [ARM][CostModel] CodeSize costs for i1 arith ops (details)
  33. [GlobalISel] Extend not_cmp_fold to work on conditional expressions (details)
  34. [SimplifyCFG] Consider cost of combining predicates. (details)
  35. [clang-format] Allow configuring list of macros that map to attributes (details)
  36. [clang-format] Handle typename macros inside cast expressions (details)
  37. [clang-format] Check that */& after typename macros are pointers/references (details)
  38. [clang-format] Fix formatting of _Atomic() qualifier (details)
  39. [clang-format] Parse __underlying_type(T) as a type (details)
  40. [clang-format] Correctly parse function declarations with TypenameMacros (details)
  41. [OpenMP][AMDGPU] Use DS_Max_Warp_Number instead of WARPSIZE (details)
  42. [mlir][Vector] Revisit VectorToSCF. (details)
  43. Extract infrastructure to ignore intermediate expressions into `clang/AST/IgnoreExpr.h` (details)
  44. [Ignore Expressions][NFC] Refactor to better use `IgnoreExpr.h` and nits (details)
  45. [X86] Use Register instead of unsigned. NFCI. (details)
  46. [X86] Use Register instead of unsigned. NFCI. (details)
  47. [NFC][PowerPC] Add tests for `mul` with big constants. (details)
  48. [X86] Use Register instead of unsigned. NFCI. (details)
  49. [X86][AVX] Add extra vperm2f128+vpermilvar combine coverage (details)
  50. [X86] getFauxShuffleMask - handle insert_subvector(zero, sub, C) (details)
  51. [X86] Unbreak the build after 22fa6b20d92e (details)
  52. [gn build] Port 81aa66f65f5 (details)
  53. [clang] Prevent that Decl::dump on a CXXRecordDecl deserialises further declarations. (details)
  54. [gn build] Port 0478720157f (details)
  55. [SCEV] Refactor isHighCostExpansionHelper (details)
  56. [MLIR][Standard] Add `dynamic_tensor_from_elements` operation (details)
  57. [obj2yaml] Add support for dumping the .debug_str section. (details)
  58. [X86][AVX] Use lowerShuffleWithPERMV in shuffle combining to support non-VLX targets (details)
  59. X86AvoidStoreForwardingBlocks.cpp - use unsigned for Opcode values. NFCI. (details)
  60. [llvm-readobj/elf] - Introduce Relocation<ELFT> helper. (details)
  61. LegalizeTypes.h - remove orphan SplitVSETCC declaration. NFCI. (details)
  62. [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. (details)
  63. [MLIR] Fix Win test due to partial order of CHECK directives (details)
  64. [InstCombine] give a name to an intermediate value for easier tracking; NFC (details)
  65. [InstCombine] add test with more unreachable insts; NFC (details)
  66. [SelectionDAG] memcpy expansion of const volatile struct ignores const zero (details)
  67. [X86] Replace EmitX86AddSubSatExpr with EmitX86BinaryIntrinsic generic helper. NFCI. (details)
  68. MachineStableHash.h - remove MachineInstr.h include. NFC. (details)
  69. [llvm-readobj/elf] - Generalize the code for printing dynamic relocations. NFCI. (details)
  70. Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings." (details)
  71. Revert "[clang] Prevent that Decl::dump on a CXXRecordDecl deserialises further declarations." (details)
  72. [gn build] Port 23f700c785a (details)
  73. [X86] Update SSE/AVX ABS intrinsics to emit llvm.abs.* (PR46851) (details)
  74. [X86][SSE] Move llvm.x86.ssse3.pabs.*.128 intrinsics to ssse3-intrinsics-x86-upgrade.ll (details)
  75. [KillTheDoctor/CMake] Add missing keyword PRIVATE in target_link_libraries (details)
  76. [llvm-readobj] - Remove code duplication when printing dynamic relocations. NFCI. (details)
  77. [NFC][PowerPC] Add tests in constants-i64.ll. (details)
  78. [mlir] Take ValueRange instead of ArrayRef<Value> in StructuredIndexed (details)
  79. [X86][SSE] Use llvm.abs.* vector intrinsics instead of old (deprecated) SSE/AVX intrinsics for combine tests (details)
  80. [X86] Auto upgrade SSE/AVX PABS intrinsics to generic Intrinsic::abs (details)
  81. Follow up of rG5f1cad4d296a, slightly reduced test case. NFC. (details)
  82. [MLIR][Shape] Merge `shape` to `std`/`scf` lowerings. (details)
  83. [InstCombine] erase instructions leading up to unreachable (details)
  84. [X86] Replace UpgradeX86AddSubSatIntrinsics with UpgradeX86BinaryIntrinsics generic helper. NFCI. (details)
  85. [X86][SSE] Add test cases for PR47448 (details)
  86. [X86][SSE] Don't use LowerVSETCCWithSUBUS for unsigned compare with +ve operands (PR47448) (details)
  87. [Sparc] Add reduced funnel shift test case for PR47303 (details)
  88. AntiDepBreaker.h - remove unnecessary ScheduleDAG.h include. NFCI. (details)
  89. [flang] Fix link to old repo location in doxygen mainpage. NFC. (details)
  90. [analyzer][StdLibraryFunctionsChecker] Add POSIX pthread handling functions (details)
  91. [flang] Spelling and format edits to README.txt. NFC. (details)
  92. [analyzer][StdLibraryFunctionsChecker] Have proper weak dependencies (details)
  93. Reduce the number of memory allocations when displaying (details)
  94. [AMDGPU] SILowerControlFlow::optimizeEndCF should remove empty basic block (details)
  95. [InstCombine] move/add tests for icmp with mul operands; NFC (details)
  96. [InstCombine] improve folds for icmp with multiply operands (PR47432) (details)
  97. LeonPasses.h - remove orphan function declarations. NFCI. (details)
  98. LeonPasses.h - remove unnecessary includes. NFCI. (details)
  99. BTFDebug.h - reduce MachineInstr.h include to forward declaration. NFCI. (details)
  100. MipsISelLowering.h - remove CCState/CCValAssign forward declarations. NFCI. (details)
  101. VPlan.h - remove unnecessary forward declarations. NFCI. (details)
  102. [ms] [llvm-ml] Add support for bitwise named operators (AND, NOT, OR) in MASM (details)
  103. [ms] [llvm-ml] Fix STRUCT field alignment (details)
  104. [ms] [llvm-ml] Allow use of locally-defined variables in expressions (details)
  105. [DAGCombiner] allow more store merging for non-i8 truncated ops (details)
  106. [X86] Pre-commit new test case for D87214. NFC (details)
  107. [X86] Use the same sequence for i128 ISD::ABS on 64-bit targets as we use for i64 on 32-bit targets. (details)
  108. [InstCombine] add ptr difference tests; NFC (details)
  109. [InstCombine] improve fold of pointer differences (details)
  110. [SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+add+xor expansion when ADDCARRY is supported. (details)
  111. [SCCP] Compute ranges for supported intrinsics (details)
  112. [KnownBits] Avoid some copies (NFC) (details)
  113. Reland [SimplifyCFG][LoopRotate] SimplifyCFG: disable common instruction hoisting by default, enable late in pipeline (details)
  114. [asan][test] Use --image-base for Linux/asan_prelink_test.cpp if ld is LLD (details)
  115. [DSE,MemorySSA] Add an early check for read clobbers to traversal. (details)
  116. [Sema][MSVC] warn at dynamic_cast when /GR- is given (details)
  117. Add documentation for getDependentDialects() in the PassManagement infra docs (details)
  118. Add a doc/tutorial on traversing the IR (details)
  119. Update SVG images to be properly cropped (NFC) (details)
  120. [builtins] Inline __paritysi2 into __paritydi2 and inline __paritydi2 into __parityti2. (details)
  121. [flang][OpenMP] Enhance parser support for atomic construct to OpenMP 5.0 (details)
  122. [llvm-objcopy] Consolidate and unify version tests (details)
  123. [PowerPC] Implement instruction clustering for stores (details)
  124. [Sema] fix /gr warning test case (details)
  125. [Test] Auto-generated checks for some IndVarSimplify tests (details)
  126. [Attributor][FIX] Properly return changed if the IR was modified (details)
  127. [Attributor][NFC] Expand `auto` types (clang-fix-it) (details)
  128. [Attributor][NFC] Clang tidy: no else after continue (details)
  129. [Attributor][NFC] Change variable spelling (details)
  130. [Attributor][NFC] Cleanup internalize test case (details)
  131. [Attributor][FIX] Don't crash on internalizing linkonce_odr hidden functions (details)
  132. [ELF] --symbol-ordering-file: optimize a loop (details)
Commit ff218cbc84ff3783cb5ad030397adef8c9e8d444 by nikita.ppv
[InstSimplify] Fold degenerate abs of abs form

This addresses the remaining issue from D87188. Due to a series of
folds, we may end up with abs-of-abs represented as
x == 0 ? -abs(x) : abs(x). Rather than recognizing this as a special
abs pattern and doing an abs-of-abs fold on it afterwards,
I'm directly folding this to one of the select operands in InstSimplify.

The general pattern falls into the "select with operand replaced"
category, but that fold is not powerful enough to recognize that
both hands of the select are the same for value zero.

Differential Revision: https://reviews.llvm.org/D87197
The file was modifiedllvm/lib/Analysis/InstructionSimplify.cpp (diff)
The file was modifiedllvm/test/Transforms/InstSimplify/abs_intrinsic.ll (diff)
Commit 4d0312c8e05be5353c6c29b31036647dceca3ce5 by benny.kra
Add proper move ctor/move assign to APValue. NFCI.

Swapping 64 bytes to make a move isn't cheap.
The file was modifiedclang/lib/AST/APValue.cpp (diff)
The file was modifiedclang/include/clang/AST/APValue.h (diff)
Commit d866dc374986ac1cff6b4950ea5fa3f8687fdadd by david.green
[ARM] Regenerate tests. NFC
The file was modifiedllvm/test/CodeGen/Thumb2/mve-gather-scatter-tailpred.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-pred-vctpvpsel.ll (diff)
Commit 667e800bb3a8c1bdda0cabad7549c766b3424064 by david.green
[ARM] Remove -O3 from mve intrinsic tests. NFC
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vmaxq.c (diff)
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vminnmaq.c (diff)
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vmaxnmaq.c (diff)
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vminnmq.c (diff)
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vmaxnmq.c (diff)
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vminaq.c (diff)
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vmaxaq.c (diff)
The file was modifiedclang/test/CodeGen/arm-mve-intrinsics/vminq.c (diff)
Commit ecac5c28089283fbaef1fec758535ca700095a09 by llvm-dev
[X86][AVX] lowerShuffleWithPERMV - adjust binary shuffle masks to account for widening on non-VLX targets

rGabd33bf5eff2 enabled us to pad 128/256-bit shuffles to 512-bit on non-VLX targets, but wasn't updating binary shuffles to account for the new vector width.
The file was modifiedllvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/shuffle-vs-trunc-512.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 8c386c94749a78392fd763f8449ca3e55f030ffd by benny.kra
[SmallVector] Move error handling out of line

This reduces duplication and avoids emitting ice cold code into every
instance of grow().
The file was modifiedllvm/lib/Support/SmallVector.cpp (diff)
The file was modifiedllvm/include/llvm/ADT/SmallVector.h (diff)
Commit cc6713a2c35edf17cfb567284cc76b374308e5e4 by aaronpuchert
Thread safety analysis: Test and document release_generic_capability

The old locking attributes had a generic release, but as it turns out
the capability-based attributes have it as well.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D87064
The file was modifiedclang/test/SemaCXX/thread-safety-annotations.h (diff)
The file was modifiedclang/docs/ThreadSafetyAnalysis.rst (diff)
Commit bbb3baf6205c54231257f64fd18661a13a5c97ee by aaronpuchert
Thread safety analysis: Improve documentation for scoped capabilities

They are for more powerful than the current documentation implies, this
adds

* adopting a lock,
* deferring a lock,
* manually unlocking the scoped capability,
* relocking the scoped capability, possibly in a different mode,
* try-relocking the scoped capability.

Also there is now a generic explanation how attributes on scoped
capabilities work. There has been confusion in the past about how to
annotate them (see e.g. PR33504), hopefully this clears things up.

Reviewed By: aaron.ballman

Differential Revision: https://reviews.llvm.org/D87066
The file was modifiedclang/docs/ThreadSafetyAnalysis.rst (diff)
Commit 54d432aa6b835ee7e835d0626c15ca5e7eb83ab4 by stellaraccident
[mlir] Add Shaped Type, Tensor Type and MemRef Type to python bindings.

Based on the PyType and PyConcreteType classes, this patch implements the bindings of Shaped Type, Tensor Type and MemRef Type subclasses.
The Tensor Type and MemRef Type are bound as ranked and unranked separately.
This patch adds the ***GetChecked C API to make sure the python side can get a valid type or a nullptr.
Shaped type is not a kind of standard types, it is the base class for vectors, memrefs and tensors, this patch binds the PyShapedType class as the base class of Vector Type, Tensor Type and MemRef Type subclasses.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D87091
The file was modifiedmlir/lib/CAPI/IR/StandardTypes.cpp (diff)
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp (diff)
The file was modifiedmlir/include/mlir-c/StandardTypes.h (diff)
The file was modifiedmlir/test/Bindings/Python/ir_types.py (diff)
Commit 16bb71fd4f898d296397336ecb81b79a7297933c by flo
[DSE,MemorySSA] Add a few additional debug messages.
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp (diff)
Commit 8542dab909f895a8b6812428bb5e1acf7ea15305 by brad
[compiler-rt] Implement __clear_cache() on OpenBSD/arm
The file was modifiedcompiler-rt/lib/builtins/clear_cache.c (diff)
Commit b536cbaac5f85a3a1ab8c971c300cd27e5603fda by nikita.ppv
[ValueTracking] Avoid known bits fallback for non-zero get check (NFCI)

The known bits fall back will never be able to infer a non-null
value here, so don't bother.
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp (diff)
Commit ab68517e6b7e51b84c4b0e813a30258ec1ce5da5 by i
[asan_symbolize] Pass --demangle/--no-demangle instead of --demangle={True,False}

`--demangle={True,False}` were accepted but disallowed after llvm-symbolizer's switch to OptTable.
(`--demangle={true,false}` were temporarily supported but they are case sensitive.)
The file was modifiedcompiler-rt/lib/asan/scripts/asan_symbolize.py (diff)
Commit efa57f9a7adb11a14b4e0d930f49070c769fa6ac by amy.kwan1
[PowerPC] Implement Vector Expand Mask builtins in LLVM/Clang

This patch implements the vec_expandm function prototypes in altivec.h in order
to utilize the vector expand with mask instructions introduced in Power10.

Differential Revision: https://reviews.llvm.org/D82727
The file was modifiedclang/lib/Headers/altivec.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td (diff)
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/p10-vector-mask-ops.ll (diff)
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def (diff)
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c (diff)
Commit caee15a0ed52471bd329d01dc253ec9be3936c6d by tlively
[WebAssembly] Fix incorrect assumption of simple value types

Fixes PR47375, in which an assertion was triggering because
WebAssemblyTargetLowering::isVectorLoadExtDesirable was improperly
assuming the use of simple value types.

Differential Revision: https://reviews.llvm.org/D87110
The file was addedllvm/test/CodeGen/WebAssembly/pr47375.ll
The file was modifiedllvm/lib/Target/WebAssembly/WebAssemblyISelLowering.cpp (diff)
Commit d5c45041f1465f4ecc3828efbbb27aa7b4d23d89 by czhengsz
[machinesink] add testcase for more sinking - NFC
The file was addedllvm/test/CodeGen/PowerPC/sink-down-more-instructions.ll
Commit 69f2c79f2ad2c3ebdb000cb1311612db7bd2bef8 by zixuan.wu
[ELF] Add a new e_machine value EM_CSKY and add some CSKY relocation types

This is the split part of D86269, which add a new ELF machine flag called EM_CSKY and related relocations.
Some target-specific flags and tests for csky can be added in follow-up patches later.

Differential Revision: https://reviews.llvm.org/D86610
The file was addedllvm/include/llvm/BinaryFormat/ELFRelocs/CSKY.def
The file was modifiedllvm/include/llvm/BinaryFormat/ELF.h (diff)
The file was modifiedllvm/lib/Object/ELF.cpp (diff)
The file was modifiedllvm/lib/ObjectYAML/ELFYAML.cpp (diff)
The file was modifiedllvm/unittests/Object/ELFObjectFileTest.cpp (diff)
The file was modifiedllvm/include/llvm/Object/ELFObjectFile.h (diff)
Commit 9bee13f89085b08e4e8e24c51c11526fcef6efe1 by omair.javaid
Move targetHasSVE function to lldbtest.py

targetHasSVE helper function was added to test for availability of SVE support
by connected platform. We now intend to use this function in other testcases
and I am moving it to a generic location in lldbtest.py to allow usage by
other upcoming testcases.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D86872
The file was modifiedlldb/packages/Python/lldbsuite/test/lldbtest.py (diff)
The file was modifiedlldb/test/API/commands/register/register/aarch64_sve_registers/rw_access_static_config/TestSVERegisters.py (diff)
Commit 1fd7dc40748b17d8fc47ef1ebede9df61e973056 by dongaxis
When dumping results of StackLifetime, it will print the following
log:

BB  [7, 8): begin {}, end {}, livein {}, liveout {}
BB  [1, 2): begin {}, end {}, livein {}, liveout {}
...

But it is not convenient to know what the basic block is.
So I add the basic block name to it.

Reviewed By: vitalybuka
TestPlan: check-llvm
Differential Revision: https://reviews.llvm.org/D87152
The file was modifiedllvm/lib/Analysis/StackLifetime.cpp (diff)
Commit 76953321666617bcace6b067ebdde92dd9313a92 by omair.javaid
Move NativeRegisterContextLinux/RegisterContextPOSIX*_arm to RegisterInfoAndSetInterface

This patch removes register set definitions and other redundant code from
NativeRegisterContextLinux/RegisterContextPOSIX*_arm. Register sets are now
moved under RegisterInfosPOSIX_arm which now uses RegisterInfoAndSetInterface.
This is similar to what we earlier did for AArch64.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D86962
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/FreeBSD/RegisterContextPOSIXProcessMonitor_arm.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/elf-core/RegisterContextPOSIXCore_arm.h (diff)
The file was modifiedlldb/source/Plugins/Process/FreeBSD/FreeBSDThread.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_arm.h (diff)
The file was modifiedlldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_arm.h (diff)
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.h (diff)
The file was modifiedlldb/source/Plugins/Process/Utility/RegisterContextPOSIX_arm.cpp (diff)
The file was modifiedlldb/source/Plugins/Process/FreeBSD/RegisterContextPOSIXProcessMonitor_arm.h (diff)
The file was modifiedlldb/source/Plugins/Process/elf-core/ThreadElfCore.cpp (diff)
Commit 7403e3ee324018c79d0e55532240952dbaa4fcbe by stellaraccident
Extend PyConcreteType to support intermediate base classes.

* Resolves todos from D87091.
* Also modifies PyConcreteAttribute to follow suite (should be useful for ElementsAttr and friends).
* Adds a test to ensure that the ShapedType base class functions as expected.

Differential Revision: https://reviews.llvm.org/D87208
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp (diff)
The file was modifiedmlir/test/Bindings/Python/ir_types.py (diff)
Commit 70523ecfaca692bf5d0192e466c34ae7514624ea by brad
[Sparc] Select the UltraSPARC instruction set with the external assembler

Select the UltraSPARC instruction set with the external assembler on
Linux / FreeBSD / OpenBSD, matches GCC.
The file was modifiedclang/test/Driver/openbsd.c (diff)
The file was modifiedclang/test/Driver/linux-as.c (diff)
The file was modifiedclang/test/Driver/freebsd.c (diff)
The file was modifiedclang/lib/Driver/ToolChains/Arch/Sparc.cpp (diff)
Commit b3205e2ace4378600dedba0cc5a42b481c4e22c9 by sguelton
[scan-view] Explicitly use utf-8 in send_string

send_patched_file decodes with utf-8.
The default encoder for python 2 is ascii.

So it is necessary to also change send_string to use utf-8.

Differential Revision: https://reviews.llvm.org/D83984
The file was modifiedclang/tools/scan-view/share/ScanView.py (diff)
Commit 80186e4efc92aaa0c279846a438950c7bbe1e022 by raul.tambre
[CMake][TableGen] Simplify code by using list(TRANSFORM)

LLVM requires CMake 3.13.4 so now we can simplify the code.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D87193
The file was modifiedllvm/cmake/modules/TableGen.cmake (diff)
Commit 098130fa403a82f2a425761bbccdede022fac3ff by raul.tambre
[CMake][Polly] Remove dead CMake code

LLVM requires CMake 3.13.4 so remove code behind checks for an older version.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D87192
The file was modifiedpolly/cmake/polly_macros.cmake (diff)
The file was modifiedpolly/lib/External/CMakeLists.txt (diff)
Commit 21c0e74c9e7fa33153c484a6dabf33b38aede0d1 by raul.tambre
[CMake][OpenMP] Remove old dead CMake code

LLVM requires CMake 3.13.4 so remove code behind checks for an older version.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D87191
The file was modifiedopenmp/runtime/cmake/LibompCheckFortranFlag.cmake (diff)
The file was modifiedopenmp/cmake/OpenMPTesting.cmake (diff)
Commit f4835b94f2cfc89e430263d1807b118e0e937f4d by raul.tambre
[CMake][TableGen] Remove dead CMake version checks

LLVM requires CMake 3.13.4, so remove version checks that are dead code.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D87190
The file was modifiedllvm/cmake/modules/TableGen.cmake (diff)
Commit 04ea680a8ccc4f9a4d7333cd712333960348c35b by kbessonova
[cmake] Fix build of attribute plugin example on Windows

Seems '${cmake_2_8_12_PRIVATE}' was removed a long time ago, so it should
be just PRIVATE keyword here.

Reviewed By: john.brawn

Differential Revision: https://reviews.llvm.org/D86091
The file was modifiedclang/examples/Attribute/CMakeLists.txt (diff)
Commit 5350e1b5096aa4707aa525baf7398d93b4a4f1a5 by jay.foad
[KnownBits] Implement accurate unsigned and signed max and min

Use the new implementation in ValueTracking, SelectionDAG and
GlobalISel.

Differential Revision: https://reviews.llvm.org/D87034
The file was modifiedllvm/lib/Analysis/ValueTracking.cpp (diff)
The file was modifiedllvm/include/llvm/Support/KnownBits.h (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp (diff)
The file was modifiedllvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp (diff)
The file was modifiedllvm/lib/Support/KnownBits.cpp (diff)
The file was modifiedllvm/unittests/Support/KnownBitsTest.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
Commit a98b126696ef8edc42d193d2e03048cd0d61ebc2 by Raphael Isemann
Add BinaryFormat/ELFRelocs/CSKY.def to LLVM modulemap
The file was modifiedllvm/include/llvm/module.modulemap (diff)
Commit 40f4131fce787fe7a8596f06cef5fb6a06bf5ded by Xing
[DWARFYAML] Make the debug_addr section optional.

This patch makes the debug_addr section optional. When an empty
debug_addr section is specified, yaml2obj only emits a section header
for it.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D87205
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h (diff)
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-addr.yaml (diff)
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp (diff)
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp (diff)
Commit 0af4147804aa0aa906a2ac913fe5639639afb9bb by sam.parker
[ARM][CostModel] CodeSize costs for i1 arith ops

When optimising for size, make the cost of i1 logical operations
relatively expensive so that optimisations don't try to combine
predicates.

Differential Revision: https://reviews.llvm.org/D86525
The file was modifiedllvm/test/Analysis/CostModel/ARM/arith.ll (diff)
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp (diff)
Commit 713c2ad60c137a88c0a64cc98f2db4be702a25e9 by jay.foad
[GlobalISel] Extend not_cmp_fold to work on conditional expressions

Differential Revision: https://reviews.llvm.org/D86709
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-invert-cmp.mir (diff)
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (diff)
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td (diff)
Commit 65f78e73ad574bb73bb625c787850acd261ba53a by sam.parker
[SimplifyCFG] Consider cost of combining predicates.

Modify FoldBranchToCommonDest to consider the cost of inserting
instructions when attempting to combine predicates to fold blocks.
The threshold can be controlled via a new option:
-simplifycfg-branch-fold-threshold which defaults to '2' to allow
the insertion of a not and another logical operator.

Differential Revision: https://reviews.llvm.org/D86526
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp (diff)
The file was modifiedllvm/include/llvm/Transforms/Utils/Local.h (diff)
The file was modifiedllvm/test/Transforms/SimplifyCFG/ARM/branch-fold-threshold.ll (diff)
Commit e7bd058c7e2cb2c675a4b78ec770ea725bff8c64 by Alexander.Richardson
[clang-format] Allow configuring list of macros that map to attributes

This adds a `AttributeMacros` configuration option that causes certain
identifiers to be parsed like a __attribute__((foo)) annotation.
This is motivated by our CHERI C/C++ fork which adds a __capability
qualifier for pointer/reference. Without this change clang-format parses
many type declarations as multiplications/bitwise-and instead.
I initially considered adding "__capability" as a new clang-format keyword,
but having a list of macros that should be treated as attributes is more
flexible since it can be used e.g. for static analyzer annotations or other language
extensions.

Example: std::vector<foo * __capability> -> std::vector<foo *__capability>

Depends on D86775 (to apply cleanly)

Reviewed By: MyDeveloperDay, jrtc27

Differential Revision: https://reviews.llvm.org/D86782
The file was modifiedclang/lib/Format/FormatToken.h (diff)
The file was modifiedclang/lib/Format/Format.cpp (diff)
The file was modifiedclang/lib/Format/TokenAnnotator.cpp (diff)
The file was modifiedclang/docs/ClangFormatStyleOptions.rst (diff)
The file was modifiedclang/lib/Format/FormatTokenLexer.cpp (diff)
The file was modifiedclang/unittests/Format/FormatTest.cpp (diff)
The file was modifiedclang/include/clang/Format/Format.h (diff)
Commit 8aa3b8da5db2ae73bf536b630915eb9f0ddc15cb by Alexander.Richardson
[clang-format] Handle typename macros inside cast expressions

Before: x = (STACK_OF(uint64_t)) & a;
After:  x = (STACK_OF(uint64_t))&a;

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D86930
The file was modifiedclang/lib/Format/FormatToken.h (diff)
The file was modifiedclang/unittests/Format/FormatTest.cpp (diff)
The file was modifiedclang/lib/Format/TokenAnnotator.cpp (diff)
Commit cd01eec14bc045a8616604cadf94dba025090ba5 by Alexander.Richardson
[clang-format] Check that */& after typename macros are pointers/references

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D86950
The file was modifiedclang/unittests/Format/FormatTest.cpp (diff)
Commit 56fa7d1dc6a8d23111ff84171036f333cf9cddf2 by Alexander.Richardson
[clang-format] Fix formatting of _Atomic() qualifier

Before: _Atomic(uint64_t) * a;
After: _Atomic(uint64_t) *a;

This treats _Atomic the same as the the TypenameMacros and decltype. It
also allows some cleanup by removing checks whether the token before a
paren is kw_decltype and instead checking for TT_TypeDeclarationParen.
While touching this code also extend the decltype test cases to also check
for typeof() and _Atomic(T).

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D86959
The file was modifiedclang/lib/Format/FormatToken.h (diff)
The file was modifiedclang/unittests/Format/FormatTest.cpp (diff)
The file was modifiedclang/lib/Format/FormatToken.cpp (diff)
The file was modifiedclang/lib/Format/TokenAnnotator.cpp (diff)
Commit 9a22eba15091ea849fa78c09ac4c9f7260071790 by Alexander.Richardson
[clang-format] Parse __underlying_type(T) as a type

Before: MACRO(__underlying_type(A) * a);
After:  MACRO(__underlying_type(A) *a);

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D86960
The file was modifiedclang/unittests/Format/FormatTest.cpp (diff)
The file was modifiedclang/lib/Format/TokenAnnotator.cpp (diff)
The file was modifiedclang/lib/Format/FormatToken.h (diff)
Commit 05147d33091720e2df929d6fea3b0fd2a657ac61 by Alexander.Richardson
[clang-format] Correctly parse function declarations with TypenameMacros

When using the always break after return type setting:
Before:
SomeType funcdecl(LIST(uint64_t));
After:
SomeType
funcdecl(LIST(uint64_t));"

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D87007
The file was modifiedclang/unittests/Format/FormatTest.cpp (diff)
The file was modifiedclang/lib/Format/TokenAnnotator.cpp (diff)
Commit 7634c64b6121ba61a6c72c6b45e3561ad8cf345e by Pushpinder.Singh
[OpenMP][AMDGPU] Use DS_Max_Warp_Number instead of WARPSIZE

The size of worker_rootS should have been DS_Max_Warp_Number.
This reduces memory usage by deviceRTL on AMDGPU from around 2.3GB
to around 770MB.

Reviewed By: JonChesterfield, jdoerfert

Differential Revision: https://reviews.llvm.org/D87084
The file was modifiedopenmp/libomptarget/deviceRTLs/common/omptarget.h (diff)
The file was modifiedopenmp/libomptarget/deviceRTLs/common/src/data_sharing.cu (diff)
Commit 8d64df9f139038b48344dd9f1f20a38b22aba8c9 by ntv
[mlir][Vector] Revisit VectorToSCF.

Vector to SCF conversion still had issues due to the interaction with the natural alignment derived by the LLVM data layout. One traditional workaround is to allocate aligned. However, this does not always work for vector sizes that are non-powers of 2.

This revision implements a more portable mechanism where the intermediate allocation is always a memref of elemental vector type. AllocOp is extended to use the natural LLVM DataLayout alignment for non-scalar types, when the alignment is not specified in the first place.

An integration test is added that exercises the transfer to scf.for + scalar lowering with a 5x5 transposition.

Differential Revision: https://reviews.llvm.org/D87150
The file was modifiedmlir/lib/Conversion/VectorToSCF/VectorToSCF.cpp (diff)
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp (diff)
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp (diff)
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-transfer-to-loops.mlir
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td (diff)
The file was modifiedmlir/test/Conversion/VectorToSCF/vector-to-loops.mlir (diff)
The file was modifiedmlir/test/EDSC/builder-api-test.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/Vector/EDSC/Intrinsics.h (diff)
The file was modifiedmlir/test/Conversion/StandardToLLVM/convert-static-memref-ops.mlir (diff)
Commit 81aa66f65f504af18982baa078a5f3f7d2aa88fa by ecaldas
Extract infrastructure to ignore intermediate expressions into `clang/AST/IgnoreExpr.h`

Rationale:
This allows users to use `IgnoreExprNodes` and `Ignore*SingleStep` outside of
`clang/AST/Expr.cpp`.

Minor:
Rename `IgnoreImp...SingleStep`  into `IgnoreImplicit...SingleStep`.

Differential Revision: https://reviews.llvm.org/D86778
The file was modifiedclang/lib/AST/Expr.cpp (diff)
The file was addedclang/lib/AST/IgnoreExpr.cpp
The file was addedclang/include/clang/AST/IgnoreExpr.h
The file was modifiedclang/lib/AST/CMakeLists.txt (diff)
Commit 1a7a2cd7474e6d321120ffe7ca9c52163eb228f0 by ecaldas
[Ignore Expressions][NFC] Refactor to better use `IgnoreExpr.h` and nits

This change groups
* Rename: `ignoreParenBaseCasts` -> `IgnoreParenBaseCasts` for uniformity
* Rename: `IgnoreConversionOperator` -> `IgnoreConversionOperatorSingleStep` for uniformity
* Inline `IgnoreNoopCastsSingleStep` into a lambda inside `IgnoreNoopCasts`
* Refactor `IgnoreUnlessSpelledInSource` to make adequate use of `IgnoreExprNodes`

Differential Revision: https://reviews.llvm.org/D86880
The file was modifiedclang-tools-extra/clang-tidy/readability/SimplifyBooleanExprCheck.cpp (diff)
The file was modifiedclang-tools-extra/clang-tidy/modernize/UseAutoCheck.cpp (diff)
The file was modifiedclang/lib/CodeGen/CGExprCXX.cpp (diff)
The file was modifiedclang/include/clang/AST/Expr.h (diff)
The file was modifiedclang/lib/Sema/SemaExpr.cpp (diff)
The file was modifiedclang/lib/StaticAnalyzer/Core/CallEvent.cpp (diff)
The file was modifiedclang/lib/AST/Expr.cpp (diff)
Commit 0dbe2504af81fc8ac7438d490b98370740442805 by llvm-dev
[X86] Use Register instead of unsigned. NFCI.

Fixes llvm-prefer-register-over-unsigned clang-tidy warning.
The file was modifiedllvm/lib/Target/X86/X86AsmPrinter.cpp (diff)
Commit 22fa6b20d92efe796ad881aafe6e689960fe6e7d by llvm-dev
[X86] Use Register instead of unsigned. NFCI.

Fixes llvm-prefer-register-over-unsigned clang-tidy warnings.
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp (diff)
Commit ee68b66d94b50d8c9ff14d3217a77c66b0e2c32f by esme.yi
[NFC][PowerPC] Add tests for `mul` with big constants.
The file was addedllvm/test/CodeGen/PowerPC/mulli.ll
Commit 9ad261540da6e66a666e48fed95455bc27fa995b by llvm-dev
[X86] Use Register instead of unsigned. NFCI.

Fixes llvm-prefer-register-over-unsigned clang-tidy warnings.
The file was modifiedllvm/lib/Target/X86/X86InstrInfo.cpp (diff)
Commit aa3fcb967110f2d448d241358cadc048954e6134 by llvm-dev
[X86][AVX] Add extra vperm2f128+vpermilvar combine coverage

The existing test /should/ reduce to a vmovaps (concat xmm with zero upper).
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll (diff)
Commit 71dfdbe2c73afcc319bfd96c9e73407ea9245e3a by llvm-dev
[X86] getFauxShuffleMask - handle insert_subvector(zero, sub, C)

Directly use SM_SentinelZero elements if we're (widening)inserting into a zero vector.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll (diff)
Commit 7ba0f81934ca5f4baa1d81ac0032f2e4ff6614ec by benny.kra
[X86] Unbreak the build after 22fa6b20d92e
The file was modifiedllvm/lib/Target/X86/X86FrameLowering.cpp (diff)
Commit 56d1f3138b532f4e195a5aaba9ea65a8bcb8adb4 by llvmgnsyncbot
[gn build] Port 81aa66f65f5
The file was modifiedllvm/utils/gn/secondary/clang/lib/AST/BUILD.gn (diff)
Commit 0478720157f6413fad7595b8eff9c70d2d99b637 by Raphael Isemann
[clang] Prevent that Decl::dump on a CXXRecordDecl deserialises further declarations.

Decl::dump is primarily used for debugging to visualise the current state of a
declaration. Usually Decl::dump just displays the current state of the Decl and
doesn't actually change any of its state, however since commit
457226e02a6e8533eaaa864a3fd7c8eeccd2bf58 the method actually started loading
additional declarations from the ExternalASTSource. This causes that calling
Decl::dump during a debugging session now actually does permanent changes to the
AST and will cause the debugged program run to deviate from the original run.

The change that caused this behaviour is the addition of
`hasConstexprDestructor` (which is called from the TextNodeDumper) which
performs a lookup into the current CXXRecordDecl to find the destructor. All
other similar methods just return their respective bit in the DefinitionData
(which obviously doesn't have such side effects).

This just changes the node printer to emit "unknown_constexpr" in case a
CXXRecordDecl is dumped that could potentially call into the ExternalASTSource
instead of the usually empty string/"constexpr". For CXXRecordDecls that can
safely be dumped the old behaviour is preserved

Reviewed By: bruno

Differential Revision: https://reviews.llvm.org/D80878
The file was modifiedclang/lib/AST/TextNodeDumper.cpp (diff)
The file was modifiedclang/test/AST/ast-dump-records.cpp (diff)
The file was addedclang/unittests/AST/ASTDumpTest.cpp
The file was modifiedclang/test/AST/ast-dump-lambda.cpp (diff)
The file was modifiedclang/unittests/AST/CMakeLists.txt (diff)
Commit 9764eb9212c598f165e9d7dfeb273b74f7777a41 by llvmgnsyncbot
[gn build] Port 0478720157f
The file was modifiedllvm/utils/gn/secondary/clang/unittests/AST/BUILD.gn (diff)
Commit 928c4b4b4988b4d633a96afa4c7f4584bc0009e5 by sam.parker
[SCEV] Refactor isHighCostExpansionHelper

To enable the cost of constants, the helper function has been
reorganised:
- A struct has been introduced to hold SCEV operand information so
  that we know the user of the operand, as well as the operand index.
  The Worklist now uses instead instead of a bare SCEV.
- The costing of each SCEV, and collection of its operands, is now
  performed in a helper function.

Differential Revision: https://reviews.llvm.org/D86050
The file was modifiedllvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h (diff)
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp (diff)
Commit 136eb79a8846c4e8ff6ba5ccfc0c470ab351fb13 by frgossen
[MLIR][Standard] Add `dynamic_tensor_from_elements` operation

With `dynamic_tensor_from_elements` tensor values of dynamic size can be
created. The body of the operation essentially maps the index space to tensor
elements.

Declare SCF operations in the `scf` namespace to avoid name clash with the new
`std.yield` operation. Resolve ambiguities between `linalg/shape/std/scf.yield`
operations.

Differential Revision: https://reviews.llvm.org/D86276
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Vectorization.cpp (diff)
The file was modifiedmlir/test/Dialect/Standard/invalid.mlir (diff)
The file was modifiedmlir/test/Dialect/Standard/ops.mlir (diff)
The file was modifiedmlir/lib/Dialect/StandardOps/IR/Ops.cpp (diff)
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Loops.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/SCF/SCFOps.td (diff)
The file was modifiedmlir/lib/Dialect/SCF/SCF.cpp (diff)
The file was modifiedmlir/lib/Conversion/LinalgToLLVM/LinalgToLLVM.cpp (diff)
The file was modifiedmlir/lib/Dialect/Shape/IR/Shape.cpp (diff)
The file was modifiedmlir/lib/Dialect/Shape/Transforms/ShapeToShapeLowering.cpp (diff)
The file was modifiedmlir/lib/Conversion/SCFToStandard/SCFToStandard.cpp (diff)
Commit 3097427f93dde9a49f729e995b8d52d91cc30d4c by Xing
[obj2yaml] Add support for dumping the .debug_str section.

This patch adds support for dumping the .debug_str section to obj2yaml.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D86867
The file was modifiedllvm/tools/obj2yaml/elf2yaml.cpp (diff)
The file was addedllvm/test/tools/obj2yaml/ELF/DWARF/debug-str.yaml
Commit 9b645ebfff168fcf3cf29b21f49762a04d8ceb37 by llvm-dev
[X86][AVX] Use lowerShuffleWithPERMV in shuffle combining to support non-VLX targets

lowerShuffleWithPERMV allows us to use the ZMM variants for 128/256-bit variable shuffles on non-VLX AVX512 targets.

This is another step towards shuffle combining through between vector widths - we still end up with an annoying regression (combine_vpermilvar_vperm2f128_zero_8f32) but we're going in the right direction....
The file was modifiedllvm/test/CodeGen/X86/shuffle-strided-with-offset-256.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-512-v16.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx2.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-zext.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/insertelement-ones.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-combining-avx.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/shuffle-strided-with-offset-512.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-shuffle-avx512.ll (diff)
Commit 5bb27e735d3ba561b93a12e07d79cd88a5bff338 by llvm-dev
X86AvoidStoreForwardingBlocks.cpp - use unsigned for Opcode values. NFCI.

Fixes clang-tidy cppcoreguidelines-narrowing-conversions warnings.
The file was modifiedllvm/lib/Target/X86/X86AvoidStoreForwardingBlocks.cpp (diff)
Commit 3a86eb03d54ef80cf498d9473a1c735c93cdfa66 by grimar
[llvm-readobj/elf] - Introduce Relocation<ELFT> helper.

It removes templating for Elf_Rel[a] handling that we
introduced earlier and introduces a helper class instead.

It was briefly discussed in D87087, which showed,
why having templates is probably not ideal for the generalization
of dumpers code.

Differential revision: https://reviews.llvm.org/D87141
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp (diff)
Commit e57cbcbdc18adcadc6c97ff4f3f81b0f4b81c698 by llvm-dev
LegalizeTypes.h - remove orphan SplitVSETCC declaration. NFCI.

The implementation no longer exists
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h (diff)
Commit 15acdd75439b402e993ebe0dbf8eb02e9b88bbdc by frgossen
[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.

Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.

See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12

Differential Revision: https://reviews.llvm.org/D86779
The file was removedmlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp
The file was modifiedmlir/include/mlir/Conversion/Passes.h (diff)
The file was removedmlir/lib/Conversion/ShapeToSCF/CMakeLists.txt
The file was modifiedmlir/include/mlir/Conversion/Passes.td (diff)
The file was removedmlir/include/mlir/Conversion/ShapeToSCF/ShapeToSCF.h
The file was removedmlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp (diff)
The file was modifiedmlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir (diff)
Commit 1c849ec40a53ca017a668b957fef333e560b0886 by ntv
[MLIR] Fix Win test due to partial order of CHECK directives

Differential Revision: https://reviews.llvm.org/D87230
The file was modifiedmlir/test/Conversion/VectorToSCF/vector-to-loops.mlir (diff)
Commit 3ca8b9a560a249a18b9f6092b96aa7e8e52db5cf by spatel
[InstCombine] give a name to an intermediate value for easier tracking; NFC

As noted in PR47430, we probably want to conditionally include 'nsw'
here anyway, so we are going to need to fill out the optional args.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp (diff)
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll (diff)
Commit 28aa60aae25b7e46804deae909b29b66c1b41d95 by spatel
[InstCombine] add test with more unreachable insts; NFC

Goes with D87149
The file was modifiedllvm/test/Transforms/InstCombine/assume.ll (diff)
Commit 79ea83e104e368ef0f520f1bfa74c15d91baef93 by simon.wallis2
[SelectionDAG] memcpy expansion of const volatile struct ignores const zero

In getMemcpyLoadsAndStores(), a memcpy where the source is a zero constant is expanded to a MemOp::Set instead of a MemOp::Copy, even when the memcpy is volatile.
This is incorrect.

The fix is to add a check for volatile, and expand to MemOp::Copy in the volatile case.

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D87134
The file was addedllvm/test/CodeGen/ARM/memcpy-const-vol-struct.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp (diff)
Commit a8a91533dd65041ced68ed5b9348b5d023837488 by llvm-dev
[X86] Replace EmitX86AddSubSatExpr with EmitX86BinaryIntrinsic generic helper. NFCI.

Feed the Intrinsic::ID value directly instead of via the IsSigned/IsAddition bool flags.
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
Commit 6670f5d1e66563ad482576d9db4b8393539ab53b by llvm-dev
MachineStableHash.h - remove MachineInstr.h include. NFC.

Use forward declarations and move the include to MachineStableHash.cpp
The file was modifiedllvm/lib/CodeGen/MachineStableHash.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/MachineStableHash.h (diff)
Commit dbb81881955d641bc873442e75874a5cb160f4ee by grimar
[llvm-readobj/elf] - Generalize the code for printing dynamic relocations. NFCI.

Currently we have 2 large `printDynamicRelocations` methods that
have a very similar code for GNU/LLVM styles.

This patch removes the duplication and renames them to `printDynamicReloc`
for consistency.

Differential revision: https://reviews.llvm.org/D87087
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp (diff)
Commit 973800dc7cbe28a98030293e77afa8ea0343c37d by david.truby
Revert "[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings."

This reverts commit 15acdd75439b402e993ebe0dbf8eb02e9b88bbdc.
The file was modifiedmlir/include/mlir/Conversion/Passes.td (diff)
The file was addedmlir/lib/Conversion/ShapeToSCF/CMakeLists.txt
The file was addedmlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp (diff)
The file was modifiedmlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir (diff)
The file was modifiedmlir/include/mlir/Conversion/Passes.h (diff)
The file was addedmlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir
The file was addedmlir/include/mlir/Conversion/ShapeToSCF/ShapeToSCF.h
Commit 23f700c785a141355fa6d022552aafc73135bf5d by Raphael Isemann
Revert "[clang] Prevent that Decl::dump on a CXXRecordDecl deserialises further declarations."

This reverts commit 0478720157f6413fad7595b8eff9c70d2d99b637. This probably
doesn't work when forcing deserialising while dumping (which the ASTDumper
optionally supports).
The file was modifiedclang/test/AST/ast-dump-lambda.cpp (diff)
The file was modifiedclang/unittests/AST/CMakeLists.txt (diff)
The file was modifiedclang/lib/AST/TextNodeDumper.cpp (diff)
The file was modifiedclang/test/AST/ast-dump-records.cpp (diff)
The file was removedclang/unittests/AST/ASTDumpTest.cpp
Commit bb73fcfd0708d8f145060afa461d96f98f0e5f27 by llvmgnsyncbot
[gn build] Port 23f700c785a
The file was modifiedllvm/utils/gn/secondary/clang/unittests/AST/BUILD.gn (diff)
Commit 2853ae3c1b8174e3660424ffac45922601f700ee by llvm-dev
[X86] Update SSE/AVX ABS intrinsics to emit llvm.abs.* (PR46851)

We're now getting close to having the necessary analysis/combines etc. for the new generic llvm.abs.* intrinsics.

This patch updates the SSE/AVX ABS vector intrinsics to emit the generic equivalents instead of the icmp+sub+select code pattern.

Differential Revision: https://reviews.llvm.org/D87101
The file was modifiedllvm/test/CodeGen/X86/avx2-intrinsics-fast-isel.ll (diff)
The file was modifiedclang/test/CodeGen/avx512bw-builtins.c (diff)
The file was modifiedclang/test/CodeGen/ssse3-builtins.c (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedclang/test/CodeGen/avx512f-builtins.c (diff)
The file was modifiedllvm/test/CodeGen/X86/ssse3-intrinsics-fast-isel.ll (diff)
The file was modifiedclang/test/CodeGen/avx2-builtins.c (diff)
The file was modifiedclang/test/CodeGen/avx512vlbw-builtins.c (diff)
The file was modifiedclang/test/CodeGen/avx512vl-builtins.c (diff)
Commit f6db681a78994dd7eb7da62da73754d1321085b3 by llvm-dev
[X86][SSE] Move llvm.x86.ssse3.pabs.*.128 intrinsics to ssse3-intrinsics-x86-upgrade.ll

These have been auto upgraded for some time so this is just a tidyup.
The file was addedllvm/test/CodeGen/X86/ssse3-intrinsics-x86-upgrade.ll
The file was modifiedllvm/test/CodeGen/X86/ssse3-intrinsics-x86.ll (diff)
Commit 6b954f1b79605e4139157ce064fe695c86a0f06a by raul.tambre
[KillTheDoctor/CMake] Add missing keyword PRIVATE in target_link_libraries

Add PRIVATE keyword in target_link_libraries to prevent CMake Error on Windows.

While trying to compile llvm/clang on Windows, the following CMake error occurred. The reason is a missing PUBLIC/PRIVATE/INTERFACE keyword in target_link_libraries.

`
CMake Error at utils/KillTheDoctor/CMakeLists.txt:5 (target_link_libraries):
  The keyword signature for target_link_libraries has already been used with
  the target "KillTheDoctor".  All uses of target_link_libraries with a
  target must be either all-keyword or all-plain.

  The uses of the keyword signature are here:

   * cmake/modules/AddLLVM.cmake:771 (target_link_libraries)
`

Reviewed By: tambre

Differential Revision: https://reviews.llvm.org/D87203
The file was modifiedllvm/utils/KillTheDoctor/CMakeLists.txt (diff)
Commit 4368739941eb1336197dde0e92eb23ce79739ac7 by grimar
[llvm-readobj] - Remove code duplication when printing dynamic relocations. NFCI.

LLVM style code can be simplified to avoid the duplication of logic
related to printing dynamic relocations.

Differential revision: https://reviews.llvm.org/D87089
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp (diff)
Commit a5046f7acece0085cb6f457da7ebca34d267155a by esme.yi
[NFC][PowerPC] Add tests in constants-i64.ll.
The file was modifiedllvm/test/CodeGen/PowerPC/constants-i64.ll (diff)
Commit 1e1a4a481987f77fe3e6debc015c1d07af249258 by zinenko
[mlir] Take ValueRange instead of ArrayRef<Value> in StructuredIndexed

This was likely overlooked when ValueRange was first introduced. There is no
reason why StructuredIndexed needs specifically an ArrayRef so use ValueRange
for better type compatibility with the rest of the APIs.

Reviewed By: nicolasvasilache, mehdi_amini

Differential Revision: https://reviews.llvm.org/D87127
The file was modifiedmlir/include/mlir/EDSC/Builders.h (diff)
Commit 4b530f75199d9b5e7ee1f4e86e1513a83b4b86cb by llvm-dev
[X86][SSE] Use llvm.abs.* vector intrinsics instead of old (deprecated) SSE/AVX intrinsics for combine tests

This also allows us to extend testing to SSE2+ targets
The file was modifiedllvm/test/CodeGen/X86/combine-abs.ll (diff)
Commit 96e0f34be797ab8bb80526367009495a7eb2118f by llvm-dev
[X86] Auto upgrade SSE/AVX PABS intrinsics to generic Intrinsic::abs

Minor followup to D87101, we were expanding this to a neg+icmp+select pattern like we were in CGBuiltin
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp (diff)
Commit 288c582fc93956a7464a988a77c9f6d0f79ed65d by sjoerd.meijer
Follow up of rG5f1cad4d296a, slightly reduced test case. NFC.
The file was modifiedllvm/test/CodeGen/ARM/pr45824.ll (diff)
Commit a70f2eb3e39a42a71ba077247f9deafbdf1e8092 by frgossen
[MLIR][Shape] Merge `shape` to `std`/`scf` lowerings.

Merge the two lowering passes because they are not useful by themselves. The new
pass lowers to `std` and `scf` is considered an auxiliary dialect.

See also
https://llvm.discourse.group/t/conversions-with-multiple-target-dialects/1541/12

Differential Revision: https://reviews.llvm.org/D86779
The file was modifiedmlir/test/Conversion/ShapeToStandard/shape-to-standard.mlir (diff)
The file was removedmlir/include/mlir/Conversion/ShapeToSCF/ShapeToSCF.h
The file was modifiedmlir/lib/Conversion/ShapeToStandard/ShapeToStandard.cpp (diff)
The file was modifiedmlir/include/mlir/Conversion/Passes.h (diff)
The file was removedmlir/lib/Conversion/ShapeToSCF/ShapeToSCF.cpp
The file was removedmlir/test/Conversion/ShapeToSCF/shape-to-scf.mlir
The file was modifiedmlir/include/mlir/Conversion/Passes.td (diff)
The file was modifiedmlir/lib/Conversion/CMakeLists.txt (diff)
The file was removedmlir/lib/Conversion/ShapeToSCF/CMakeLists.txt
Commit b22910daab95be1ebc6ab8a74190e38130b0e6ef by spatel
[InstCombine] erase instructions leading up to unreachable

Normal dead code elimination ignores assume intrinsics, so we fail to
delete assumes that are not meaningful (and potentially worse if they
cause conflicts with other assumptions).

The motivating example in https://llvm.org/PR47416 suggests that we
might have problems upstream from here (difference between C and C++),
but this should be a cheap way to make sure we remove more dead code.

Differential Revision: https://reviews.llvm.org/D87149
The file was modifiedllvm/lib/Transforms/InstCombine/InstructionCombining.cpp (diff)
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineInternal.h (diff)
The file was modifiedllvm/test/Transforms/InstCombine/assume.ll (diff)
The file was modifiedllvm/test/Transforms/InstCombine/pr33689_same_bitwidth.ll (diff)
Commit 60162626a5c963125a2e7012b621c7ba0b57855e by llvm-dev
[X86] Replace UpgradeX86AddSubSatIntrinsics with UpgradeX86BinaryIntrinsics generic helper. NFCI.

Feed the Intrinsic::ID value directly instead of via the IsSigned/IsAddition bool flags.
The file was modifiedllvm/lib/IR/AutoUpgrade.cpp (diff)
Commit 7993431dad064d03244f32c9585325b891f3e807 by llvm-dev
[X86][SSE] Add test cases for PR47448
The file was modifiedllvm/test/CodeGen/X86/vector-unsigned-cmp.ll (diff)
Commit 9de0a3da6a76030f96a2d6793ca4f094fa538db5 by llvm-dev
[X86][SSE] Don't use LowerVSETCCWithSUBUS for unsigned compare with +ve operands (PR47448)

We already simplify the unsigned comparisons if we've found the operands are non-negative, but we were still calling LowerVSETCCWithSUBUS which resulted in the PR47448 regressions.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/vector-unsigned-cmp.ll (diff)
Commit c4056f842827db97e9861ae92360202aa0863199 by llvm-dev
[Sparc] Add reduced funnel shift test case for PR47303
The file was addedllvm/test/CodeGen/SPARC/fshl.ll
Commit 783d7116dc8b739263125c607ec034f9d580291e by llvm-dev
AntiDepBreaker.h - remove unnecessary ScheduleDAG.h include. NFCI.
The file was modifiedllvm/include/llvm/CodeGen/AntiDepBreaker.h (diff)
Commit 2e1827271cb1c090cced7369282f9edcf9e59183 by richard.barton
[flang] Fix link to old repo location in doxygen mainpage. NFC.
The file was modifiedflang/docs/doxygen-mainpage.dox (diff)
Commit d01280587d97eb02d37da37666afd3e4d57c9336 by gabor.marton
[analyzer][StdLibraryFunctionsChecker] Add POSIX pthread handling functions

Differential Revision: https://reviews.llvm.org/D84415
The file was modifiedclang/lib/StaticAnalyzer/Checkers/StdLibraryFunctionsChecker.cpp (diff)
The file was modifiedclang/test/Analysis/std-c-library-functions-POSIX.c (diff)
Commit 7e5dab5fca4b154f12d3a313a6bdbd507f2314be by richard.barton
[flang] Spelling and format edits to README.txt. NFC.
The file was modifiedflang/README.md (diff)
Commit 8248c2af94975912b14e7e0cb414fcbb82c77123 by gabor.marton
[analyzer][StdLibraryFunctionsChecker] Have proper weak dependencies

We want the generice StdLibraryFunctionsChecker to report only if there
are no specific checkers that would handle the argument constraint for a
function.

Note, the assumptions are still evaluated, even if the arguement
constraint checker is set to not report. This means that the assumptions
made in the generic StdLibraryFunctionsChecker should be an
over-approximation of the assumptions made in the specific checkers. But
most importantly, the assumptions should not contradict.

Differential Revision: https://reviews.llvm.org/D87240
The file was modifiedclang/test/Analysis/analyzer-enabled-checkers.c (diff)
The file was modifiedclang/include/clang/StaticAnalyzer/Checkers/Checkers.td (diff)
The file was addedclang/test/Analysis/std-c-library-functions-arg-enabled-checkers.c
The file was addedclang/test/Analysis/std-c-library-functions-arg-weakdeps.c
Commit eb482afaf5bbf3abf9d02c3810e418945c68a936 by momchil.velikov
Reduce the number of memory allocations when displaying
a warning about clobbering reserved registers (NFC).

Also address some minor inefficiencies and style issues.

Differential Revision: https://reviews.llvm.org/D86088
The file was modifiedllvm/lib/CodeGen/AsmPrinter/AsmPrinterInlineAsm.cpp (diff)
Commit 2480a31e5d69a5c2e8e900be3a7f706d77f5a5cc by Alexander Timofeev
[AMDGPU] SILowerControlFlow::optimizeEndCF should remove empty basic block

optimizeEndCF removes EXEC restoring instruction case this instruction is the only one except the branch to the single successor and that successor contains EXEC mask restoring instruction that was lowered from END_CF belonging to IF_ELSE.
As a result of such optimization we get the basic block with the only one instruction that is a branch to the single successor.
In case the control flow can reach such an empty block from S_CBRANCH_EXEZ/EXECNZ it might happen that spill/reload instructions that were inserted later by register allocator are placed under exec == 0 condition and never execute.
Removing empty block solves the problem.

This change require further work to re-implement LIS updates. Recently, LIS is always nullptr in this pass. To enable it we need another patch to fix many places across the codegen.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D86634
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/collapse-endcf.mir (diff)
Commit 11d8eedfa5b796a9ba0276a5e4bad8b9e549f0b6 by spatel
[InstCombine] move/add tests for icmp with mul operands; NFC
The file was modifiedllvm/test/Transforms/InstCombine/icmp-mul.ll (diff)
The file was modifiedllvm/test/Transforms/InstCombine/icmp.ll (diff)
Commit 7a6d6f0f7046f6ebcbf06eaf8f996d991a90e440 by spatel
[InstCombine] improve folds for icmp with multiply operands (PR47432)

Check for no overflow along with an odd constant before
we lose information by converting to bitwise logic.

https://rise4fun.com/Alive/2Xl

  Pre: C1 != 0
  %mx = mul nsw i8 %x, C1
  %my = mul nsw i8 %y, C1
  %r = icmp eq i8 %mx, %my
  =>
  %r = icmp eq i8 %x, %y

  Name: nuw ne
  Pre: C1 != 0
  %mx = mul nuw i8 %x, C1
  %my = mul nuw i8 %y, C1
  %r = icmp ne i8 %mx, %my
  =>
  %r = icmp ne i8 %x, %y

  Name: odd ne
  Pre: C1 % 2 != 0
  %mx = mul i8 %x, C1
  %my = mul i8 %y, C1
  %r = icmp ne i8 %mx, %my
  =>
  %r = icmp ne i8 %x, %y
The file was modifiedllvm/test/Transforms/InstCombine/icmp-mul.ll (diff)
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineCompares.cpp (diff)
Commit 1c34ac03a2de0e10f95f16526296dcae5166d129 by llvm-dev
LeonPasses.h - remove orphan function declarations. NFCI.

The implementations no longer exist.
The file was modifiedllvm/lib/Target/Sparc/LeonPasses.h (diff)
Commit dfc333050b544173741b66f27872cebb2b7ab983 by llvm-dev
LeonPasses.h - remove unnecessary includes. NFCI.

Reduce to forward declarations and move includes to LeonPasses.cpp where necessary.
The file was modifiedllvm/lib/Target/Sparc/LeonPasses.cpp (diff)
The file was modifiedllvm/lib/Target/Sparc/LeonPasses.h (diff)
Commit 95ca3aacf0f82955e9d259484b886c260337285c by llvm-dev
BTFDebug.h - reduce MachineInstr.h include to forward declaration. NFCI.
The file was modifiedllvm/lib/Target/BPF/BTFDebug.h (diff)
Commit 4e89a0ab02148c71d5be076e0d7262e93010006b by llvm-dev
MipsISelLowering.h - remove CCState/CCValAssign forward declarations. NFCI.

These are already defined in the CallingConvLower.h include.
The file was modifiedllvm/lib/Target/Mips/MipsISelLowering.h (diff)
Commit 5ea9e655efdd1188d9864a6c97a7a9b772559ff5 by llvm-dev
VPlan.h - remove unnecessary forward declarations. NFCI.

Already defined in includes.
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h (diff)
Commit e52e7ad54defa3a95040b680beff2824c9c6fbb7 by epastor
[ms] [llvm-ml] Add support for bitwise named operators (AND, NOT, OR) in MASM

Add support for expressions of the form '1 or 2', etc.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86944
The file was addedllvm/test/tools/llvm-ml/named_bitwise_operators.test
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
Commit 2feb6e9b8418b29c002bc830a3e2fdcbe9e39449 by epastor
[ms] [llvm-ml] Fix STRUCT field alignment

MASM aligns fields to the _minimum_ of the STRUCT alignment value and the size of the next field.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86945
The file was modifiedllvm/test/tools/llvm-ml/struct.test (diff)
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
Commit a3ec4a3158f3a60c16ac1e3550667866fe1d4171 by epastor
[ms] [llvm-ml] Allow use of locally-defined variables in expressions

MASM allows variables defined by equate statements to be used in expressions.

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D86946
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
The file was addedllvm/test/tools/llvm-ml/variable.test
Commit 7a06b166b1afb457a7df6ad73a6710b4dde4db68 by spatel
[DAGCombiner] allow more store merging for non-i8 truncated ops

This is a follow-up suggested in D86420 - if we have a pair of stores
in inverted order for the target endian, we can rotate the source
bits into place.
The "be_i64_to_i16_order" test shows a limitation of the current
function (which might be avoided if we integrate this function with
the other cases in mergeConsecutiveStores). In the earlier
"be_i64_to_i16" test, we skip the first 2 stores because we do not
match the full set as consecutive or rotate-able, but then we reach
the last 2 stores and see that they are an inverted pair of 16-bit
stores. The "be_i64_to_i16_order" test alters the program order of
the stores, so we miss matching the sub-pattern.

Differential Revision: https://reviews.llvm.org/D87112
The file was modifiedllvm/test/CodeGen/X86/stores-merging.ll (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/merge-trunc-store.ll (diff)
Commit f3a6f6ccfddfbd991269a917feb4ae9beb5a1610 by craig.topper
[X86] Pre-commit new test case for D87214. NFC
The file was modifiedllvm/test/CodeGen/X86/iabs.ll (diff)
Commit 01b3e167575412792901c705032e304ef184a75d by craig.topper
[X86] Use the same sequence for i128 ISD::ABS on 64-bit targets as we use for i64 on 32-bit targets.

Differential Revision: https://reviews.llvm.org/D87214
The file was modifiedllvm/test/CodeGen/X86/abs.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/iabs.ll (diff)
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
Commit 70207816e35771459d053ab9faf75a50a4cb92fb by spatel
[InstCombine] add ptr difference tests; NFC
The file was modifiedllvm/test/Transforms/InstCombine/sub-gep.ll (diff)
Commit 8b300679192b317aa91a28e781fcf60d4416b0d6 by spatel
[InstCombine] improve fold of pointer differences

This was supposed to be an NFC cleanup, but there's
a real logic difference (did not drop 'nsw') visible
in some tests in addition to an efficiency improvement.

This is because in the case where we have 2 GEPs,
the code was *always* swapping the operands and
negating the result. But if we have 2 GEPs, we
should *never* need swapping/negation AFAICT.

This is part of improving flags propagation noticed
with PR47430.
The file was modifiedllvm/test/Transforms/InstCombine/sub.ll (diff)
The file was modifiedllvm/test/Transforms/InstCombine/sub-gep.ll (diff)
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp (diff)
Commit da79b1eecc65171f6ca0cda9b4f1970bd1503c17 by craig.topper
[SelectionDAG][X86][ARM] Teach ExpandIntRes_ABS to use sra+add+xor expansion when ADDCARRY is supported.

Rather than using SELECT instructions, use SRA, UADDO/ADDCARRY and
XORs to expand ABS. This is the multi-part version of the sequence
we use in LegalizeDAG.

It's also the same as the Custom sequence uses for i64 on 32-bit
and i128 on 64-bit. So we can remove the X86 customization.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D87215
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/iabs.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/abs.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-abs.ll (diff)
Commit 9fb46a452d4e5666828c95610ceac8dcd9e4ce16 by nikita.ppv
[SCCP] Compute ranges for supported intrinsics

For intrinsics supported by ConstantRange, compute the result range
based on the argument ranges. We do this independently of whether
some or all of the input ranges are full, as we can often still
constrain the result in some way.

Differential Revision: https://reviews.llvm.org/D87183
The file was modifiedllvm/lib/Transforms/Scalar/SCCP.cpp (diff)
The file was modifiedllvm/test/Transforms/SCCP/intrinsics.ll (diff)
Commit ddab4cd83ea31141aaada424dccf94278482ee88 by nikita.ppv
[KnownBits] Avoid some copies (NFC)

These lambdas don't need copies, use const reference.
The file was modifiedllvm/lib/Support/KnownBits.cpp (diff)
Commit bb7d3af1139c36270bc9948605e06f40e4c51541 by lebedev.ri
Reland [SimplifyCFG][LoopRotate] SimplifyCFG: disable common instruction hoisting by default, enable late in pipeline

This was reverted in 503deec2183d466dad64b763bab4e15fd8804239
because it caused gigantic increase (3x) in branch mispredictions
in certain benchmarks on certain CPU's,
see https://reviews.llvm.org/D84108#2227365.

It has since been investigated and here are the results:
https://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20200907/827578.html
> It's an amazingly severe regression, but it's also all due to branch
> mispredicts (about 3x without this). The code layout looks ok so there's
> probably something else to deal with. I'm not sure there's anything we can
> reasonably do so we'll just have to take the hit for now and wait for
> another code reorganization to make the branch predictor a bit more happy :)
>
> Thanks for giving us some time to investigate and feel free to recommit
> whenever you'd like.
>
> -eric

So let's just reland this.
Original commit message:


I've been looking at missed vectorizations in one codebase.
One particular thing that stands out is that some of the loops
reach vectorizer in a rather mangled form, with weird PHI's,
and some of the loops aren't even in a rotated form.

After taking a more detailed look, that happened because
the loop's headers were too big by then. It is evident that
SimplifyCFG's common code hoisting transform is at fault there,
because the pattern it handles is precisely the unrotated
loop basic block structure.

Surprizingly, `SimplifyCFGOpt::HoistThenElseCodeToIf()` is enabled
by default, and is always run, unlike it's friend, common code sinking
transform, `SinkCommonCodeFromPredecessors()`, which is not enabled
by default and is only run once very late in the pipeline.

I'm proposing to harmonize this, and disable common code hoisting
until //late// in pipeline. Definition of //late// may vary,
here currently i've picked the same one as for code sinking,
but i suppose we could enable it as soon as right after
loop rotation happens.

Experimentation shows that this does indeed unsurprizingly help,
more loops got rotated, although other issues remain elsewhere.

Now, this undoubtedly seriously shakes phase ordering.
This will undoubtedly be a mixed bag in terms of both compile- and
run- time performance, codesize. Since we no longer aggressively
hoist+deduplicate common code, we don't pay the price of said hoisting
(which wasn't big). That may allow more loops to be rotated,
so we pay that price. That, in turn, that may enable all the transforms
that require canonical (rotated) loop form, including but not limited to
vectorization, so we pay that too. And in general, no deduplication means
more [duplicate] instructions going through the optimizations. But there's still
late hoisting, some of them will be caught late.

As per benchmarks i've run {F12360204}, this is mostly within the noise,
there are some small improvements, some small regressions.
One big regression i saw i fixed in rG8d487668d09fb0e4e54f36207f07c1480ffabbfd, but i'm sure
this will expose many more pre-existing missed optimizations, as usual :S

llvm-compile-time-tracker.com thoughts on this:
http://llvm-compile-time-tracker.com/compare.php?from=e40315d2b4ed1e38962a8f33ff151693ed4ada63&to=c8289c0ecbf235da9fb0e3bc052e3c0d6bff5cf9&stat=instructions
* this does regress compile-time by +0.5% geomean (unsurprizingly)
* size impact varies; for ThinLTO it's actually an improvement

The largest fallout appears to be in GVN's load partial redundancy
elimination, it spends *much* more time in
`MemoryDependenceResults::getNonLocalPointerDependency()`.
Non-local `MemoryDependenceResults` is widely-known to be, uh, costly.
There does not appear to be a proper solution to this issue,
other than silencing the compile-time performance regression
by tuning cut-off thresholds in `MemoryDependenceResults`,
at the cost of potentially regressing run-time performance.
D84609 attempts to move in that direction, but the path is unclear
and is going to take some time.

If we look at stats before/after diffs, some excerpts:
* RawSpeed (the target) {F12360200}
  * -14 (-73.68%) loops not rotated due to the header size (yay)
  * -272 (-0.67%) `"Number of live out of a loop variables"` - good for vectorizer
  * -3937 (-64.19%) common instructions hoisted
  * +561 (+0.06%) x86 asm instructions
  * -2 basic blocks
  * +2418 (+0.11%) IR instructions
* vanilla test-suite + RawSpeed + darktable  {F12360201}
  * -36396 (-65.29%) common instructions hoisted
  * +1676 (+0.02%) x86 asm instructions
  * +662 (+0.06%) basic blocks
  * +4395 (+0.04%) IR instructions

It is likely to be sub-optimal for when optimizing for code size,
so one might want to change tune pipeline by enabling sinking/hoisting
when optimizing for size.

Reviewed By: mkazantsev

Differential Revision: https://reviews.llvm.org/D84108

This reverts commit 503deec2183d466dad64b763bab4e15fd8804239.
The file was modifiedllvm/lib/Target/ARM/ARMTargetMachine.cpp (diff)
The file was modifiedllvm/lib/Target/Hexagon/HexagonTargetMachine.cpp (diff)
The file was modifiedllvm/test/Transforms/PhaseOrdering/loop-rotation-vs-common-code-hoisting.ll (diff)
The file was modifiedllvm/lib/Passes/PassBuilder.cpp (diff)
The file was modifiedllvm/lib/Transforms/Scalar/SimplifyCFGPass.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64TargetMachine.cpp (diff)
The file was modifiedllvm/test/Transforms/SimplifyCFG/common-code-hoisting.ll (diff)
The file was modifiedllvm/include/llvm/Transforms/Utils/SimplifyCFGOptions.h (diff)
The file was modifiedllvm/lib/Transforms/IPO/PassManagerBuilder.cpp (diff)
The file was modifiedllvm/test/Transforms/PGOProfile/chr.ll (diff)
Commit 5f5a0bb0872a9673bad08b38bc0b14c42263902a by i
[asan][test] Use --image-base for Linux/asan_prelink_test.cpp if ld is LLD

LLD supports -Ttext but with the option there is still a PT_LOAD at address zero
and thus the Linux kernel will map it to a different address and the test will fail.

Use --image-base instead.
The file was modifiedcompiler-rt/test/asan/TestCases/Linux/asan_prelink_test.cpp (diff)
Commit efb8e156daa120a25f993b3142ef8d6ef766df5a by flo
[DSE,MemorySSA] Add an early check for read clobbers to traversal.

Depending on the benchmark, this early exit can save a substantial
amount of compile-time:

http://llvm-compile-time-tracker.com/compare.php?from=505f2d817aa8e07ba98e5fd4a8f6ff0666f89df1&to=eb4e441147f9b4b7a5fcbbc57428cadbe9e01f10&stat=instructions
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp (diff)
The file was addedllvm/test/Transforms/DeadStoreElimination/MSSA/read-clobber-after-overwrite.ll
Commit 3e782bf8090c80e6d75e62cd52c9ed32715cbcdd by zequanwu
[Sema][MSVC] warn at dynamic_cast when /GR- is given

Differential Revision: https://reviews.llvm.org/D86369
The file was modifiedclang/lib/Sema/SemaCast.cpp (diff)
The file was addedclang/test/SemaCXX/no_dynamic_cast.cpp
The file was modifiedclang/lib/Sema/SemaExprCXX.cpp (diff)
The file was addedclang/test/SemaCXX/ms_no_dynamic_cast.cpp
The file was modifiedclang/include/clang/Basic/DiagnosticGroups.td (diff)
The file was modifiedclang/include/clang/Basic/DiagnosticSemaKinds.td (diff)
Commit 0a63679267e4a2e81c6b193c25ed2579c65eb824 by joker.eph
Add documentation for getDependentDialects() in the PassManagement infra docs

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D87181
The file was modifiedmlir/docs/PassManagement.md (diff)
Commit 63d1dc66658fa072c6e0caba6c97e00da37555ce by joker.eph
Add a doc/tutorial on traversing the IR

Reviewed By: stephenneuendorffer

Differential Revision: https://reviews.llvm.org/D87221
The file was addedmlir/docs/includes/img/DefUseChains.svg
The file was addedmlir/test/IR/print-ir-nesting.mlir
The file was addedmlir/docs/Tutorials/UnderstandingTheIRStructure.md
The file was addedmlir/test/IR/print-ir-defuse.mlir
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp (diff)
The file was modifiedmlir/test/lib/IR/CMakeLists.txt (diff)
The file was addedmlir/test/lib/IR/TestPrintDefUse.cpp
The file was addedmlir/docs/includes/img/Use-list.svg
The file was addedmlir/test/lib/IR/TestPrintNesting.cpp
Commit 8dcd6ea644cf86aba3dea5b1d3c1af4f350d22ab by joker.eph
Update SVG images to be properly cropped (NFC)
The file was modifiedmlir/docs/includes/img/Use-list.svg (diff)
The file was modifiedmlir/docs/includes/img/DefUseChains.svg (diff)
Commit 35f708a3c9ffceacbeaf8abfb0ba5123e346b30e by craig.topper
[builtins] Inline __paritysi2 into __paritydi2 and inline __paritydi2 into __parityti2.

No point in making __parityti2 go through 2 calls to get to
__paritysi2.

Reviewed By: MaskRay, efriedma

Differential Revision: https://reviews.llvm.org/D87218
The file was modifiedcompiler-rt/lib/builtins/paritydi2.c (diff)
The file was modifiedcompiler-rt/lib/builtins/parityti2.c (diff)
Commit 4536c6acb3809eaadc836f24f091db1b50b82af9 by kirankumar.tp
[flang][OpenMP] Enhance parser support for atomic construct to OpenMP 5.0

Summary:
This patch enhances parser support for atomic construct to OpenMP 5.0.
2.17.7 atomic -> ATOMIC [clause [,]] atomic-clause [[,] clause] |
                 ATOMIC [clause]
       clause -> memory-order-clause | HINT(hint-expression)
       memory-order-clause -> SEQ_CST | ACQ_REL | RELEASE | ACQUIRE | RELAXED
       atomic-clause -> READ | WRITE | UPDATE | CAPTURE

The patch includes code changes and testcase modifications.

Reviewed By: DavidTruby, kiranchandramohan, sameeranjoshi

Differential Revision: https://reviews.llvm.org/D82931
The file was modifiedflang/test/Semantics/omp-atomic.f90 (diff)
The file was modifiedflang/lib/Parser/unparse.cpp (diff)
The file was modifiedflang/docs/OpenMP-4.5-grammar.txt (diff)
The file was modifiedflang/include/flang/Parser/parse-tree.h (diff)
The file was modifiedflang/lib/Parser/openmp-parsers.cpp (diff)
The file was modifiedflang/include/flang/Parser/dump-parse-tree.h (diff)
Commit 10af5bad443dd15b79876fbad66d836ab9e9a4ed by alexshap
[llvm-objcopy] Consolidate and unify version tests

In this diff the tests which verify version printing functionality are refactored.
Since they are not specific to a particular format we move them into tool-version.test
and slightly unify (similarly to tool-name.test and tool-help-message.test).

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D87211
The file was removedllvm/test/tools/llvm-objcopy/ELF/strip-version.test
The file was addedllvm/test/tools/llvm-objcopy/tool-version.test
The file was removedllvm/test/tools/llvm-objcopy/MachO/install-name-tool-version.test
The file was removedllvm/test/tools/llvm-objcopy/ELF/objcopy-version.test
Commit 3c0b3250230b3847a2a47dfeacfdb794c2285f02 by qiucofan
[PowerPC] Implement instruction clustering for stores

On Power10, it's profitable to schedule some stores with adjacent target
address together. This patch implements this feature.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D86754
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/pcrel-call-linkage-leaf.ll (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPC.td (diff)
The file was addedllvm/test/CodeGen/PowerPC/fusion-load-store.ll
Commit 7907e5516a418fec29137beed3ff985f40e04f17 by zequanwu
[Sema] fix /gr warning test case
The file was modifiedclang/test/SemaCXX/no-rtti.cpp (diff)
The file was modifiedclang/test/SemaCXX/no_dynamic_cast.cpp (diff)
Commit 247d02396524649a31bc45541f97457e32b8ef48 by mkazantsev
[Test] Auto-generated checks for some IndVarSimplify tests
The file was modifiedllvm/test/Transforms/IndVarSimplify/lftr-multi-exit.ll (diff)
The file was modifiedllvm/test/Transforms/IndVarSimplify/canonicalize-cmp.ll (diff)
The file was modifiedllvm/test/Transforms/IndVarSimplify/pr18223.ll (diff)
Commit 79651265b2e08e105f3d66d5f75bc9f5fa803e45 by johannes
[Attributor][FIX] Properly return changed if the IR was modified

Deleting or replacing anything is certainly a modification. This caused
a later assertion in IPSCCP when compiling 400.perlbench with the new PM.
I'm not sure how to test this.
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp (diff)
Commit ff70c25d76561d0789743fa9f718dcd520199a7c by johannes
[Attributor][NFC] Expand `auto` types (clang-fix-it)
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp (diff)
Commit 8637acac5a3f4688114290b524eb5154a0bcdbdf by johannes
[Attributor][NFC] Clang tidy: no else after continue
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp (diff)
Commit e6208849c8d63690ac3489813eb13196df7ed8dc by johannes
[Attributor][NFC] Change variable spelling
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp (diff)
Commit 53e4ef7fc25903430436ce456909d97aaa0fd6b2 by johannes
[Attributor][NFC] Cleanup internalize test case

One run line was different and probably introduced for the manually
added function attribute & name checks. We can do this with the script
and a check prefix used for the other run lines as well.
The file was modifiedllvm/test/Transforms/Attributor/internalize.ll (diff)
Commit 711bf7dcf9546fefe18d32a5772d48e7b5166f08 by johannes
[Attributor][FIX] Don't crash on internalizing linkonce_odr hidden functions

The CloneFunctionInto has implicit requirements with regards to the
linkage and visibility of the function. We now update these after we did
the CloneFunctionInto on the copy with the same linkage and visibility
as the original.
The file was modifiedllvm/test/Transforms/Attributor/internalize.ll (diff)
The file was modifiedllvm/lib/Transforms/IPO/Attributor.cpp (diff)
Commit e59d9df774ed7d94455b224f0e3f6eaeae707259 by i
[ELF] --symbol-ordering-file: optimize a loop
The file was modifiedlld/ELF/Writer.cpp (diff)