FailedChanges

Summary

  1. [clangd] Link libclangdSupport into clangd-index-server (details)
  2. [clang] Traverse init-captures while indexing (details)
  3. [CMake] Use find_dependency in LLVMConfig.cmake (details)
  4. [CMake] Use append for CMAKE_REQUIRED_* variables (details)
  5. [SyntaxTree][Nit] Take `ArrayRef` instead of `std::vector` as argument for `createTree` (details)
  6. [SyntaxTree] Test `findFirstLeaf` and `findLastLeaf` (details)
  7. [gn build] Port af582c9b0f3 (details)
  8. Revert "[CMake] Use find_dependency in LLVMConfig.cmake" (details)
  9. Reapply: [clang-cl] Always interpret the LIB env var as separated with semicolons (details)
  10. [AArch64] Fix return type of Neon scalar comparison intrinsics (details)
  11. [ARM] VPT validForTailPredication (details)
  12. [ARM] Remove MVEDomain from VLDR/STR of P0 (details)
  13. [MLIR] Add subf and rsqrt EDSC intrinsics (details)
  14. [mlir][Linalg] Uniformize linalg.generic with named ops. (details)
  15. [llvm-readobj/elf] - Stop reporting invalid extended indexes in warnings for unnamed section symbols. (details)
  16. [SyntaxTree][Synthesis] Fix: `deepCopy` -> `deepCopyExpandingMacros`. (details)
  17. Revert "Reapply Revert "RegAllocFast: Rewrite and improve"" (details)
  18. [ARM] Improve VPT predicate tracking (details)
  19. [AMDGPU] More codegen patterns for v2i16/v2f16 build_vector (details)
  20. Revert "Implement a new kind of Pass: dynamic pass pipeline" (details)
  21. [SCEV] Support unsigned predicates in isKnownPredicateViaNoOverflow (details)
  22. [MLIR][Linalg] Fix assertion in dependency analysis (details)
  23. [NFC][PowerPC]Add tests for multiply-by-constant. (details)
  24. [APFloat] multiplySignificand - always pass IEEEFloat as const reference. NFCI. (details)
  25. [PowerPC] Add support for R_PPC64_GOT_TPREL_PCREL34 used in TLS Initial Exec (details)
Commit f18f8f34d3d82b0842daf184c71e8240620d925c by zeratul976
[clangd] Link libclangdSupport into clangd-index-server

Fixes https://github.com/clangd/clangd/issues/534

Differential Revision: https://reviews.llvm.org/D87979
The file was modifiedclang-tools-extra/clangd/index/remote/server/CMakeLists.txt (diff)
Commit aa3c7638ba1648e020cf65a424389e093f2b3a1a by zeratul976
[clang] Traverse init-captures while indexing

Fixes https://github.com/clangd/clangd/issues/496

Differential Revision: https://reviews.llvm.org/D87257
The file was modifiedclang/lib/Index/IndexBody.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/XRefsTests.cpp (diff)
The file was modifiedclang/test/Index/cxx14-lambdas.cpp (diff)
Commit 247c4fc50720ed48db2464bbe59839eedbe16794 by phosek
[CMake] Use find_dependency in LLVMConfig.cmake

This prefered over find_package as find_dependency forwards the correct
parameters for QUIET and REQUIRED to find_package.

Differential Revision: https://reviews.llvm.org/D88069
The file was modifiedllvm/cmake/modules/LLVMConfig.cmake.in (diff)
Commit bc3615f50e585232f34edcf6faf8cbd3e6dece1a by phosek
[CMake] Use append for CMAKE_REQUIRED_* variables

This ensures that required includes and libraries such as -lm that
were added earlier aren't overwritten.

Differential Revision: https://reviews.llvm.org/D88068
The file was modifiedllvm/cmake/config-ix.cmake (diff)
Commit 1dc7836aed134b4543bad6aa54f15cc0e51a627f by ecaldas
[SyntaxTree][Nit] Take `ArrayRef` instead of `std::vector` as argument for `createTree`

I also assured that there are no other functions unnecessarily using std::vector as argument.

Differential Revision: https://reviews.llvm.org/D88024
The file was modifiedclang/include/clang/Tooling/Syntax/BuildTree.h (diff)
The file was modifiedclang/lib/Tooling/Syntax/Synthesis.cpp (diff)
Commit af582c9b0f3a09b6a1b5101fd30dcbcef5c188b0 by ecaldas
[SyntaxTree] Test `findFirstLeaf` and `findLastLeaf`

* Introduce `TreeTest.cpp` to unit test `Tree.h`
* Add `generateAllTreesWithShape` to generating test cases
* Add tests for `findFirstLeaf` and `findLastLeaf`
* Fix implementations of `findFirstLeaf` and `findLastLeaf` that had
been broken when empty `Tree` were present.

Differential Revision: https://reviews.llvm.org/D87779
The file was addedclang/unittests/Tooling/Syntax/TreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/Tree.cpp (diff)
The file was modifiedclang/unittests/Tooling/Syntax/CMakeLists.txt (diff)
Commit 9114d6cbda6042000e12b9d799868c98e8fae385 by llvmgnsyncbot
[gn build] Port af582c9b0f3
The file was modifiedllvm/utils/gn/secondary/clang/unittests/Tooling/Syntax/BUILD.gn (diff)
Commit 6fa38de071f0993be81ea090c4a307b1d146c179 by phosek
Revert "[CMake] Use find_dependency in LLVMConfig.cmake"

This reverts commit 247c4fc50720ed48db2464bbe59839eedbe16794 as it
broke the runtime build.
The file was modifiedllvm/cmake/modules/LLVMConfig.cmake.in (diff)
Commit 3fec6ddc276a595e4409f04dabdd50c84f5f2a2d by martin
Reapply: [clang-cl] Always interpret the LIB env var as separated with semicolons

When cross compiling with clang-cl, clang splits the INCLUDE env
variable around semicolons (clang/lib/Driver/ToolChains/MSVC.cpp,
MSVCToolChain::AddClangSystemIncludeArgs) and lld splits the
LIB variable similarly (lld/COFF/Driver.cpp,
LinkerDriver::addLibSearchPaths). Therefore, the consensus for
cross compilation with clang-cl and lld-link seems to be to use
semicolons, despite path lists normally being separated by colons
on unix and EnvPathSeparator being set to that.

Therefore, handle the LIB variable similarly in Clang, when
handling lib file arguments when driving linking via Clang.

This fixes commands like "clang-cl test.c -Fetest.exe kernel32.lib" in
a cross compilation setting. Normally, most users call (lld-)link
directly, but meson happens to use this command syntax for
has_function() tests.

Reapply: Change Program.h to define procid_t as ::pid_t. When included
in lldb/unittests/Host/NativeProcessProtocolTest.cpp, it is included
after an lldb namespace containing an lldb::pid_t typedef, followed
later by a "using namespace lldb;". Previously, Program.h wasn't
included in this translation unit, but now it ends up included
transitively from Process.h.

Differential Revision: https://reviews.llvm.org/D88002
The file was modifiedllvm/include/llvm/Support/Program.h (diff)
The file was modifiedclang/lib/Driver/Driver.cpp (diff)
The file was modifiedllvm/lib/Support/Process.cpp (diff)
The file was modifiedllvm/include/llvm/Support/Process.h (diff)
The file was modifiedclang/test/Driver/cl-inputs.c (diff)
Commit f93514545cd91b132fe987618488b8c1e5388fb0 by david.spickett
[AArch64] Fix return type of Neon scalar comparison intrinsics

The following should have unsigned return types
but were signed:
vceqd_s64 vceqzd_s64 vcged_s64 vcgezd_s64
vcgtd_s64 vcgtzd_s64 vcled_s64 vclezd_s64
vcltd_s64 vcltzd_s64 vtstd_s64

See https://developer.arm.com/documentation/ihi0073/latest

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D88009
The file was modifiedclang/test/CodeGen/aarch64-neon-intrinsics.c (diff)
The file was modifiedclang/include/clang/Basic/arm_neon.td (diff)
Commit e461921d6ccdd2a77209b2f4d3ca0a4db8e11c35 by sam.parker
[ARM] VPT validForTailPredication

Mark all VPT instructions as valid.

Differential Revision: https://reviews.llvm.org/D87759
The file was modifiedllvm/lib/Target/ARM/ARMInstrMVE.td (diff)
The file was modifiedllvm/unittests/Target/ARM/MachineInstrTest.cpp (diff)
Commit a0c1dcc3182769ad1cb9b0ac8fd4ea8ff48847b4 by sam.parker
[ARM] Remove MVEDomain from VLDR/STR of P0

Remove the domain from the instructions and create a shouldInspect
helper for LowOverheadLoops which queries it or a vpr operand.

Differential Revision: https://reviews.llvm.org/D87900
The file was modifiedllvm/lib/Target/ARM/ARMInstrVFP.td (diff)
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt.mir (diff)
Commit 0304c6da1006f6b472a1e5c1d8776a9f35c9439d by ntv
[MLIR] Add subf and rsqrt EDSC intrinsics

[MLIR] Add subf and rsqrt EDSC intrinsics

NOTE: Please merge it when ready.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D88039
The file was modifiedmlir/include/mlir/Dialect/StandardOps/EDSC/Intrinsics.h (diff)
Commit ed229132f1c4ea2ba0644fc345d8279e47a00565 by ntv
[mlir][Linalg] Uniformize linalg.generic with named ops.

This revision allows representing a reduction at the level of linalg on tensors for generic ops by uniformizing with the named ops approach.
The file was modifiedmlir/include/mlir/Dialect/Utils/StructuredOpsUtils.h (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h (diff)
The file was modifiedmlir/test/Transforms/buffer-placement.mlir (diff)
The file was modifiedmlir/lib/Dialect/Linalg/EDSC/Builders.cpp (diff)
The file was modifiedmlir/test/Transforms/buffer-placement-preparation.mlir (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td (diff)
The file was modifiedmlir/test/Dialect/Linalg/tile_parallel.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/standard.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/tile_parallel_reduce.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/parallel_loops.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/fusion-tensor.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/loops.mlir (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/DropUnitDims.cpp (diff)
The file was modifiedmlir/test/Transforms/buffer-placement-preparation-allowed-memref-results.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/fold-unit-trip-loops.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/tile_indexed_generic.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/tile.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/fusion.mlir (diff)
The file was modifiedmlir/test/EDSC/builder-api-test.cpp (diff)
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp (diff)
The file was modifiedmlir/test/Transforms/copy-removal.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/canonicalize.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/transform-patterns.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/drop-unit-extent-dims.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/tensors-to-buffers.mlir (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/TensorsToBuffers.cpp (diff)
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp (diff)
The file was modifiedmlir/test/Conversion/LinalgToSPIRV/linalg-to-spirv.mlir (diff)
The file was modifiedmlir/test/Dialect/Linalg/inlining.mlir (diff)
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp (diff)
The file was modifiedmlir/test/Dialect/Linalg/fusion_indexed_generic.mlir (diff)
The file was modifiedmlir/test/lib/Transforms/TestBufferPlacement.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/EDSC/Builders.h (diff)
The file was modifiedmlir/lib/Conversion/LinalgToSPIRV/LinalgToSPIRV.cpp (diff)
Commit 28b84dd138666abc005de4810af16bcf007530ea by grimar
[llvm-readobj/elf] - Stop reporting invalid extended indexes in warnings for unnamed section symbols.

We have an issue with `getFullSymbolName`: it assumes that the symbol passed is
always in the `.symtab`, what is wrong. We might calculate and report a wrong index currently.
I've added a test case revealing that.

This patch adds the "symbol index" argument to `getFullSymbolName` signature,
what fixes the issue.

Differential revision: https://reviews.llvm.org/D87899
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp (diff)
The file was modifiedllvm/test/tools/llvm-readobj/ELF/dyn-symbols.test (diff)
Commit 66bcb14312a08b5d7e1197d23d748b2e23c4d852 by ecaldas
[SyntaxTree][Synthesis] Fix: `deepCopy` -> `deepCopyExpandingMacros`.

There can be Macros that are tagged with `modifiable`. Thus verifying
`canModifyAllDescendants` is not sufficient to avoid macros when deep
copying.

We think the `TokenBuffer` could inform us whether a `Token` comes from
a macro. We'll look into that when we can surface this information
easily, for instance in unit tests for `ComputeReplacements`.

Differential Revision: https://reviews.llvm.org/D88034
The file was modifiedclang/unittests/Tooling/Syntax/SynthesisTest.cpp (diff)
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp (diff)
The file was modifiedclang/lib/Tooling/Syntax/Synthesis.cpp (diff)
The file was modifiedclang/include/clang/Tooling/Syntax/BuildTree.h (diff)
Commit 73a6a164b84a8195defbb8f5eeb6faecfc478ad4 by omair.javaid
Revert "Reapply Revert "RegAllocFast: Rewrite and improve""

This reverts commit 55f9f87da2c2ad791b9e62cccb1c035e037444fa.

Breaks following buildbots:
http://lab.llvm.org:8011/builders/lldb-arm-ubuntu/builds/4306
http://lab.llvm.org:8011/builders/lldb-aarch64-ubuntu/builds/9154
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-null.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/dyn_stackalloc.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-vararg.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr34653.ll (diff)
The file was removedllvm/test/CodeGen/AMDGPU/unexpected-reg-unit-state.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitwise.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/anon_aggr.ll (diff)
The file was modifiedllvm/test/CodeGen/SystemZ/swifterror.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-call.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/addegluecrash.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/swifterror.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vcvt_f.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-call.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion-fallback.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/indirect-addressing-term.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/test_TypeInfoforMF.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/spill-indirect-nrvo.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/atomic64.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr32345.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll (diff)
The file was modifiedllvm/test/DebugInfo/AArch64/frameindices.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/fp64-to-int16.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/combine-loads.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/op_deref.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/atomic-unordered.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/icmp.ll (diff)
The file was removedllvm/test/CodeGen/X86/bug47278.mir
The file was modifiedllvm/test/CodeGen/ARM/thumb-big-stack.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-vector-spill.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/crash-greedy-v6.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/stack-protector-msvc.ll (diff)
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The file was modifiedllvm/test/CodeGen/Hexagon/vect/vect-load-v4i16.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zextLoad_and_sextLoad.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/avx-load-store.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr32241.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/legalize-bitcast.ll (diff)
The file was modifiedllvm/test/DebugInfo/Mips/delay-slot.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr27591.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/pieces-1.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctpop.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fptosi_and_fptoui.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select-sse.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/ldrd.ll (diff)
The file was removedllvm/test/CodeGen/PowerPC/spill-nor0.mir
The file was modifiedllvm/test/CodeGen/X86/2009-04-14-IllegalRegs.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr34592.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/atomic-min-max.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/x86-64-intrcc.ll (diff)
The file was removedllvm/test/CodeGen/AMDGPU/fast-ra-kills-vcc.mir
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/branch.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/elf-common.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/branch-targets.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/fast-isel-select.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/spill192.mir (diff)
The file was modifiedllvm/test/CodeGen/Mips/implicit-sret.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/zext_and_sext.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/sret.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/atomic64.ll (diff)
The file was modifiedllvm/test/DebugInfo/ARM/prologue_end.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes-i686.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/atomic.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/win64_eh.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_4_unaligned.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/reference-argument.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add_vec.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sitofp_and_uitofp.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/swift-return.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr1489.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/extend-set-cc-uses-dbg.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64_32-fastisel.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/atomic32.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr32284.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr44749.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/rem_and_div.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/phys-reg-local-regalloc.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/aggregate_struct_return.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/copy-fp64.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_split_because_of_memsize_or_align.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/var_arg.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/load_4_unaligned.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/swifterror.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/fast-isel-cmp-branch.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr11415.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/spill-nor0.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/jump_table_and_brjt.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/stack-guard-reassign.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/2010-06-28-FastAllocTiedOperand.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/subreg.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/fp-int128-fp-combine.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr32484.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/swift-return.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-ldr-str-thumb-neg-index.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr39733.ll (diff)
The file was modifiedllvm/lib/CodeGen/RegAllocFast.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-m0.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/dbg-declare-arg.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/prologue-stack.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-agpr.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/2010-08-04-StackVariable.ll (diff)
The file was modifiedllvm/test/DebugInfo/Mips/prologue_end.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/darwin-tls-call-clobber.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/micromips-eva.mir (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/aggressive-anti-dep-breaker-subreg.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/sub_vec.ll (diff)
The file was modifiedllvm/test/DebugInfo/AArch64/prologue_end.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/fcmp.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/wwm-reserved.ll (diff)
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The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/add.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-select.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/store_split_because_of_memsize_or_align.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/atomic6432.ll (diff)
The file was modifiedlldb/test/Shell/SymbolFile/NativePDB/disassembly.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/br-cond-not-merge.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/ctlz.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-conversion.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/aix-overflow-toc.py (diff)
The file was modifiedllvm/test/CodeGen/X86/swifterror.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/crash-O0.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/brindirect.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/fast-isel-x86-64.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/call.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/x86-32-intrcc.ll (diff)
The file was modifiedllvm/test/DebugInfo/X86/fission-ranges.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/mul_vec.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/atomicCmpSwapPW.ll (diff)
The file was modifiedllvm/test/CodeGen/SystemZ/swift-return.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/avx512-mask-zext-bugfix.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/debug-info-blocks.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/vsx.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr32451.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/mixed-ptr-sizes.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/pr47454.ll (diff)
The file was modifiedllvm/test/CodeGen/SPARC/fp16-promote.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/atomic-monotonic.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/fastregalloc-self-loop-heuristic.mir (diff)
The file was modifiedllvm/test/CodeGen/ARM/fast-isel-intrinsic.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr32340.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/popcount.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/fast-isel-nontemporal.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr30813.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bitreverse.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/msa/ldr_str.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/Windows/alloca.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s32.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/float_constants.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/long_ambiguous_chain_s64.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/fast-isel-cmpxchg.ll (diff)
The file was removedllvm/test/CodeGen/X86/bug47278-eflags-error.mir
The file was modifiedllvm/test/CodeGen/X86/pr42452.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/cmpxchg-O0-be.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-fcmp-noopt.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inline-asm.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr47000.ll (diff)
The file was removedllvm/test/CodeGen/AMDGPU/fastregalloc-illegal-subreg-physreg.mir
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/memtest1.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/2013-10-14-FastISel-incorrect-vreg.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved-from-mir.mir (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/high-reg-spill.mir (diff)
The file was modifiedllvm/test/CodeGen/X86/stack-protector-strong-macho-win32-xor.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/volatile.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/p9-vinsert-vextract.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/regalloc-fast-missing-live-out-spill.mir (diff)
The file was modifiedllvm/test/CodeGen/AArch64/cmpxchg-O0.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/unwind-preserved.ll (diff)
The file was modifiedllvm/test/CodeGen/ARM/stack-guard-reassign.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/global_address_pic.ll (diff)
The file was modifiedllvm/test/CodeGen/X86/pr30430.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/cttz.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/vsx-args.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/mubuf-legalize-operands.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/popcount.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/GlobalISel/llvm-ir/bswap.ll (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-fast-isel-br.ll (diff)
The file was modifiedllvm/test/CodeGen/Mips/Fast-ISel/callabi.ll (diff)
The file was modifiedllvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/reserve-vgpr-for-sgpr-spill.ll (diff)
Commit b4fa884a73c5c883723738f67ad1810a6d48cc2d by sam.parker
[ARM] Improve VPT predicate tracking

The VPTBlock has been modified to track the 'global' state of the
VPR, as well as the state for each block. Each object now just holds
a list of instructions that makeup the block, while static structures
hold the predicate information. This enables global access for
querying how both a VPT block and individual instructions are
predicated. These changes now allow us, again, to handle more
complicated cases where multiple instructions build a predicate
and/or where the same predicate in used in multiple blocks.

It doesn't, however, get us back to before the tracking was 'fixed'
as some extra logic will be required to properly handle VPT
instructions. Currently a VPT could be effectively predicated because
of it's inputs, but the existing logic will not detect that and so
will refuse to perform the transformation. This can be seen in
remat-vctp.ll test where we still don't perform the transform.

Differential Revision: https://reviews.llvm.org/D87681
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vpt-blocks.mir (diff)
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/cond-vector-reduce-mve-codegen.ll (diff)
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/tp-multiple-vpst.ll
The file was modifiedllvm/test/CodeGen/Thumb2/LowOverheadLoops/vctp-in-vpt-2.mir (diff)
Commit 892ef2e3c0b60656a95d0d9e9f458b73238b21b7 by jay.foad
[AMDGPU] More codegen patterns for v2i16/v2f16 build_vector

It's simpler to do this at codegen time than to do ad-hoc constant
folding of machine instructions in SIFoldOperands.

Differential Revision: https://reviews.llvm.org/D88028
The file was modifiedllvm/test/CodeGen/AMDGPU/fcanonicalize.f16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/constant-fold-imm-immreg.mir (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInstructions.td (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp (diff)
Commit 0356a413a443864409f966b069656814f10e7710 by benny.kra
Revert "Implement a new kind of Pass: dynamic pass pipeline"

This reverts commit 385c3f43fceba227be2e4dce84a59075733541c1.

Test  mlir/test/Pass:dynamic-pipeline-fail-on-parent.mlir.test fails
when run with ASAN:

ERROR: AddressSanitizer: stack-use-after-scope on address ...

Reviewed By: bkramer, pifon2a

Differential Revision: https://reviews.llvm.org/D88079
The file was modifiedmlir/include/mlir/Pass/Pass.h (diff)
The file was removedmlir/test/Pass/dynamic-pipeline-nested.mlir
The file was modifiedmlir/test/lib/Transforms/CMakeLists.txt (diff)
The file was removedmlir/test/Pass/dynamic-pipeline-fail-on-parent.mlir
The file was removedmlir/test/Pass/dynamic-pipeline.mlir
The file was modifiedmlir/lib/Pass/Pass.cpp (diff)
The file was removedmlir/test/lib/Transforms/TestDynamicPipeline.cpp
The file was modifiedmlir/include/mlir/Pass/PassManager.h (diff)
The file was modifiedmlir/tools/mlir-opt/mlir-opt.cpp (diff)
Commit 16fde88dbd797b01f3c236062fbec50fe5bbf81d by mkazantsev
[SCEV] Support unsigned predicates in isKnownPredicateViaNoOverflow

SCEV should be able to prove facts like `x <u x+1<nuw>`.

Differential Revision: https://reviews.llvm.org/D88015
Reviewed By: lebedev.ri
The file was modifiedllvm/unittests/Analysis/ScalarEvolutionTest.cpp (diff)
The file was modifiedllvm/lib/Analysis/ScalarEvolution.cpp (diff)
Commit 0841f7172b74e1cbe2ce9839e5f4e1f0c2836bef by frgossen
[MLIR][Linalg] Fix assertion in dependency analysis

The assertion falsely expected ranked memrefs only.  Now both, ranked and
unranked memrefs are allowed.

Differential Revision: https://reviews.llvm.org/D88080
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp (diff)
Commit c7ff6e0fe1cd37a162af5f30d8cb070eb4cc038d by esme.yi
[NFC][PowerPC]Add tests for multiply-by-constant.
The file was modifiedllvm/test/CodeGen/PowerPC/mulli.ll (diff)
Commit f835779160ec30340676918915526615a07e826e by llvm-dev
[APFloat] multiplySignificand - always pass IEEEFloat as const reference. NFCI.

We do this in all other cases.
The file was modifiedllvm/lib/Support/APFloat.cpp (diff)
The file was modifiedllvm/include/llvm/ADT/APFloat.h (diff)
Commit c0071862bb426689acef09491b01b1edca9d747e by stefanp
[PowerPC] Add support for R_PPC64_GOT_TPREL_PCREL34 used in TLS Initial Exec

Add Thread Local Storage Initial Exec support to LLD.

This patch adds the computation for the relocations as well as the relaxation from Initial Exec to Local Exec.

Initial Exec:
```
pld r9, x@got@tprel@pcrel
add r9, r9, x@tls@pcrel
```
or
```
pld r9, x@got@tprel@pcrel
lbzx r10, r9, x@tls@pcrel
```
Note that @tls@pcrel is actually encoded as R_PPC64_TLS with a one byte displacement.

For the above examples relaxing Intitial Exec to Local Exec:
```
paddi r9, r9, x@tprel
nop
```
or
```
paddi r9, r13, x@tprel
lbz r10, 0(r9)
```

Reviewed By: nemanjai, MaskRay, #powerpc

Differential Revision: https://reviews.llvm.org/D86893
The file was modifiedlld/ELF/Arch/PPC64.cpp (diff)
The file was addedlld/test/ELF/ppc64-tls-pcrel-ie.s