SuccessChanges

Summary

  1. [NFC][ARM] Pre-commit tail predication test (details)
  2. [SystemZ] Make sure not to call getZExtValue on a >64 bit constant. (details)
  3. [mlir] Fix typos in Dialect.h. NFC. (details)
  4. [VPlan] Disconnect VPValue and VPUser. (details)
  5. [SVE] Lower fixed length ISD::VECREDUCE_ADD to Scalable (details)
  6. [clangd] Refactor code completion signal's utility properties. (details)
  7. [docs][llvm] Fix typos (details)
  8. [mlir][openacc] Use OptionalParseResult in loop op parser instead of bool variables (details)
  9. Add Operation to python bindings. (details)
  10. Implement python iteration over the operation/region/block hierarchy. (details)
  11. Add mlir python APIs for creating operations, regions and blocks. (details)
  12. NFC: Remove unused variable. (details)
  13. [mlir][ods] Custom builder with no params (details)
  14. [mlir] Remove unneeded OpBuilder params. NFC. (details)
  15. Revert "[AMDGPU] Insert waitcnt after returning from call" (details)
  16. Add missing namespace closure comment. NFCI. (details)
  17. Add missing namespace closure comments. NFCI. (details)
  18. [AArch64] Fix ldst optimization of non-immediate store offset (details)
  19. recommit [HIP] Fix -gsplit-dwarf option (details)
  20. [lldb] Remove lldb-perf remenant (details)
  21. [mlir] Add insert before/after to list-like constructs in C API (details)
  22. Fix regressioin in test dwp-separate-debug-file.cpp (details)
  23. [MLIR] Change default builders generated by TableGen to use TypeRange for result types (details)
  24. [MLIR][NFC] Adopt use of TypeRange in build() methods. (details)
  25. Improve dynamic AST matching diagnostics for conversion errors (details)
  26. Update the documentation for the MLIR Dialect class (NFC) (details)
  27. [MLIR][NFC] Adopt use of BlockRange in place of ArrayRef<Block *> (details)
  28. Remove MLIR C-API explicit registration of standard ops. (details)
  29. [UpdateTestChecks] Remove bug-exposing test (details)
  30. NFC: Remove dangling dep on MLIRStandardOps. (details)
  31. [MBFIWrapper] Add a new function getBlockProfileCount (details)
  32. [clang]Test ensuring -fembed-bitcode passed to cc1 captures pre-opt bitcode. (details)
  33. Add optimal thread strategy (details)
  34. [Support/Path] Add path::is_absolute_gnu (details)
  35. Add REQUIRES to embed-bitcode-noopt.ll (details)
  36. [EarlyCSE] Fix crash with expensive checks after D87691 (details)
  37. Revert D87970 "[ThinLTO] Avoid temporaries when loading global decl attachment metadata" (details)
  38. Break long line accidentally left in the previous commit (details)
  39. [Driver] Check whether Gentoo-specific configuration directory exists (details)
  40. Re-apply https://reviews.llvm.org/D87921, was reverted to triage a PPC bot failure. (details)
  41. Enhance TableGen so that backends can produce better error messages. (details)
  42. [ms] [llvm-ml] Add support for .radix directive, and accept all radix specifiers (details)
  43. [TTI] add wrapper for matching vector reduction to reduce code duplication; NFC (details)
  44. Fix include location (accidentally committed a local variation) (details)
  45. [X86] Improve demanded bits for X86ISD::BEXTR. (details)
  46. [SLP] Make HorizontalReduction::getOperationData take an Instruction* instead of a Value*. NFCI (details)
  47. Revert "[ms] [llvm-ml] Add support for .radix directive, and accept all radix specifiers" (details)
  48. Update Phabricator doc to remove the warning on "arc land": tags a properly handled server side now (details)
  49. Document the `--verbatim` flag from arc to update the description for a phabricator revision (details)
  50. [lsan] On Fuchsia, don't use atexit hook for leak checks (details)
  51. [gn build] Allow option to build with asan/tsan/ubsan (details)
  52. [mlir][OpFormatGen] Update "custom" directives for attributes. (details)
  53. [AArch64][SVE] Fix frame offset calculation when d8 is saved. (details)
  54. Add `breakpoint delete --disabled`: deletes all disabled breakpoints. (details)
  55. [AMDGPU] Make ds fp atomics overloadable (details)
  56. [IRSim] Adding IRSimilarityCandidate that contains a region of IRInstructionData. (details)
  57. [PowerPC][PCRelative] Thread Local Storage Support for Local Dynamic (details)
  58. asan: Use `#if` to test CAN_SANITIZE_LEAKS (details)
  59. [scudo][standalone] Fix tests under ASan/UBSan (details)
  60. Revert "[lsan] On Fuchsia, don't use atexit hook for leak checks" (details)
Commit 00c34f72fba4b6b8a446d57e2257c27eedad1a1d by sam.parker
[NFC][ARM] Pre-commit tail predication test
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/lstp-insertion-position.mir
Commit 370a8c802558ed7aedbcc09c1bdf4c2d3f4c28c0 by paulsson
[SystemZ] Make sure not to call getZExtValue on a >64 bit constant.

Better use isZero() and isIntN() in SystemZTargetTransformInfo rather than
calling getZExtValue() since the immediate operand may be wider than 64 bits,
which is not allowed with getZExtValue().

Fixes https://bugs.llvm.org/show_bug.cgi?id=47600

Review: Simon Pilgrim
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp (diff)
The file was addedllvm/test/Analysis/CostModel/SystemZ/huge-immediates.ll
Commit 9691806840606d48139b13516e9576902ba98923 by zinenko
[mlir] Fix typos in Dialect.h. NFC.
The file was modifiedmlir/include/mlir/IR/Dialect.h (diff)
Commit 31923f6b360300b8b148ad257419766999dfe504 by flo
[VPlan] Disconnect VPValue and VPUser.

This refactors VPuser to not inherit from VPValue to facilitate
introducing operations that introduce multiple VPValues (e.g.
VPInterleaveRecipe).

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D84679
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h (diff)
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h (diff)
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanSLP.cpp (diff)
The file was modifiedllvm/docs/Proposals/VectorizationPlan.rst (diff)
Commit db40a74344292410aa3e08c42834423013c4f192 by mcinally
[SVE] Lower fixed length ISD::VECREDUCE_ADD to Scalable

Differential Revision: https://reviews.llvm.org/D87796
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-int-reduce.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h (diff)
Commit 158af0d3d165c0382a6a291e81ffecf0b18ffe77 by usx
[clangd] Refactor code completion signal's utility properties.

Current implementation of heuristic-based scoring function also contains
computation of derived signals (e.g. whether name contains a word from
context, computing file distances, scope distances.)
This is an attempt to separate out the logic for computation of derived
signals from the scoring function.
This will allow us to have a clean API for scoring functions that will
take only concrete code completion signals as input.

Differential Revision: https://reviews.llvm.org/D88146
The file was modifiedclang-tools-extra/clangd/Quality.h (diff)
The file was modifiedclang-tools-extra/clangd/Quality.cpp (diff)
Commit 270d334a665faa574db0c7d3a23af78bed9366d0 by paul
[docs][llvm] Fix typos

I don't have commit access.
Please help me commit it.
Thanks : )

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D88139
The file was modifiedllvm/docs/TableGen/BackGuide.rst (diff)
Commit bd8b50cd7f5dd5237ec9187ef2fcea3adc15b61a by clementval
[mlir][openacc] Use OptionalParseResult in loop op parser instead of bool variables

This patch switch from using bool variables to OptionalParseResult for the parsing
inside loop operation. This is already done for parallel operation and this patch unify this
in the dialect.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88111
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp (diff)
Commit 7abb0ff7e0419a9554d77e9108cb7da670b7471c by stellaraccident
Add Operation to python bindings.

* Fixes a rather egregious bug with respect to the inability to return arbitrary objects from py::init (was causing aliasing of multiple py::object -> native instance).
* Makes Modules and Operations referencable types so that they can be reliably depended on.
* Uniques python operation instances within a context. Opens the door for further accounting.
* Next I will retrofit region and block to be dependent on the operation, and I will attempt to model the API to avoid detached regions/blocks, which will simplify things a lot (in that world, only operations can be detached).
* Added quite a bit of test coverage to check for leaks and reference issues.
* Supercedes: https://reviews.llvm.org/D87213

Differential Revision: https://reviews.llvm.org/D87958
The file was modifiedmlir/test/Bindings/Python/ir_attributes.py (diff)
The file was modifiedmlir/docs/Bindings/Python.md (diff)
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp (diff)
The file was modifiedmlir/test/Bindings/Python/ir_module.py (diff)
The file was modifiedmlir/test/Bindings/Python/ir_location.py (diff)
The file was modifiedmlir/lib/Bindings/Python/IRModules.h (diff)
The file was modifiedmlir/test/Bindings/Python/ir_operation.py (diff)
The file was modifiedmlir/test/Bindings/Python/ir_types.py (diff)
Commit 4cf754c4bca94e957b634a854f57f4c7ec9151fb by stellaraccident
Implement python iteration over the operation/region/block hierarchy.

* Removes the half-completed prior attempt at region/block mutation in favor of new approach to ownership.
* Will re-add mutation more correctly in a follow-on.
* Eliminates the detached state on blocks and regions, simplifying the ownership hierarchy.
* Adds both iterator and index based access at each level.

Differential Revision: https://reviews.llvm.org/D87982
The file was modifiedmlir/lib/CAPI/IR/CMakeLists.txt (diff)
The file was modifiedmlir/lib/CAPI/IR/IR.cpp (diff)
The file was modifiedmlir/lib/Bindings/Python/IRModules.h (diff)
The file was modifiedmlir/test/Bindings/Python/ir_operation.py (diff)
The file was modifiedmlir/include/mlir-c/IR.h (diff)
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp (diff)
Commit c1ded6a759913a32b44a851f0823bbb648d2a7e1 by stellaraccident
Add mlir python APIs for creating operations, regions and blocks.

* The API is a bit more verbose than I feel like it needs to be. In a follow-up I'd like to abbreviate some things and look in to creating aliases for common accessors.
* There is a lingering lifetime hazard between the module and newly added operations. We have the facilities now to solve for this but I will do that in a follow-up.
* We may need to craft a more limited API for safely referencing successors when creating operations. We need more facilities to really prove that out and should defer for now.

Differential Revision: https://reviews.llvm.org/D87996
The file was modifiedmlir/lib/Bindings/Python/PybindUtils.h (diff)
The file was modifiedmlir/lib/Bindings/Python/IRModules.h (diff)
The file was modifiedmlir/test/Bindings/Python/ir_operation.py (diff)
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp (diff)
Commit 8e84972ab7060ace889bb383e76dc2c835a47c06 by stellaraccident
NFC: Remove unused variable.
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp (diff)
Commit 80deb1e106a8c3c5ba31ef0bb4d7651acb6e6b69 by jpienaar
[mlir][ods] Custom builder with no params

Incorrect generation of custom build method without any params.
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp (diff)
Commit 501d7e07e31d8f79160324e683e4931403f469d5 by jpienaar
[mlir] Remove unneeded OpBuilder params. NFC.

These are now automatically prepended.
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVOps.td (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td (diff)
The file was modifiedmlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVAtomicOps.td (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVCompositeOps.td (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td (diff)
The file was modifiedmlir/examples/toy/Ch3/include/toy/Ops.td (diff)
The file was modifiedmlir/examples/toy/Ch7/include/toy/Ops.td (diff)
The file was modifiedmlir/examples/toy/Ch5/include/toy/Ops.td (diff)
The file was modifiedmlir/examples/toy/Ch2/include/toy/Ops.td (diff)
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVNonUniformOps.td (diff)
The file was modifiedmlir/examples/toy/Ch6/include/toy/Ops.td (diff)
The file was modifiedmlir/include/mlir/Dialect/PDL/IR/PDLOps.td (diff)
The file was modifiedmlir/examples/toy/Ch4/include/toy/Ops.td (diff)
Commit a343b9b032772894a7e27fcd03ebec3c53faa5d9 by sebastian.neubauer
Revert "[AMDGPU] Insert waitcnt after returning from call"

This reverts commit ca907bfb57d8ad3ec3bcc2cff2abab7b1b933af6.

According to michel.daenzer,
> This completely broke the Mesa radeonsi driver on Navi 14. Xorg +
> xterm come up with major corruption & psychedelic colours.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/call-preserved-registers.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.128.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/memcpy-fixed-align.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/call-argument-types.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.ltolz.a16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/offset-split-global.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/non-entry-alloca.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/visit-physreg-vgpr-imm-folding-bug.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-frame-setup.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/mad-mix-hi.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-lo16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmax.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/store-hi16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/nested-calls.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.ltolz.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.96.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/imm16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll (diff)
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_load_local.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx1030.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmin.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/function-args.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.buffer.ptr.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/ret_jump.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/offset-split-flat.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-realign.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll (diff)
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/infer-uniform-load-shader.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/function-returns.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll (diff)
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/hsa-func.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fadd.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/call-waitcnt.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/load-hi16.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/smrd.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/sibling-call.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_store_local.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/store-weird-sizes.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/memory_clause.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll (diff)
Commit 474dc33d075ae6b136bcaa4e4c5014d3deda5d25 by llvm-dev
Add missing namespace closure comment. NFCI.

Fixes clang-tidy llvm-namespace-comment warning.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp (diff)
Commit 91589cf679c7946edfb5b33d1eb94d723ad99e2b by llvm-dev
Add missing namespace closure comments. NFCI.

Fixes some clang-tidy llvm-namespace-comment warnings.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombinePHI.cpp (diff)
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp (diff)
Commit c2deacd929dabded734a478e78c1eef23aa459c5 by weiwei64
[AArch64] Fix ldst optimization of non-immediate store offset

When matching store instruction for ldst opt, we should make sure store instr is in 'reg+imm' form as load instr,
otherwise, it will have assertion in isLdOffsetInRangeOfSt since it will use getImm() directly.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87905
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp (diff)
The file was addedllvm/test/CodeGen/AArch64/ldst-opt-non-imm-offset.mir
Commit e6d50b4f22dc6bbf0b0b40cfdab172bf5c1694e1 by Yaxun.Liu
recommit [HIP] Fix -gsplit-dwarf option

recommit e50465ecefc964e5700df26fc7e02a673eed085a with fix for
regression in lldb tests.

Two issues:

1. the directory part of original .dwo file was dropped
2. if the stem of the .dwo file contains '.', the last dot
and strings after that were removed

This recommit fixes those two issues.
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp (diff)
The file was addedclang/test/Driver/hip-gsplit-dwarf-options.hip
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.h (diff)
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp (diff)
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp (diff)
The file was modifiedclang/lib/Driver/ToolChains/MinGW.cpp (diff)
Commit 9abd1e8f4e5ddd6e5e592306432fb32dd68f4c14 by davelee.com
[lldb] Remove lldb-perf remenant

Delete a file remaining from the deletion of lldb-perf in D64362.

Differential Revision: https://reviews.llvm.org/D88119
The file was removedlldb/tools/lldb-perf/darwin/sketch/foobar.sketch2
Commit c538169ee99516c178ecc00a5ec5187d78941fac by zinenko
[mlir] Add insert before/after to list-like constructs in C API

Blocks in a region and operations in a block are organized in a linked list.
The C API only provides functions to append or to insert elements at the
specified numeric position in the list. The latter is expensive since it
requires to traverse the list. Add insert before/after functionality with low
cost that relies on the iplist elements being convertible to iterators.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D88148
The file was modifiedmlir/include/mlir-c/IR.h (diff)
The file was modifiedmlir/lib/CAPI/IR/IR.cpp (diff)
The file was modifiedmlir/test/CAPI/ir.c (diff)
Commit e90343ada3bda55c697e7ae06dda3f8d8d6ded34 by Yaxun.Liu
Fix regressioin in test dwp-separate-debug-file.cpp
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp (diff)
Commit 9744606614df4ba85a4d546c94b3b5ef9d3a3a96 by jurahul
[MLIR] Change default builders generated by TableGen to use TypeRange for result types

- Change the default builders to use TypeRange instead of ArrayRef<Type>
- Custom builders defined in LinalgStructuredOps now conflict with the default
  separate param ones, but the default collective params one is still needed. Resolve
  this by replicating the collective param builder as a custom builder and skipping
  the generation of default builders for these ops.

Differential Revision: https://reviews.llvm.org/D87926
The file was modifiedmlir/test/mlir-tblgen/op-result.td (diff)
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp (diff)
The file was modifiedmlir/test/mlir-tblgen/op-decl.td (diff)
The file was modifiedmlir/tools/mlir-linalg-ods-gen/mlir-linalg-ods-gen.cpp (diff)
The file was modifiedmlir/include/mlir/IR/OpBase.td (diff)
Commit 08e4f078523b528f1e699543275f1d6299886a99 by jurahul
[MLIR][NFC] Adopt use of TypeRange in build() methods.

- Use TypeRange instead of ArrayRef<Type> where possible.
- Change some of the custom builders to also use TypeRange

Differential Revision: https://reviews.llvm.org/D87944
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.td (diff)
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp (diff)
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.cpp (diff)
The file was modifiedmlir/lib/Conversion/StandardToLLVM/StandardToLLVM.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td (diff)
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertGPULaunchFuncToVulkanLaunchFunc.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td (diff)
The file was modifiedmlir/lib/Dialect/LLVMIR/IR/LLVMDialect.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/GPU/GPUOps.td (diff)
The file was modifiedmlir/lib/Conversion/LinalgToStandard/LinalgToStandard.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/StandardOps/IR/Ops.td (diff)
The file was modifiedmlir/lib/Conversion/OpenMPToLLVM/OpenMPToLLVM.cpp (diff)
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp (diff)
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp (diff)
The file was modifiedmlir/lib/Conversion/GPUToVulkan/ConvertLaunchFuncToVulkanCalls.cpp (diff)
The file was modifiedmlir/unittests/TableGen/OpBuildGen.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td (diff)
The file was modifiedmlir/lib/Dialect/GPU/IR/GPUDialect.cpp (diff)
Commit 819ff6b945816dce144c8be577a3c245f702b59c by aaron
Improve dynamic AST matching diagnostics for conversion errors

Currently, when marshaling a dynamic AST matchers, we check for the type
and value validity of matcher arguments at the same time for some matchers.
For instance, when marshaling hasAttr("foo"), the argument is first type
checked to ensure it's a string and then checked to see if that string can
locate an attribute with that name. Similar happens for other enumeration
conversions like cast kinds or unary operator kinds. If the type is
correct but the value cannot be looked up, we make a best-effort attempt
to find a nearby name that the user might have meant, but if one cannot
be found, we throw our hands up and claim the types don't match.

This has an unfortunate behavior that when the user enters something of
the correct type but a best guess cannot be located, you get confusing
error messages like:
Incorrect type for arg 1. (Expected = string) != (Actual = String).

This patch splits the argument check into two parts: if the types don't
match, give a type diagnostic. If the type matches but the value cannot
be converted, give a best guess diagnostic or a value could not be
located diagnostic. This addresses PR47057.
The file was modifiedclang/lib/ASTMatchers/Dynamic/Marshallers.h (diff)
The file was modifiedclang/unittests/ASTMatchers/Dynamic/ParserTest.cpp (diff)
Commit f6aceb72d6b2d13d03713ba05bc47c0f9e550c26 by joker.eph
Update the documentation for the MLIR Dialect class (NFC)
The file was modifiedmlir/include/mlir/IR/Dialect.h (diff)
Commit a6ae6950173a01c8a620a5664fcfb18816d152e7 by jurahul
[MLIR][NFC] Adopt use of BlockRange in place of ArrayRef<Block *>

- Use BlockRange in ODS generated builders as well as other places throughout the code

Differential Revision: https://reviews.llvm.org/D87955
The file was modifiedmlir/include/mlir/IR/OperationSupport.h (diff)
The file was modifiedmlir/lib/Dialect/SPIRV/Serialization/Serializer.cpp (diff)
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp (diff)
The file was modifiedmlir/lib/IR/OperationSupport.cpp (diff)
The file was modifiedmlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td (diff)
Commit b522f09d963b50895f8c18d33e6a5aceccc1fadc by stellaraccident
Remove MLIR C-API explicit registration of standard ops.

* Added mlirRegisterAllDialects() to the python API until a more complete registration design emerges for it.

Differential Revision: https://reviews.llvm.org/D88155
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp (diff)
The file was modifiedmlir/lib/CAPI/IR/IR.cpp (diff)
Commit b8779337841bea03bc514d239ce76eceba3f01dd by David A Greene
[UpdateTestChecks] Remove bug-exposing test

Remove RISCV codegen tests for --include-generated-funcs because apparently
MachineOutliner has a bug on that target that is exposed by expensive-checks.
The file was removedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.generated.expected
The file was removedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/riscv_generated_funcs.test
The file was removedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll
The file was removedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/riscv_generated_funcs.ll.nogenerated.expected
Commit 63998649dd4886ecf9b5c8304173cb0c7357cd5d by stellaraccident
NFC: Remove dangling dep on MLIRStandardOps.

Was inadvertently left out of D88155.
The file was modifiedmlir/lib/CAPI/IR/CMakeLists.txt (diff)
Commit fd75ad86624eaebf21e544335ea28f12e54a5ec1 by carrot
[MBFIWrapper] Add a new function getBlockProfileCount

MBFIWrapper keeps track of block frequencies of newly created blocks and
modified blocks, modified block frequencies should also impact block profile
count. This class doesn't provide interface getBlockProfileCount, users can only
use the underlying MBFI to query profile count, the underlying MBFI doesn't know
the modifications made in MBFIWrapper, so it either provides stale profile count
for modified block or simply crashes on new blocks.

So this patch add function getBlockProfileCount to class MBFIWrapper to handle
new blocks or modified blocks.

Differential Revision: https://reviews.llvm.org/D87802
The file was modifiedllvm/lib/CodeGen/MachineBlockPlacement.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/MBFIWrapper.h (diff)
The file was modifiedllvm/lib/CodeGen/MBFIWrapper.cpp (diff)
Commit 437358be7179d570de070bbb9b2e1154db727f6d by mtrofin
[clang]Test ensuring -fembed-bitcode passed to cc1 captures pre-opt bitcode.

This is important to not regress because it allows us to capture pre-optimization
bitcode and options, and replay the full optimization pipeline.

Differential Revision: https://reviews.llvm.org/D88114
The file was addedclang/test/Frontend/embed-bitcode-noopt.c
The file was addedclang/test/Frontend/embed-bitcode-noopt.ll
Commit 68358081585b160c38443425935457235a4b9d1a by dmantipov
Add optimal thread strategy

Add an optimal thread strategy to execute specified amount of tasks.
This strategy should prevent us from creating too many threads if we
occasionaly have an unexpectedly small amount of tasks.

Differential Revision: https://reviews.llvm.org/D87765
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/ManualDWARFIndex.cpp (diff)
The file was modifiedllvm/include/llvm/Support/Threading.h (diff)
Commit 577adda54f075b256007ed4fa80c9988a0642a87 by rengolin
[Support/Path] Add path::is_absolute_gnu

Implements IS_ABSOLUTE_PATH from GNU tools.

C++17 is_absolute behavior is different the from the behavior defined by GNU
tools.

According to cppreference.com, C++17 states: "An absolute path is a path
that unambiguously identifies the location of a file without reference
to an additional starting location."

In other words, the rules are:
1. POSIX style paths with nonempty root directory are absolute.
2. Windows style paths with nonempty root name and root directory are
    absolute.
3. No other paths are absolute.

GNU rules are:
1. Paths starting with a path separator are absolute.
2. Windows style paths are also absolute if they start with a character
    followed by ':'.
3. No other paths are absolute.

On Windows style the path "C:\Users\Default" has "C:" as root name and "\"
as root directory.

Hence "C:" on Windows is absolute under GNU rules and not absolute under
C++17 because it has no root directory. Likewise "/" and "\" on Windows are
absolute under GNU and are not absolute under C++17 due to empty root name.

Related to PR46368.

Differential Revision: https://reviews.llvm.org/D87667
The file was modifiedllvm/include/llvm/Support/Path.h (diff)
The file was modifiedllvm/lib/Support/Path.cpp (diff)
The file was modifiedllvm/unittests/Support/Path.cpp (diff)
Commit 271928792e8016109fdd909889dc6bb582aa6f46 by mtrofin
Add REQUIRES to embed-bitcode-noopt.ll
The file was modifiedclang/test/Frontend/embed-bitcode-noopt.ll (diff)
Commit e976fb1e54f30403ca31764da69cba3769487e6a by kparzysz
[EarlyCSE] Fix crash with expensive checks after D87691

D87691 reordered some checks, which turned out to be unsafe. More
specifically, when examining a store instruction, the check against
getOrCreateResult should be done before attempting to call
isSameMemGeneration. Otherwise a crash in MSSA walker can occur.

This patch restores the order of these calls to what it was originally.
The file was addedllvm/test/Transforms/EarlyCSE/getmatchingvalue-crash.ll
The file was modifiedllvm/lib/Transforms/Scalar/EarlyCSE.cpp (diff)
Commit 01b9deba76a950f04574b656c7c31ae389104f2d by i
Revert D87970 "[ThinLTO] Avoid temporaries when loading global decl attachment metadata"

This reverts commit ab1b4810b55279bcf6fdd87be74a403440be3991.

It caused an issue in llvm::lto::thinBackend for a -fsanitize=cfi build.

```
AbbrevNo is 0 => "Invalid abbrev number"
0  llvm::BitstreamCursor::getAbbrev (this=0x9db4c8, AbbrevID=4) at llvm/include/llvm/Bitstream/BitstreamReader.h:528
1  0x00007f5f777a6eb4 in llvm::BitstreamCursor::readRecord (this=0x9db4c8, AbbrevID=4, Vals=llvm::SmallVector of Size 0, Capacity 64, Blob=0x7ffcd0e26558) at
usr/local/google/home/maskray/llvm/llvm/lib/Bitstream/Reader/BitstreamReader.cpp:228
2  0x00007f5f796bf633 in llvm::MetadataLoader::MetadataLoaderImpl::lazyLoadOneMetadata (this=0x9db3a0, ID=188, Placeholders=...) at /usr/local/google/home/mas
ray/llvm/llvm/lib/Bitcode/Reader/MetadataLoader.cpp:1091
3  0x00007f5f796c2527 in llvm::MetadataLoader::MetadataLoaderImpl::getMetadataFwdRefOrLoad (this=0x9db3a0, ID=188) at llvm
lib/Bitcode/Reader/MetadataLoader.cpp:668
4  0x00007f5f796bfff3 in llvm::MetadataLoader::getMetadataFwdRefOrLoad (this=0xd31580, Idx=188) at llvm/lib/Bitcode/Reader
MetadataLoader.cpp:2290
5  0x00007f5f79638265 in (anonymous namespace)::BitcodeReader::parseFunctionBody (this=0xd312e0, F=0x9de758) at llvm/lib/B
tcode/Reader/BitcodeReader.cpp:3938
6  0x00007f5f79635d32 in (anonymous namespace)::BitcodeReader::materialize (this=0xd312e0, GV=0x9de758) at llvm/lib/Bitcod
/Reader/BitcodeReader.cpp:5408
7  0x00007f5f7f8dbe3e in llvm::Module::materialize (this=0x9b92c0, GV=0x9de758) at llvm/lib/IR/Module.cpp:442
8  0x00007f5f7f7f8fbe in llvm::GlobalValue::materialize (this=0x9de758) at llvm/lib/IR/Globals.cpp:50
9  0x00007f5f83b9b5f5 in llvm::FunctionImporter::importFunctions (this=0x7ffcd0e2a730, DestModule=..., ImportList=...) at
llvm/lib/Transforms/IPO/FunctionImport.cpp:1182
```
The file was modifiedllvm/test/ThinLTO/X86/devirt2.ll (diff)
The file was modifiedllvm/lib/Bitcode/Reader/MetadataLoader.cpp (diff)
Commit 76e8c1899e7c9f9462ba08387472899d7de965af by kparzysz
Break long line accidentally left in the previous commit
The file was modifiedllvm/lib/Transforms/Scalar/EarlyCSE.cpp (diff)
Commit d882ca7f1f1dee7d812d6b1ae060b5f671ab9ebc by dmantipov
[Driver] Check whether Gentoo-specific configuration directory exists

Check whether /etc/env.d/gcc exists before trying to read from any
file from there. This saves a few OS calls on a non-Gentoo system.

Differential Revision: https://reviews.llvm.org/D87143
The file was modifiedclang/lib/Driver/ToolChains/Gnu.h (diff)
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp (diff)
Commit 7d0bbe40901cf60558c619c3174d71d7c53ca144 by tmsriram
Re-apply https://reviews.llvm.org/D87921, was reverted to triage a PPC bot failure.

D87921 was reverted in commit b89059a31347dd09b55a96b99b3dbe38d7749908
as it was causing an unknown llvm PPC bot failure.  Reapplying the patch
after confirming that this is not responsible. Build bot failure:
https://reviews.llvm.org/D87921#2286644  which caused the revert.

The wrong placement of add pass with optimizations led to
-funique-internal-linkage-names being disabled.

Fixed the placement of the MPM.addpass for UniqueInternalLinkageNames to make it
work correctly with -O2 and new pass manager. Updated the tests to explicitly
check O0 and O1.

Differential Revision: https://reviews.llvm.org/D87921
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp (diff)
The file was modifiedclang/test/CodeGen/unique-internal-linkage-names.cpp (diff)
Commit b3931188fdc84ce2bd93a0770ddc8182d18c5010 by paul
Enhance TableGen so that backends can produce better error messages.

Modify SearchableTableEmitter.cpp to take advantage.
Clean up formatting and capitalization issues.
The file was modifiedllvm/include/llvm/TableGen/Record.h (diff)
The file was modifiedllvm/lib/TableGen/TGParser.cpp (diff)
The file was modifiedllvm/test/TableGen/self-reference-typeerror.td (diff)
The file was modifiedllvm/lib/TableGen/Error.cpp (diff)
The file was modifiedllvm/test/TableGen/if-type.td (diff)
The file was modifiedllvm/test/TableGen/getsetop.td (diff)
The file was modifiedllvm/include/llvm/TableGen/Error.h (diff)
The file was modifiedllvm/test/TableGen/cond-type.td (diff)
The file was modifiedllvm/test/TableGen/generic-tables.td (diff)
The file was modifiedllvm/lib/TableGen/Record.cpp (diff)
The file was modifiedllvm/utils/TableGen/SearchableTableEmitter.cpp (diff)
Commit 5dd1b6d612655c9006ba97a8b6487ded80719b48 by epastor
[ms] [llvm-ml] Add support for .radix directive, and accept all radix specifiers

Add support for .radix directive, and radix specifiers [yY] (binary), [oOqQ] (octal), and [tT] (decimal).

Also, when lexing MASM integers, require radix specifier; MASM requires that all literals without a radix specifier be treated as in the default radix. (e.g., 0100 = 100)

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D87400
The file was addedllvm/test/tools/llvm-ml/radix_errors.test
The file was addedllvm/test/tools/llvm-ml/radix.test
The file was modifiedllvm/lib/MC/MCParser/AsmLexer.cpp (diff)
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
The file was modifiedllvm/lib/MC/MCParser/COFFMasmParser.cpp (diff)
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp (diff)
The file was modifiedllvm/include/llvm/MC/MCParser/MCAsmLexer.h (diff)
Commit 6189a8d9f56ac9434eac94d6c515d3e460fdecd0 by spatel
[TTI] add wrapper for matching vector reduction to reduce code duplication; NFC

I'm not sure what this means, but the order in which we try
the matches makes a difference on at least 1 regression test...
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h (diff)
Commit aca7105db9ae1a42d7cbf48934abb51169945425 by epastor
Fix include location (accidentally committed a local variation)
The file was modifiedllvm/lib/MC/MCParser/AsmLexer.cpp (diff)
Commit f21f835ee8e52f128281697d66f8b11a50a6d5dd by craig.topper
[X86] Improve demanded bits for X86ISD::BEXTR.

If the control is constant we can figure out exactly which bits
of the input are demanded.

Differential Revision: https://reviews.llvm.org/D88072
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/X86/tbm-intrinsics.ll (diff)
Commit 7a3c643c35590df67716dfe3e3c60195ae385e43 by craig.topper
[SLP] Make HorizontalReduction::getOperationData take an Instruction* instead of a Value*. NFCI

All of the callers already have an Instruction *. Many of them
from a dyn_cast.

Also update the OperationData constructor to use a Instruction&
to remove a dyn_cast and make it clear that the pointer is non-null.

Differential Revision: https://reviews.llvm.org/D88132
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp (diff)
Commit b901b6ab173ac77edfe97e0dbd138410b940b4bc by epastor
Revert "[ms] [llvm-ml] Add support for .radix directive, and accept all radix specifiers"

This reverts commit 5dd1b6d612655c9006ba97a8b6487ded80719b48.
The file was modifiedllvm/lib/Target/X86/AsmParser/X86AsmParser.cpp (diff)
The file was modifiedllvm/lib/MC/MCParser/AsmLexer.cpp (diff)
The file was removedllvm/test/tools/llvm-ml/radix.test
The file was modifiedllvm/lib/MC/MCParser/COFFMasmParser.cpp (diff)
The file was modifiedllvm/lib/MC/MCParser/MasmParser.cpp (diff)
The file was modifiedllvm/include/llvm/MC/MCParser/MCAsmLexer.h (diff)
The file was removedllvm/test/tools/llvm-ml/radix_errors.test
Commit 55f5a0137f5bbfc8411bd11a5d2695ba84534345 by joker.eph
Update Phabricator doc to remove the warning on "arc land": tags a properly handled server side now
The file was modifiedllvm/docs/Phabricator.rst (diff)
Commit 5281ba1994bdd21309d694c44e43ed825294221c by joker.eph
Document the `--verbatim` flag from arc to update the description for a phabricator revision
The file was modifiedllvm/docs/Phabricator.rst (diff)
Commit 0caad9fe441d5ee562e96d8b30b5574b492a933a by mcgrathr
[lsan] On Fuchsia, don't use atexit hook for leak checks

Fuchsia's system libraries are instrumented and use the lsan
allocator for internal purposes.  So leak checking needs to run
after all atexit hooks and after the system libraries' internal
exit-time hooks.  The <zircon/sanitizer.h> hook API calls the
__sanitizer_process_exit_hook function at exactly the right time.

Reviewed By: vitalybuka, phosek

Differential Revision: https://reviews.llvm.org/D86171
The file was modifiedcompiler-rt/lib/asan/asan_internal.h (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan.h (diff)
The file was modifiedcompiler-rt/lib/asan/asan_posix.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_rtl.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan_common_fuchsia.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_win.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_fuchsia.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan_fuchsia.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan_posix.cpp (diff)
Commit 11a75e6c92c9bde26f3c925b25135c2461afac1c by aeubanks
[gn build] Allow option to build with asan/tsan/ubsan

Reviewed By: thakis

Differential Revision: https://reviews.llvm.org/D88056
The file was modifiedllvm/utils/gn/build/buildflags.gni (diff)
The file was modifiedllvm/utils/gn/build/BUILD.gn (diff)
Commit d14cfe10341681d18edf05ac98da2c5241b0864e by joker.eph
[mlir][OpFormatGen] Update "custom" directives for attributes.

This tweaks the generated code for parsing attributes with a custom
directive to call `addAttribute` on the `OperationState` directly,
and adds a newline after this call. Previously, the generated code
would call `addAttribute` on the `OperationState` field `attributes`,
which has no such method and fails to compile. Furthermore, the lack
of newline would generate code with incorrectly formatted single line
`if` statements. Added tests for parsing and printing attributes with
a custom directive.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D87860
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td (diff)
The file was modifiedmlir/test/mlir-tblgen/op-format.mlir (diff)
The file was modifiedmlir/test/lib/Dialect/Test/TestDialect.cpp (diff)
The file was modifiedmlir/tools/mlir-tblgen/OpFormatGen.cpp (diff)
Commit b92d084910b9febdafb9e701af6b73ddb7cac5af by efriedma
[AArch64][SVE] Fix frame offset calculation when d8 is saved.

If d8 is saved, the fp is not actually adjacent to the SVE
spills/allocations.  Fix the offset calculation to account for this.

Differential Revision: https://reviews.llvm.org/D88117
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/framelayout-sve.mir (diff)
Commit 3726ac41e9e00d2f6f87779b68f91ea264223c8a by jingham
Add `breakpoint delete --disabled`: deletes all disabled breakpoints.

Differential Revision: https://reviews.llvm.org/D88129
The file was modifiedlldb/test/API/functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py (diff)
The file was modifiedlldb/source/Commands/CommandObjectBreakpoint.cpp (diff)
The file was modifiedlldb/source/Commands/Options.td (diff)
Commit 59691dc8740c7eada7fcf5552e0d2377780c6fb7 by Stanislav.Mekhanoshin
[AMDGPU] Make ds fp atomics overloadable

Differential Revision: https://reviews.llvm.org/D87947
The file was modifiedllvm/include/llvm/IR/IntrinsicsAMDGPU.td (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was modifiedclang/test/CodeGenCUDA/builtins-amdgcn.cu (diff)
The file was modifiedclang/test/CodeGenOpenCL/builtins-amdgcn-vi.cl (diff)
The file was modifiedllvm/test/CodeGen/AMDGPU/lds_atomic_f32.ll (diff)
Commit 6ada9e516f495eb6aa63e0c3e3edf3e3ae3c1a63 by andrew.litteken
[IRSim] Adding IRSimilarityCandidate that contains a region of IRInstructionData.

The IRSimilarityCandidate is a container to hold a region of
IRInstructions and offer interfaces for the starting instruction, ending
instruction, parent function, length.  It also assigns a global value
number for each unique instance of a value in the region.

It also contains an interface to compare two IRSimilarity as to whether
they have the same sequence of similar instructions.

Tests for whether the instructions are similar are found in
unittests/Analysis/IRSimilarityIdentifierTest.cpp.

Recommit of: 4944bb190fed8861d4d043eaf45e3c1e12aa2dc5

Differential Revision: https://reviews.llvm.org/D86970
The file was modifiedllvm/lib/Analysis/IRSimilarityIdentifier.cpp (diff)
The file was modifiedllvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp (diff)
The file was modifiedllvm/include/llvm/Analysis/IRSimilarityIdentifier.h (diff)
Commit 652a8f150d4903abb53697ef1762026c6f5e716c by wei.huang
[PowerPC][PCRelative] Thread Local Storage Support for Local Dynamic

This patch is the initial support for the Local Dynamic Thread Local Storage
model to produce code sequence and relocation correct to the ABI for the model
when using PC relative memory operations.

Differential Revision: https://reviews.llvm.org/D87721
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCMCInstLower.cpp (diff)
The file was modifiedllvm/include/llvm/MC/MCExpr.h (diff)
The file was addedllvm/test/CodeGen/PowerPC/pcrel-tls-local-dynamic.ll
The file was modifiedllvm/lib/Target/PowerPC/PPC.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td (diff)
The file was modifiedllvm/lib/MC/MCExpr.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h (diff)
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp (diff)
The file was modifiedllvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def (diff)
The file was addedllvm/test/MC/PowerPC/pcrel-tls-local-dynamic-reloc.s
Commit c96d0cceb684fa176b51d7df5f4f8370e2c983f4 by mcgrathr
asan: Use `#if` to test CAN_SANITIZE_LEAKS

The `if (0)` isn't necessarily optimized out so as not to create
a link-time reference to LSan runtime functions that might not
exist.  So use explicit conditional compilation instead.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D88173
The file was modifiedcompiler-rt/lib/lsan/lsan_common_fuchsia.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_rtl.cpp (diff)
Commit 2efc09c90914a6c887cb772130d6b375a1713472 by kostyak
[scudo][standalone] Fix tests under ASan/UBSan

Fix a potential UB in `appendSignedDecimal` (with -INT64_MIN) by making
it a special case.

Fix the terrible test cases for `isOwned`: I was pretty sloppy on those
and used some stack & static variables, but since `isOwned` accesses
memory prior to the pointer to check for the validity of the Scudo
header, it ended up being detected as some global and stack buffer out
of bounds accesses. So not I am using buffers with enough room so that
the test will not access memory prior to the variables.

With those fixes, the tests pass on the ASan+UBSan Fuchsia build.

Thanks to Roland for pointing those out!

Differential Revision: https://reviews.llvm.org/D88170
The file was modifiedcompiler-rt/lib/scudo/standalone/tests/combined_test.cpp (diff)
The file was modifiedcompiler-rt/lib/scudo/standalone/string_utils.cpp (diff)
Commit f161e84c10b6eb2255345ebfaaa2bbadb4b0fe2a by nikita.ppv
Revert "[lsan] On Fuchsia, don't use atexit hook for leak checks"

This reverts commit 0caad9fe441d5ee562e96d8b30b5574b492a933a.
This reverts commit c96d0cceb684fa176b51d7df5f4f8370e2c983f4.

Causes linker errors which were not fixed by the subsequent commit
either:

/home/nikic/llvm-project/compiler-rt/lib/asan/asan_rtl.cpp:503: error: undefined reference to '__asan::InstallAtExitCheckLeaks()'
The file was modifiedcompiler-rt/lib/asan/asan_rtl.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan_fuchsia.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_posix.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan.h (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan_posix.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_fuchsia.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan_common_fuchsia.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_win.cpp (diff)
The file was modifiedcompiler-rt/lib/lsan/lsan.cpp (diff)
The file was modifiedcompiler-rt/lib/asan/asan_internal.h (diff)