SuccessChanges

Summary

  1. [ARM] Added more patterns to generate SSAT/USAT with shift (details)
  2. [llvm] Fix unused variable in non-debug configurations (details)
  3. [ARM][LowOverheadLoops] Cleanup and re-arrange (details)
  4. [AMDGPU] Reformat AMDGPUTargetLowering::isSDNodeAlwaysUniform. NFC. (details)
  5. [clang][codegen] Annotate `correctly-rounded-divide-sqrt-fp-math` fn-attr for OpenCL only. (details)
  6. Revert "Add the ability to write target stop-hooks using the ScriptInterpreter." (details)
  7. [clangd] Add a trained DecisionForest for code completion. (details)
  8. [ubsan] nullability-arg: Fix crash on C++ member pointers (details)
  9. [unittests] Preserve LD_LIBRARY_PATH in crash recovery test (details)
  10. [AArch64] Reuse map iterator instead of double lookup. NFC (details)
  11. Add FunctionType to MLIR C and Python bindings. (details)
  12. [clangd] Use Decision Forest to score code completions. (details)
  13. [InstCombine] Add basic trunc(shr(trunc(x),c)) tests (details)
  14. [GlobalISel] Combine (xor (and x, y), y) -> (and (not x), y) (details)
  15. [AArch64][GlobalISel] Support shifted register form in emitTST (details)
  16. [CostModel] split handling of intrinsics from other calls (details)
  17. [CostModel] move early exit for free intrinsics (details)
  18. [AArch64][GlobalISel] Infer whether G_PHI is going to be a FPR in regbankselect (details)
  19. [WebAssembly] Use wasm::Signature for in ObjectWriter (NFC) (details)
  20. [InstCombine] Add trunc(shr(trunc(x),c)) non-uniform vector tests (details)
  21. [AddressSanitizer] Copy type metadata to prevent miscompilation (details)
  22. [clangd] Rename evaluate() to evaluateHeuristics() (details)
  23. Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar." (details)
  24. [AArch64] reuse another map iterator. NFC (details)
  25. [mlir] [VectorOps] changes to printing support for integers (details)
  26. scudo: Re-order Allocator fields for improved performance. NFCI. (details)
  27. [python][tests] Fix string comparison with "is" (details)
  28. [CostModel] fill in arguments as part of intrinsic attribute constructor (details)
  29. [PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types (details)
  30. [lldb] Enable markdown support for documentation (details)
  31. Once we've found a firmware binary and loaded it, don't search more (details)
  32. [CostModel] remove hack for intrinsic cost based on cost type (details)
  33. [wasm] Move WasmTraits.h to BinaryFormat (details)
  34. [libc++] Fix heap UaF issue in coroutine test (details)
  35. [libc++] Add UNSUPPORTED markup to atomic test in single-threaded mode (details)
  36. [libc++] Replace uses of __libcpp_allocate by std::allocator<> (details)
  37. [COFF] Aliases resolve directly to defined external targets (details)
  38. [InstCombine] Regenerate cast tests. NFC. (details)
  39. [X86] Use inlineasm flag output for the _bittest* intrinsics. (details)
  40. [mlir] [VectorOps] Relaxed restrictions on vector.reduction types even more (details)
  41. Revert "Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar."" (details)
  42. [lldb] Add print_function import (details)
  43. Fix a think-o with the numerical suffixes in the docs for init_priority. (details)
  44. [gn build] Re-run CompletionModelCodegen when input json files change (details)
  45. [CMake][AIX] Limit tools in external project build (details)
  46. [GlobalISel] Add support for lowering of vector G_SELECT and use for AArch64. (details)
Commit 675431b9878776e3c919b79162774a9cdabdaa4c by meera.nakrani
[ARM] Added more patterns to generate SSAT/USAT with shift

Added patterns to generate an SSAT or USAT with shift for
SSAT/USAT instructions that are matched from IR patterns.

Differential Revision: https://reviews.llvm.org/D88145
The file was modifiedllvm/test/CodeGen/ARM/usat-with-shift.ll (diff)
The file was modifiedllvm/test/CodeGen/Thumb2/mve-satmul-loops.ll (diff)
The file was modifiedllvm/lib/Target/ARM/ARMInstrThumb2.td (diff)
The file was modifiedllvm/lib/Target/ARM/ARMInstrInfo.td (diff)
The file was modifiedllvm/test/CodeGen/ARM/ssat-with-shift.ll (diff)
Commit 509fba75dff2382b867f5962e02fb0a899a5fa18 by tpopp
[llvm] Fix unused variable in non-debug configurations
The file was modifiedllvm/lib/Target/ARM/MVETailPredication.cpp (diff)
Commit e82a0084d322948b94a5ca3213237d5eeab4920f by sam.parker
[ARM][LowOverheadLoops] Cleanup and re-arrange

Rename and reorganise how we decide where to put the LoopStart
instruction.
The file was modifiedllvm/lib/Target/ARM/ARMLowOverheadLoops.cpp (diff)
Commit 0e0a0c8d2ce4945c3c14d2805ff264c407143423 by jay.foad
[AMDGPU] Reformat AMDGPUTargetLowering::isSDNodeAlwaysUniform. NFC.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp (diff)
Commit 5dbf80cad9556e222c4383960007fc0b27ea9541 by michael.hliao
[clang][codegen] Annotate `correctly-rounded-divide-sqrt-fp-math` fn-attr for OpenCL only.

- `-cl-fp32-correctly-rounded-divide-sqrt` is an OpenCL-specific option
  and `correctly-rounded-divide-sqrt-fp-math` should be added for OpenCL
  at most.

Differential revision: https://reviews.llvm.org/D88303
The file was modifiedclang/test/CodeGen/math-libcalls.c (diff)
The file was modifiedclang/test/CodeGen/math-builtins.c (diff)
The file was modifiedclang/test/CodeGen/complex-builtins.c (diff)
The file was modifiedclang/lib/CodeGen/CGCall.cpp (diff)
The file was modifiedclang/test/CodeGen/complex-libcalls.c (diff)
Commit f775fe59640a2e837ad059a8f40e26989d4f9831 by Jonas Devlieghere
Revert "Add the ability to write target stop-hooks using the ScriptInterpreter."

This temporarily reverts commit b65966cff65bfb66de59621347ffd97238d3f645
while Jim figures out why the test is failing on the bots.
The file was modifiedlldb/bindings/python/python-swigsafecast.swig (diff)
The file was modifiedlldb/include/lldb/Symbol/SymbolContext.h (diff)
The file was modifiedlldb/bindings/python/python-wrapper.swig (diff)
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp (diff)
The file was modifiedlldb/docs/use/python-reference.rst (diff)
The file was modifiedlldb/source/Commands/Options.td (diff)
The file was modifiedlldb/include/lldb/Target/Target.h (diff)
The file was modifiedlldb/include/lldb/Interpreter/ScriptInterpreter.h (diff)
The file was modifiedlldb/source/Commands/CommandObjectTarget.cpp (diff)
The file was modifiedlldb/source/Symbol/SymbolContext.cpp (diff)
The file was modifiedlldb/source/Target/Target.cpp (diff)
The file was modifiedlldb/unittests/ScriptInterpreter/Python/PythonTestSuite.cpp (diff)
The file was modifiedlldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h (diff)
The file was removedlldb/test/API/commands/target/stop-hooks/TestStopHookScripted.py
The file was removedlldb/test/API/commands/target/stop-hooks/stop_hook.py
The file was removedlldb/test/Shell/Commands/command-stop-hook-output.test
The file was modifiedlldb/test/API/commands/target/stop-hooks/main.c (diff)
The file was modifiedlldb/test/API/commands/target/stop-hooks/TestStopHooks.py (diff)
The file was removedlldb/test/Shell/Commands/Inputs/stop_hook.py
Commit b5f7e9e26cd06d034bf68f63de6ae6d37b032b5e by usx
[clangd] Add a trained DecisionForest for code completion.

Replaces the dummy CodeCompletion model with a trained DecisionForest
model.
The features.json needs to be manually curated specifying the features
to be used. This is a one-time cost and does not change if the model
changes until we decide to add/remove features.

Differential Revision: https://reviews.llvm.org/D88071
The file was modifiedclang-tools-extra/clangd/quality/model/features.json (diff)
The file was modifiedclang-tools-extra/clangd/quality/model/forest.json (diff)
Commit 06bc685fa2400cc28282ab6dd3c917d45bfa662f by Vedant Kumar
[ubsan] nullability-arg: Fix crash on C++ member pointers

Extend -fsanitize=nullability-arg to handle call sites which accept C++
member pointers.

rdar://62476022

Differential Revision: https://reviews.llvm.org/D88336
The file was modifiedclang/lib/CodeGen/CGCall.cpp (diff)
The file was modifiedclang/lib/CodeGen/CodeGenFunction.h (diff)
The file was addedclang/test/CodeGenCXX/ubsan-nullability-arg.cpp
The file was modifiedclang/lib/CodeGen/CGExpr.cpp (diff)
Commit 07b7a24e3fe86fe64ba5a56629cb290f3bd3b86d by mikhail.maltsev
[unittests] Preserve LD_LIBRARY_PATH in crash recovery test

We need to preserve the LD_LIBRARY_PATH environment variable when
spawning a child process (certain setups rely on non-standard paths
for e.g. libstdc++). In order to achieve this, set
LLVM_CRC_UNIXCRCRETURNCODE in the parent process instead of creating
the child's environment from scratch.

Reviewed By: aganea

Differential Revision: https://reviews.llvm.org/D88308
The file was modifiedllvm/unittests/Support/CrashRecoveryTest.cpp (diff)
Commit 37ef2255b6422b8e0b93f0becd340e041047a2aa by jonathan_roelofs
[AArch64] Reuse map iterator instead of double lookup. NFC
The file was modifiedllvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp (diff)
Commit 76753a597b5d9bf4addf19399ae30c4b3870a4a6 by stellaraccident
Add FunctionType to MLIR C and Python bindings.

Differential Revision: https://reviews.llvm.org/D88416
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp (diff)
The file was modifiedmlir/include/mlir-c/StandardTypes.h (diff)
The file was modifiedmlir/test/CAPI/ir.c (diff)
The file was modifiedmlir/lib/CAPI/IR/StandardTypes.cpp (diff)
The file was modifiedmlir/test/Bindings/Python/ir_types.py (diff)
Commit a8b55b6939a5962d5b2bf1a57980562d6f3045e5 by usx
[clangd] Use Decision Forest to score code completions.

By default clangd will score a code completion item using heuristics model.

Scoring can be done by Decision Forest model by passing `--ranking_model=decision_forest` to
clangd.

Features omitted from the model:
- `NameMatch` is excluded because the final score must be multiplicative in `NameMatch` to allow rescoring by the editor.
- `NeedsFixIts` is excluded because the generating dataset that needs 'fixits' is non-trivial.

There are multiple ways (heuristics) to combine the above two features with the prediction of the DF:
- `NeedsFixIts` is used as is with a penalty of `0.5`.

Various alternatives of combining NameMatch `N` and Decision forest Prediction `P`
- N * scale(P, 0, 1): Linearly scale the output of model to range [0, 1]
- N * a^P:
  - More natural: Prediction of each Decision Tree can be considered as a multiplicative boost (like NameMatch)
  - Ordering is independent of the absolute value of P. Order of two items is proportional to `a^{difference in model prediction score}`. Higher `a` gives higher weightage to model output as compared to NameMatch score.

Baseline MRR = 0.619
MRR for various combinations:
N * P = 0.6346, advantage%=2.5768
N * 1.1^P = 0.6600, advantage%=6.6853
N * **1.2**^P = 0.6669, advantage%=**7.8005**
N * **1.3**^P = 0.6668, advantage%=**7.7795**
N * **1.4**^P = 0.6659, advantage%=**7.6270**
N * 1.5^P = 0.6646, advantage%=7.4200
N * 1.6^P = 0.6636, advantage%=7.2671
N * 1.7^P = 0.6629, advantage%=7.1450
N * 2^P = 0.6612, advantage%=6.8673
N * 2.5^P = 0.6598, advantage%=6.6491
N * 3^P = 0.6590, advantage%=6.5242
N * scaled[0, 1] = 0.6465, advantage%=4.5054

Differential Revision: https://reviews.llvm.org/D88281
The file was modifiedclang-tools-extra/clangd/CodeComplete.cpp (diff)
The file was modifiedclang-tools-extra/clangd/CodeComplete.h (diff)
The file was modifiedclang-tools-extra/clangd/Quality.h (diff)
The file was modifiedclang-tools-extra/clangd/Quality.cpp (diff)
The file was modifiedclang-tools-extra/clangd/unittests/CodeCompleteTests.cpp (diff)
The file was modifiedclang-tools-extra/clangd/tool/ClangdMain.cpp (diff)
Commit ad4f11a9d38339848318b4a476a8d3d53a7d1f3f by llvm-dev
[InstCombine] Add basic trunc(shr(trunc(x),c)) tests

Helps improve the minor regressions noticed on D88316
The file was addedllvm/test/Transforms/InstCombine/trunc-shift-trunc.ll
Commit a52e78012a548c231fb8cba81861f6ffb2246726 by Jessica Paquette
[GlobalISel] Combine (xor (and x, y), y) -> (and (not x), y)

When we see this:

```
%and = G_AND %x, %y
%xor = G_XOR %and, %y
```

Produce this:

```
%not = G_XOR %x, -1
%new_and = G_AND %not, %y
```

as long as we are guaranteed to eliminate the original G_AND.

Also matches all commuted forms. E.g.

```
%and = G_AND %y, %x
%xor = G_XOR %y, %and
```

will be matched as well.

Differential Revision: https://reviews.llvm.org/D88104
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/prelegalizercombiner-xor-of-and-with-same-reg.mir
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td (diff)
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h (diff)
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/AArch64Combine.td (diff)
Commit f55a5186c6c005fe171a35a832000829cd00cd2a by Jessica Paquette
[AArch64][GlobalISel] Support shifted register form in emitTST

Support emitting ANDSXrs and ANDSWrs in `emitTST`. Update opt-fold-compare.mir
to show that it works.

Differential Revision: https://reviews.llvm.org/D87530
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/opt-fold-compare.mir (diff)
Commit 1121a583b8875d7c621f32b3a42498986c0617d9 by spatel
[CostModel] split handling of intrinsics from other calls

This should be close to NFC (no-functional-change), but I
can't completely rule out that some call on some target
travels down a different path. There's an especially large
amount of code spaghetti in this part of the cost model.

The goal is to clean up the intrinsic cost handling so
we can canonicalize to the new min/max intrinsics without
causing regressions.
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
Commit 745abbbb852e3c0006f22b7beade820ac978252c by spatel
[CostModel] move early exit for free intrinsics

This should be NFC unless some target was expecting that
some form of cttz/ctlz/memcpy is free in terms of size/latency
but not free in throughput cost.
The file was modifiedllvm/include/llvm/CodeGen/BasicTTIImpl.h (diff)
Commit 9d7ec46f5740d7626171c2b8198f825176991e0a by Jessica Paquette
[AArch64][GlobalISel] Infer whether G_PHI is going to be a FPR in regbankselect

Some instructions (G_LOAD, G_SELECT, G_UNMERGE_VALUES) check if their uses
will define/use FPRs (using `onlyUsesFP` and `onlyDefinesFP`).

The register bank of a use isn't necessarily known when an instruction asks for
this.

Teach `hasFPConstraints` to look at the instructions feeding into a G_PHI when
its destination bank is unknown. If any of them are FPR, assume the entire
G_PHI will also be assigned a FPR.

Since a phi can have many inputs, and those inputs can in turn be phis,
restrict the search depth to a very low number.

Also improve the docs for `hasFPConstraints` and friends a little.

This is a 0.3% code size improvement on CTMark/Bullet at -O3, and a 0.2% code
size improvement at CTMark/pairlocalalign at -O3.

Differential Revision: https://reviews.llvm.org/D88177
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/regbank-fp-use-def.mir (diff)
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64RegisterBankInfo.h (diff)
Commit 4c41fb5ad70caeda7f03f0049fb1dff9934dfc53 by aheejin
[WebAssembly] Use wasm::Signature for in ObjectWriter (NFC)

There are two `WasmSignature` structs, one in
include/llvm/BinaryFormat/Wasm.h and the other in
lib/MC/WasmObjectWriter.cpp. I don't know why they got separated in this
way in the first place, but it seems we can unify them to use the one in
Wasm.h for all cases.

Reviewed By: dschuff, sbc100

Differential Revision: https://reviews.llvm.org/D88428
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp (diff)
Commit d047bb1cf69316b39dd67ecc5af669414be9152c by llvm-dev
[InstCombine] Add trunc(shr(trunc(x),c)) non-uniform vector tests
The file was modifiedllvm/test/Transforms/InstCombine/trunc-shift-trunc.ll (diff)
Commit 06e68f05dafb96ea5395d2fed669fccdcd07f61f by d.c.ddcc
[AddressSanitizer] Copy type metadata to prevent miscompilation

When ASan and e.g. Dead Virtual Function Elimination are enabled, the
latter will rely on type metadata to determine if certain virtual calls can be
removed. However, ASan currently does not copy type metadata, which can cause
virtual function calls to be incorrectly removed.

Differential Revision: https://reviews.llvm.org/D88368
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp (diff)
The file was modifiedllvm/test/Instrumentation/AddressSanitizer/debug_info.ll (diff)
Commit 9b1666f3ce2b02be70f8e7f82c3ec5c81262010b by usx
[clangd] Rename evaluate() to evaluateHeuristics()

Since we have 2 scoring functions (heuristics and decision forest),
renaming the existing evaluate() function to be more descriptive of the
Heuristics being evaluated in it.

Differential Revision: https://reviews.llvm.org/D88431
The file was modifiedclang-tools-extra/clangd/unittests/QualityTests.cpp (diff)
The file was modifiedclang-tools-extra/clangd/FindSymbols.cpp (diff)
The file was modifiedclang-tools-extra/clangd/Quality.h (diff)
The file was modifiedclang-tools-extra/clangd/XRefs.cpp (diff)
The file was modifiedclang-tools-extra/clangd/Quality.cpp (diff)
The file was modifiedclang-tools-extra/clangd/CodeComplete.cpp (diff)
The file was modifiedclang-tools-extra/clangd/index/dex/Dex.cpp (diff)
Commit 6c8168324b5329c94fe7e8f9a1619802091b9bec by Amara Emerson
Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar."

This reverts commit b5e87c9ef2243ecd65e0ef87a1bf303c0c26db04 as it seems to have
broken a bot.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir (diff)
Commit 83dc53d30c273960c0e398b2fa7459c8ecf2b03f by jonathan_roelofs
[AArch64] reuse another map iterator. NFC
The file was modifiedllvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp (diff)
Commit 54759cefdba929c89a0bde07df19d8946312a974 by ajcbik
[mlir] [VectorOps] changes to printing support for integers

(1) simplify integer printing logic by always using 64-bit print
(2) add index support (since vector<16xindex> is planned to be added)
(3) adjust naming convention print_x -> printX

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D88436
The file was modifiedmlir/test/mlir-cpu-runner/unranked_memref.mlir (diff)
The file was modifiedmlir/test/mlir-cpu-runner/bare_ptr_call_conv.mlir (diff)
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-fp.mlir (diff)
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp (diff)
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir (diff)
The file was modifiedmlir/integration_test/Dialect/LLVMIR/CPU/test-vector-reductions-int.mlir (diff)
The file was modifiedmlir/include/mlir/ExecutionEngine/CRunnerUtils.h (diff)
The file was modifiedmlir/lib/ExecutionEngine/CRunnerUtils.cpp (diff)
Commit e851aeb0a5084d968d6384fbc2257bbe05dcdacb by peter
scudo: Re-order Allocator fields for improved performance. NFCI.

Move smaller and frequently-accessed fields near the beginning
of the data structure in order to improve locality and reduce
the number of instructions required to form an access to those
fields. With this change I measured a ~5% performance improvement on
BM_malloc_sql_trace_default on aarch64 Android devices (Pixel 4 and
DragonBoard 845c).

Differential Revision: https://reviews.llvm.org/D88350
The file was modifiedcompiler-rt/lib/scudo/standalone/combined.h (diff)
Commit 0c82fa677f24d8a9656af41ac9cc64ea4f818bc0 by chfast
[python][tests] Fix string comparison with "is"
The file was modifiedclang/bindings/python/tests/cindex/test_cursor_kind.py (diff)
Commit 33125cffda96fd5c5d2b80eebfa89fbf4f6b76a6 by spatel
[CostModel] fill in arguments as part of intrinsic attribute constructor

This appears to be an error of code duplication - instead of
one constructor variant calling another, we have N similar
but not identical versions.

I think this is 'NFC' based on the current callers, but it's
hard to tell or guess the intent in all cases.
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp (diff)
Commit 0156914275be5b07155ecefe4dc2d58588265abc by baptiste.saleil
[PowerPC] Legalize v256i1 and v512i1 and implement load and store of these types

This patch legalizes the v256i1 and v512i1 types that will be used for MMA.

It implements loads and stores of these types.
v256i1 is a pair of VSX registers, so for this type, we load/store the two
underlying registers. v512i1 is used for MMA accumulators. So in addition to
loading and storing the 4 associated VSX registers, we generate instructions to
prime (copy the VSX registers to the accumulator) after loading and unprime
(copy the accumulator back to the VSX registers) before storing.

This patch also adds the UACC register class that is necessary to implement the
loads and stores. This class represents accumulator in their unprimed form and
allow the distinction between primed and unprimed accumulators to avoid invalid
copies of the VSX registers associated with primed accumulators.

Differential Revision: https://reviews.llvm.org/D84968
The file was modifiedllvm/lib/Target/PowerPC/PPCRegisterInfo.td (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp (diff)
The file was modifiedclang/test/CodeGen/target-data.c (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCTargetMachine.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td (diff)
The file was modifiedclang/lib/Basic/Targets/PPC.h (diff)
The file was addedllvm/test/CodeGen/PowerPC/mma-acc-memops.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp (diff)
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h (diff)
Commit 8b95bd3310c126e76e0714bea6003a9b1aa739fb by Jonas Devlieghere
[lldb] Enable markdown support for documentation

This enables support for writing LLDB documentation in markdown in
addition to reStructured text. We already had documentation written in
markdown (StructuredDataPlugins and DarwinLog) which will now also be
available on the website.
The file was modifiedlldb/docs/conf.py (diff)
The file was addedlldb/docs/resources/structureddataplugins.md
The file was removedlldb/docs/structured_data/StructuredDataPlugins.md
The file was modifiedlldb/docs/index.rst (diff)
The file was removedlldb/docs/structured_data/DarwinLog.md
Commit 6e54918db7f4dad0d5a6fbff140009ed6f151d2c by Jason Molenda
Once we've found a firmware binary and loaded it, don't search more

Add the flag in ProcessMachCore::DoLoadCore that stops additional
searches for the binaries when we have an LC_NOTE identifying the
firmware/standalone binary as the correct one & we have loaded it
successfully.
The file was modifiedlldb/source/Plugins/Process/mach-core/ProcessMachCore.cpp (diff)
Commit c37a8acef64213c2d9cf6fc76f958eb6bd252b4f by spatel
[CostModel] remove hack for intrinsic cost based on cost type

This hack seems to only have been necessary because of the
constructor bug noted in 33125cffd.

Once again, it's hard to prove NFC, but that's the hope...
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h (diff)
Commit b59dff4b164c62fd802d06bb7be75fe31de94c71 by benny.kra
[wasm] Move WasmTraits.h to BinaryFormat

There's no dependency on Object in there and this avoids a cyclic
dependency between libMC and libObject.
The file was modifiedlld/wasm/Writer.cpp (diff)
The file was modifiedlld/wasm/SyntheticSections.h (diff)
The file was modifiedllvm/lib/MC/WasmObjectWriter.cpp (diff)
The file was removedllvm/include/llvm/Object/WasmTraits.h
The file was addedllvm/include/llvm/BinaryFormat/WasmTraits.h
Commit 46fdaac098a3a14cfbca3fe2d922ae62a100794d by Louis Dionne
[libc++] Fix heap UaF issue in coroutine test

This wasn't being flagged by older versions of ASAN, but it is now.
The file was modifiedlibcxx/test/std/experimental/language.support/support.coroutines/end.to.end/expected.pass.cpp (diff)
Commit 93ba33066c35d1430bc9305c4cb112f769c9ee30 by Louis Dionne
[libc++] Add UNSUPPORTED markup to atomic test in single-threaded mode
The file was modifiedlibcxx/test/libcxx/atomics/ext-int.verify.cpp (diff)
Commit 59f8ac3eb441b9bf1fb589facc024a03c218bece by Louis Dionne
[libc++] Replace uses of __libcpp_allocate by std::allocator<>

Both are equivalent, however std::allocator can appear in constant
expressions and is higher level.
The file was modifiedlibcxx/include/__sso_allocator (diff)
The file was modifiedlibcxx/include/valarray (diff)
Commit bd19876dc60c69f50a7110740e97c6878e56be60 by epastor
[COFF] Aliases resolve directly to defined external targets

Avoid introducing unnecessary indirection for weak-external references.

We only need to introduce ".weak.<SYMBOL>.default" when referencing a
symbol that is defined, but not external.

Reviewed By: mstorsjo

Differential Revision: https://reviews.llvm.org/D88305
The file was modifiedllvm/lib/MC/WinCOFFObjectWriter.cpp (diff)
The file was addedllvm/test/MC/COFF/weak-alias-labels.s
The file was modifiedllvm/test/MC/COFF/weak.s (diff)
Commit 2f768a68a148a73bf1f52b160a28b9f77c6d830e by llvm-dev
[InstCombine] Regenerate cast tests. NFC.
The file was modifiedllvm/test/Transforms/InstCombine/cast.ll (diff)
Commit 288c5776c9d3cb14abe1c86f961c8ff166772d28 by craig.topper
[X86] Use inlineasm flag output for the _bittest* intrinsics.

Instead of expliciting emitting a setc in the inline asm instructions,
we can use flag output. This allows the backend to use the flag
directly if it is needed by a branch. Previously we needed a test
instruction to convert the register back to a flag.

If the flag can't be used directly, the backend will emit a setcc.

Differential Revision: https://reviews.llvm.org/D87888
The file was modifiedclang/test/CodeGen/bittest-intrin.c (diff)
The file was modifiedclang/lib/CodeGen/CGBuiltin.cpp (diff)
The file was addedllvm/test/CodeGen/X86/bittest-intrin.ll
Commit e9628955f5e965b0a60b8df3c731fc6bfa87ad20 by ajcbik
[mlir] [VectorOps] Relaxed restrictions on vector.reduction types even more

Recently, restrictions on vector reductions were made more relaxed by
accepting any width signless integer and floating-point. This CL relaxes
the restriction even more by including unsigned and signed integers.

Reviewed By: bkramer

Differential Revision: https://reviews.llvm.org/D88442
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp (diff)
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-reductions-i4.mlir
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-reductions-ui4.mlir
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-reductions-si4.mlir
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp (diff)
Commit 5aa56b242951ab0f0181386ea58509f19b09206e by Amara Emerson
Revert "Revert "[AArch64][GlobalISel] Add selection support for <8 x s16>  G_INSERT_VECTOR_ELT with GPR scalar.""

This isn't a real with the codegen, it's a previously known bug in clang which
causes non-deterministic failures due to garbage bits in undef registers being
used in saturating instructions.

I'm disabling the result checking for the test until this issue is resolved.

This reverts commit 6c8168324b5329c94fe7e8f9a1619802091b9bec.
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-insert-vector-elt.mir (diff)
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp (diff)
Commit 974551d37da8352c22fd849d19cb8fb1facff680 by Jonas Devlieghere
[lldb] Add print_function import
The file was modifiedlldb/docs/conf.py (diff)
Commit e7549dafcd33ced4280a81ca1d1ee4cc78ed253f by aaron
Fix a think-o with the numerical suffixes in the docs for init_priority.
The file was modifiedclang/include/clang/Basic/AttrDocs.td (diff)
Commit d89735133582ebca482e94bc2710733a09dfb643 by thakis
[gn build] Re-run CompletionModelCodegen when input json files change
The file was modifiedllvm/utils/gn/secondary/clang-tools-extra/clangd/quality/gen_decision_forest.gni (diff)
Commit 25affb04aab7ad55bd7c0dc95e8c2d3973ab8f6d by daltenty
[CMake][AIX] Limit tools in external project build

This is a follow on to D85329 which disabled some llvm tools in the
runtimes build due to XCOFF64 limitations. This change disables them
in other external project builds as well, when no list of tools is
specified in the arguments.

Reviewed By: hubert.reinterpretcast, stevewan

Differential Revision: https://reviews.llvm.org/D88310
The file was modifiedllvm/cmake/modules/LLVMExternalProjectUtils.cmake (diff)
Commit 082321909e514d3cb50adedfdeb4e8de22df9113 by Amara Emerson
[GlobalISel] Add support for lowering of vector G_SELECT and use for AArch64.

The lowering is a port of the SDAG expansion.

Differential Revision: https://reviews.llvm.org/D88364
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff)
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp (diff)
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/LegalizerHelper.h (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-select.mir (diff)
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalizer-info-validation.mir (diff)
The file was modifiedllvm/test/CodeGen/AArch64/arm64-vabs.ll (diff)