![[Jenkins]](/green/static/eae862d6/images/jenkins-header-logo-v2.svg){kind=logo}
Changes
Summary
- [ARM] Add test for MVE and no floats. NFC Adds a simple test that MVE with no floating point will be promoted correctly to software float calls.
- [InferFunctionAttrs] add more tests for derefenceable; NFC
- [MIPS GlobalISel] Register bank select for G_PHI. Select i64 phi Select gprb or fprb when def/use register operand of G_PHI is used/defined by either: copy to/from physical register or instruction with only one mapping available for that use/def operand. Integer s64 phi is handled with narrowScalar when mapping is applied, produced artifacts are combined away. Manually set gprb to all register operands of instructions created during narrowScalar. Differential Revision: https://reviews.llvm.org/D64351
- AMDGPU/GlobalISel: Prepare some tests for store selection Mostsly these would fail due to trying to use SI with a flat operation. Implementing global loads with MUBUF is more work than flat, so these won't be handled in the initial load selection. Others fail because store of s64 won't initially work, as the current set of patterns expect everything to be turned into v2i32.
- [MIPS GlobalISel] Regbanks for G_SELECT. Select i64, f32 and f64 select Select gprb or fprb when def/use register operand of G_SELECT is used/defined by either: copy to/from physical register or instruction with only one mapping available for that use/def operand. Integer s64 select is handled with narrowScalar when mapping is applied, produced artifacts are combined away. Manually set gprb to all register operands of instructions created during narrowScalar. For selection of floating point s32 or s64 select it is enough to set fprb of appropriate size and selectImpl will do the rest. Differential Revision: https://reviews.llvm.org/D64350
- AMDGPU/GlobalISel: Fix test
- [libclang] Fix hang in release / assertion in debug when evaluating value-dependent types. Expression evaluator doesn't work in value-dependent types, so ensure that the precondition it asserts holds. This fixes https://bugs.llvm.org/show_bug.cgi?id=42532 Differential Revision: https://reviews.llvm.org/D64409
- [docs][llvm-dwarfdump] Fix wording
- AMDGPU/GlobalISel: Legalize more concat_vectors
- AMDGPU/GlobalISel: Improve regbankselect for icmp s16 Account for 64-bit scalar eq/ne when available.
- AMDGPU/GlobalISel: Make s16 G_ICMP legal
- [OPENMP]Fix the float point semantics handling on the device. The device should use the same float point representation as the host. Previous patch fixed the handling of the sizes of the float point types, but did not fixed the fp semantics. This patch makes target device to use the host fp semantics. this is required for the correct data transfer between host and device and correct codegen.
- AMDGPU/GlobalISel: Select G_SUB
- AMDGPU/GlobalISel: Select G_UNMERGE_VALUES
- AMDGPU/GlobalISel: Select G_MERGE_VALUES
- gn build: Merge r365453
- [ItaniumMangle] Refactor long double/__float128 mangling and fix the mangled code In gcc PowerPC, long double has 3 mangling schemes: -mlong-double-64: `e` -mlong-double-128 -mabi=ibmlongdouble: `g` -mlong-double-128 -mabi=ieeelongdouble: `u9__ieee128` (gcc <= 8.1: `U10__float128`) The current useFloat128ManglingForLongDouble() bisection is not suitable when we support -mlong-double-128 in clang (D64277). Replace useFloat128ManglingForLongDouble() with getLongDoubleMangling() and getFloat128Mangling() to allow 3 mangling schemes. I also deleted the `getTriple().isOSBinFormatELF()` check (the Darwin support has gone: https://reviews.llvm.org/D50988). For x86, change the mangled code of __float128 from `U10__float128` to `g`. `U10__float128` was wrongly copied from PowerPC. The test will be added to `test/CodeGen/x86-long-double.cpp` in D64277. Reviewed By: erichkeane Differential Revision: https://reviews.llvm.org/D64276
- [Syntax] Move roles into a separate enum To align with reviewer's suggestions.
- lld-link: Stop accepting /natvis and /fastfail in .drectve sections link.exe doesn't accept them either. Differential Revision: https://reviews.llvm.org/D64352
| Change Type | Path in Repository | Path in Workspace |
|---|---|---|
 | /llvm/trunk/test/CodeGen/Thumb2/mve-nofloat.ll | llvm.src/test/CodeGen/Thumb2/mve-nofloat.ll |
| Change Type | Path in Repository | Path in Workspace |
 | /llvm/trunk/test/Transforms/InferFunctionAttrs/dereferenceable.ll (diff) | llvm.src/test/Transforms/InferFunctionAttrs/dereferenceable.ll |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/CodeGen/GlobalISel/LegalizerHelper.cpp (diff) | llvm.src/lib/CodeGen/GlobalISel/LegalizerHelper.cpp |
| /llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp (diff) | llvm.src/lib/Target/Mips/MipsLegalizerInfo.cpp |
| /llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp (diff) | llvm.src/lib/Target/Mips/MipsRegisterBankInfo.cpp |
| /llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/phi.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/legalizer/phi.mir |
| /llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/llvm-ir/phi.ll |
| /llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/phi.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/regbankselect/phi.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-add.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cvt.pkrtz.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-bitcast.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-constant.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-copy.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fadd.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fmul.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-fptoui.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-icmp.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-implicit-def.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-inttoptr.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-inttoptr.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-maxnum.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-maxnum.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-minnum.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-minnum.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-or.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-sitofp.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/Target/Mips/MipsLegalizerInfo.cpp (diff) | llvm.src/lib/Target/Mips/MipsLegalizerInfo.cpp |
| /llvm/trunk/lib/Target/Mips/MipsRegisterBankInfo.cpp (diff) | llvm.src/lib/Target/Mips/MipsRegisterBankInfo.cpp |
| /llvm/trunk/test/CodeGen/Mips/GlobalISel/instruction-select/select.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/instruction-select/select.mir |
| /llvm/trunk/test/CodeGen/Mips/GlobalISel/legalizer/select.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/legalizer/select.mir |
| /llvm/trunk/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/llvm-ir/select.ll |
| /llvm/trunk/test/CodeGen/Mips/GlobalISel/regbankselect/select.mir (diff) | llvm.src/test/CodeGen/Mips/GlobalISel/regbankselect/select.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir |
| Change Type | Path in Repository | Path in Workspace |
| /cfe/trunk/test/Index/evaluate-cursor.cpp (diff) | clang.src/test/Index/evaluate-cursor.cpp |
| /cfe/trunk/tools/libclang/CIndex.cpp (diff) | clang.src/tools/libclang/CIndex.cpp |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/docs/CommandGuide/llvm-dwarfdump.rst (diff) | llvm.src/docs/CommandGuide/llvm-dwarfdump.rst |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff) | llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-concat-vectors.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp (diff) | llvm.src/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir | llvm.src/test/CodeGen/AMDGPU/GlobalISel/regbankselect-icmp.s16.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff) | llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir (diff) | llvm.src/test/CodeGen/AMDGPU/GlobalISel/legalize-icmp.mir |
| Change Type | Path in Repository | Path in Workspace |
| /cfe/trunk/lib/AST/ASTContext.cpp (diff) | clang.src/lib/AST/ASTContext.cpp |
| /cfe/trunk/test/OpenMP/nvptx_asm_delayed_diags.c (diff) | clang.src/test/OpenMP/nvptx_asm_delayed_diags.c |
| /cfe/trunk/test/OpenMP/nvptx_unsupported_type_codegen.cpp (diff) | clang.src/test/OpenMP/nvptx_unsupported_type_codegen.cpp |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff) | llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff) | llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-sub.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff) | llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff) | llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-unmerge-values.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp (diff) | llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPUInstructionSelector.h (diff) | llvm.src/lib/Target/AMDGPU/AMDGPUInstructionSelector.h |
| /llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (diff) | llvm.src/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp |
| /llvm/trunk/lib/Target/AMDGPU/SIRegisterInfo.cpp (diff) | llvm.src/lib/Target/AMDGPU/SIRegisterInfo.cpp |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-concat-vectors.mir |
| /llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir | llvm.src/test/CodeGen/AMDGPU/GlobalISel/inst-select-merge-values.mir |
| Change Type | Path in Repository | Path in Workspace |
| /llvm/trunk/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn (diff) | llvm.src/utils/gn/secondary/clang-tools-extra/clangd/refactor/tweaks/BUILD.gn |
| Change Type | Path in Repository | Path in Workspace |
| /cfe/trunk/include/clang/Basic/TargetInfo.h (diff) | clang.src/include/clang/Basic/TargetInfo.h |
| /cfe/trunk/lib/AST/ItaniumMangle.cpp (diff) | clang.src/lib/AST/ItaniumMangle.cpp |
| /cfe/trunk/lib/Basic/Targets/PPC.h (diff) | clang.src/lib/Basic/Targets/PPC.h |
| /cfe/trunk/lib/Basic/Targets/SystemZ.h (diff) | clang.src/lib/Basic/Targets/SystemZ.h |
| /cfe/trunk/lib/Basic/Targets/X86.h (diff) | clang.src/lib/Basic/Targets/X86.h |
| /cfe/trunk/test/CodeGenCXX/float128-declarations.cpp (diff) | clang.src/test/CodeGenCXX/float128-declarations.cpp |
| Change Type | Path in Repository | Path in Workspace |
| /cfe/trunk/include/clang/Tooling/Syntax/Nodes.h (diff) | clang.src/include/clang/Tooling/Syntax/Nodes.h |
| /cfe/trunk/include/clang/Tooling/Syntax/Tree.h (diff) | clang.src/include/clang/Tooling/Syntax/Tree.h |
| /cfe/trunk/lib/Tooling/Syntax/BuildTree.cpp (diff) | clang.src/lib/Tooling/Syntax/BuildTree.cpp |
| /cfe/trunk/lib/Tooling/Syntax/Nodes.cpp (diff) | clang.src/lib/Tooling/Syntax/Nodes.cpp |
| /cfe/trunk/lib/Tooling/Syntax/Tree.cpp (diff) | clang.src/lib/Tooling/Syntax/Tree.cpp |
| /cfe/trunk/unittests/Tooling/Syntax/TreeTest.cpp (diff) | clang.src/unittests/Tooling/Syntax/TreeTest.cpp |
| Change Type | Path in Repository | Path in Workspace |
| /lld/trunk/COFF/Driver.cpp (diff) | lld.src/COFF/Driver.cpp |