Changes
Summary
- [PowerPC][NFC] Precomit test case for upcoming patch Just committing a test case for an upcoming patch so that the review can show only the codegen differences.
- [X86] SimplifyDemandedVectorEltsForTargetNode - Move SUBV_BROADCAST narrowing handling. NFCI. Move the narrowing of SUBV_BROADCAST to where we handle all the other opcodes.
- [PowerPC][NFC] Regenerate test using script This test case ended up as a hybrid of generated checks and manually inserted checks. Regenerate using script to make it consistent.
- [InstCombine] Update comment I missed in r366649. NFC
- [SmallBitVector] Fix bug in find_next_unset for small types with indices >=32 We were creating a bitmask from a shift of unsigned instead of uintptr_t, meaning we couldn't create masks for indices above 31. Noticed due to a MSVC analyzer warning.
- [GISel]: Attach missing range metadata while translating G_LOADs https://reviews.llvm.org/D65048 Attach range information to G_LOAD when only defining one register. reviewed by: arsenm
- [ARM] Move MVE VPT block tests into the Thumb2 directory. NFC
Change Type | Path in Repository | Path in Workspace |
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![]() | /llvm/trunk/test/CodeGen/PowerPC/dform-adjust.ll | llvm.src/test/CodeGen/PowerPC/dform-adjust.ll |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (diff) | llvm.src/lib/Target/X86/X86ISelLowering.cpp |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/test/CodeGen/PowerPC/pre-inc-disable.ll (diff) | llvm.src/test/CodeGen/PowerPC/pre-inc-disable.ll |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp (diff) | llvm.src/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/include/llvm/ADT/SmallBitVector.h (diff) | llvm.src/include/llvm/ADT/SmallBitVector.h |
![]() | /llvm/trunk/unittests/ADT/BitVectorTest.cpp (diff) | llvm.src/unittests/ADT/BitVectorTest.cpp |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/lib/CodeGen/GlobalISel/IRTranslator.cpp (diff) | llvm.src/lib/CodeGen/GlobalISel/IRTranslator.cpp |
![]() | /llvm/trunk/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll (diff) | llvm.src/test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll |
Change Type | Path in Repository | Path in Workspace |
![]() | /llvm/trunk/test/CodeGen/ARM/mve-vpt-block.mir | llvm.src/test/CodeGen/ARM/mve-vpt-block.mir |
![]() | /llvm/trunk/test/CodeGen/ARM/mve-vpt-block2.mir | llvm.src/test/CodeGen/ARM/mve-vpt-block2.mir |
![]() | /llvm/trunk/test/CodeGen/ARM/mve-vpt-block3.mir | llvm.src/test/CodeGen/ARM/mve-vpt-block3.mir |
![]() | /llvm/trunk/test/CodeGen/ARM/mve-vpt-block4.mir | llvm.src/test/CodeGen/ARM/mve-vpt-block4.mir |
![]() | /llvm/trunk/test/CodeGen/ARM/mve-vpt-block5.mir | llvm.src/test/CodeGen/ARM/mve-vpt-block5.mir |
![]() | /llvm/trunk/test/CodeGen/ARM/mve-vpt-block6.mir | llvm.src/test/CodeGen/ARM/mve-vpt-block6.mir |
![]() | /llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block.mir | llvm.src/test/CodeGen/Thumb2/mve-vpt-block.mir |
![]() | /llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block2.mir | llvm.src/test/CodeGen/Thumb2/mve-vpt-block2.mir |
![]() | /llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block3.mir | llvm.src/test/CodeGen/Thumb2/mve-vpt-block3.mir |
![]() | /llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block4.mir | llvm.src/test/CodeGen/Thumb2/mve-vpt-block4.mir |
![]() | /llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block5.mir | llvm.src/test/CodeGen/Thumb2/mve-vpt-block5.mir |
![]() | /llvm/trunk/test/CodeGen/Thumb2/mve-vpt-block6.mir | llvm.src/test/CodeGen/Thumb2/mve-vpt-block6.mir |