Started 1 mo 18 days ago
Took 9 hr 42 min on green-dragon-06

Success Build #7702 (Feb 21, 2021 4:41:57 PM)

Changes

Git (git http://labmaster3.local/git/llvm-project.git)

  1. [X86] Fold bitcast(logic(bitcast(X), Y)) --> logic'(X, bitcast(Y)) for int-int bitcasts (detail)
  2. [X86][AVX] Fold concat(extract_subvector(v0,c0), extract_subvector(v1,c1)) -> vperm2x128 (detail)
  3. [DAG] Match USUBSAT patterns through zext/trunc (detail)
  4. [ThinLTO] Fix import of multiply defined global variables (detail)
  5. [Loads] Extract helper frunction for available load/store (NFC) (detail)
  6. Make sure the interpreter module was loaded before making checks against it (detail)
  7. [IR] restrict vector reduction intrinsic types (detail)
  8. [Loads] Add optimized FindAvailableLoadedValue() overload (NFCI) (detail)
  9. [lldb-vscode] Emit the breakpoint changed event on location resolved (detail)
  10. [NFC] Remove redundant word in comment (detail)
  11. Revert "Make sure the interpreter module was loaded before making checks against it" (detail)
  12. [X86][AVX] canonicalizeLaneShuffleWithRepeatedOps - remove unnecessary BITCASTs. (detail)
  13. [SelectionDAG][RISCV] Teach ComputeNumSignBits to handle SREM. (detail)
  14. Reapply "[lldb/test] Automatically find debug servers to test" (detail)
  15. [LLDB] [docs] Update the list of supported architectures on Windows (detail)
  16. [lldb] [docs] Update platform support status (detail)
  17. Revert "[lldb-vscode] Emit the breakpoint changed event on location resolved" (detail)
  18. [X86] Add common CHECK check-prefix to sub combine tests (detail)
  19. [X86] Add 'sub C1, (xor X, C1) -> add (xor X, ~C2), C1+1' tests (detail)
  20. [X86] Regenerate sub.ll test (detail)
  21. [X86] Replace explicit constant handling in sub(C1, xor(X, C2)) -> add(xor(X, ~C2), C1+1) fold. NFCI. (detail)
  22. [X86] Add vector support to sub(C1, xor(X, C2)) -> add(xor(X, ~C2), C1+1) fold. (detail)
  23. Implement simple type polymorphism for linalg named ops. (detail)
  24. [KnownBits][RISCV] Improve known bits for srem. (detail)

Started by upstream project clang-stage2-cmake-RgSan_relay build number 3364
originally caused by:

This run spent:

  • 38 min waiting;
  • 9 hr 42 min build duration;
  • 10 hr total from scheduled to completion.
Revision: 183bbad1d78a4bf445ec4db1ce01673f6a7feb37
  • detached
Revision: 4cb746c769b80e7a5dfc99044bf6fe9314f5f0a6
  • refs/remotes/origin/main
LLVM/Clang Warnings: 0 warnings.
  • No warnings since build 7,692.
  • Still 382 days before reaching the previous zero warnings highscore.
Test Result (no failures)