SuccessChanges

Summary

  1. Silence 'warning: unused variable' when compiling with Clang 10.0 (details)
  2. [DAG] Remove DAGTypeLegalizer::GenWidenVectorTruncStores (PR42046) (details)
  3. [PowerPC] Implement the 128-bit Vector Divide Extended Builtins in Clang/LLVM (details)
  4. [PowerPC] Implement Vector String Isolate Builtins in Clang/LLVM (details)
  5. [mlir] NFC: fix trivial typos under include directory (details)
  6. [mlir][ods] Make OpBuilder and OperationState optional (details)
  7. [SyntaxTree] Test the List API (details)
  8. [ASTMatchers] Avoid recursion in ancestor matching to save stack space. (details)
  9. [NFC][regalloc] Simplify/conform to style guide indvars in Greedy (details)
  10. Version 0.5 of the new "TableGen Backend Developer's Guide." (details)
Commit 723fea23079f9c85800e5cdc90a75414af182bfd by alexandre.ganea
Silence 'warning: unused variable' when compiling with Clang 10.0
The file was modifiedllvm/lib/CodeGen/PeepholeOptimizer.cpp
Commit 4dada8d617d81cd00e4028e09f7093f5b10a8a41 by llvm-dev
[DAG] Remove DAGTypeLegalizer::GenWidenVectorTruncStores (PR42046)

Just scalarize trunc stores - GenWidenVectorTruncStores does the same thing but is flawed (PR42046) and unused.

Differential Revision: https://reviews.llvm.org/D87708
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
Commit b3147058dec7d42ae0284d6e6edf25eb762c8b89 by amy.kwan1
[PowerPC] Implement the 128-bit Vector Divide Extended Builtins in Clang/LLVM

This patch implements the 128-bit vector divide extended builtins in Clang/LLVM.
These builtins map to the vdivesq and vdiveuq instructions respectively.

Differential Revision: https://reviews.llvm.org/D87729
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedllvm/test/CodeGen/PowerPC/p10-vector-divide.ll
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
Commit 079757b551f3ab5218af7344a7ab3c79976ec478 by amy.kwan1
[PowerPC] Implement Vector String Isolate Builtins in Clang/LLVM

This patch implements the vector string isolate (predicate and non-predicate
versions) builtins. The predicate builtins are custom selected within PPCISelDAGToDAG.

Differential Revision: https://reviews.llvm.org/D87671
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedllvm/test/CodeGen/PowerPC/p10-string-ops.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
Commit d7336ad5ff985dabbe26a728a5789c33b9167286 by ishizaki
[mlir] NFC: fix trivial typos under include directory

Reviewed By: mravishankar, jpienaar

Differential Revision: https://reviews.llvm.org/D88040
The file was modifiedmlir/include/mlir-c/StandardTypes.h
The file was modifiedmlir/include/mlir/Analysis/Presburger/Simplex.h
The file was modifiedmlir/include/mlir/Reducer/ReductionTreeUtils.h
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
The file was modifiedmlir/include/mlir-c/StandardAttributes.h
The file was modifiedmlir/include/mlir/Dialect/PDL/IR/PDLOps.td
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMTypes.h
The file was modifiedmlir/include/mlir/Reducer/Passes/OpReducer.h
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVAttributes.h
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Transforms/Transforms.h
The file was modifiedmlir/include/mlir/Support/InterfaceSupport.h
The file was modifiedmlir/include/mlir/Dialect/Shape/IR/ShapeOps.td
The file was modifiedmlir/include/mlir/Pass/AnalysisManager.h
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was modifiedmlir/include/mlir/Interfaces/SideEffectInterfaces.td
The file was modifiedmlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
The file was modifiedmlir/include/mlir/Reducer/Tester.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/include/mlir/IR/StorageUniquerSupport.h
The file was modifiedmlir/include/mlir-c/IR.h
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h
Commit 2a6db92ca97da946307b559e63c6ac75caf4bbd6 by jpienaar
[mlir][ods] Make OpBuilder and OperationState optional

The OpBuilder is required to start with OpBuilder and OperationState, so remove
the need for the user to specify it. To make it simpler to update callers,
retain the legacy behavior for now and skip injecting OpBuilder/OperationState
when params start with OpBuilder.

Related to bug 47442.

Differential Revision: https://reviews.llvm.org/D88050
The file was modifiedmlir/test/mlir-tblgen/op-decl.td
The file was modifiedmlir/test/lib/Dialect/Test/TestOps.td
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Commit c3c08bfdfd6244e0429753ee56df39c90187d772 by ecaldas
[SyntaxTree] Test the List API

Differential Revision: https://reviews.llvm.org/D87839
The file was modifiedclang/unittests/Tooling/Syntax/TreeTest.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Tree.h
Commit 625761825620f19a44c7a1482ce05d678a1b0deb by sam.mccall
[ASTMatchers] Avoid recursion in ancestor matching to save stack space.

A recent change increased the stack size of memoizedMatchesAncestorOfRecursively
leading to stack overflows on real code involving large fold expressions.
It's not totally unreasonable to choke on very deep ASTs, but as common
infrastructure it's be nice if ASTMatchFinder is more robust.
(It already uses data recursion for the regular "downward" traversal.)

Differential Revision: https://reviews.llvm.org/D86964
The file was modifiedclang/lib/ASTMatchers/ASTMatchFinder.cpp
Commit d1e0f9f3cf13e071d788149bde810c46cd14c74b by mtrofin
[NFC][regalloc] Simplify/conform to style guide indvars in Greedy

Differential Revision: https://reviews.llvm.org/D88055
The file was modifiedllvm/lib/CodeGen/RegAllocGreedy.cpp
Commit 848d66fafd2ee4c15292fa5dd25ca752a3f65537 by paul
Version 0.5 of the new "TableGen Backend Developer's Guide."
Files modified to take comments into account.
MLIR documentation updated for new TableGen documentation files.
The file was modifiedmlir/docs/OpDefinitions.md
The file was modifiedmlir/docs/Tutorials/QuickstartRewrites.md
The file was addedllvm/lib/TableGen/TableGenBackendSkeleton.cpp
The file was addedllvm/docs/TableGen/BackGuide.rst
The file was modifiedllvm/docs/TableGen/ProgRef.rst
The file was modifiedllvm/lib/TableGen/CMakeLists.txt
The file was modifiedllvm/docs/TableGen/BackEnds.rst