SuccessChanges

Summary

  1. [lld-macho] create __TEXT,__unwind_info from __LD,__compact_unwind (details)
  2. [IRSim] Adding ilist for IRInstructionData. (details)
  3. [ASAN] Properly deal with musttail calls in ASAN (details)
  4. [AArch64][GlobalISel] Add legalization and selection support for <4 x s16> G_SHL. (details)
  5. [X86] Return from SimplifyDemandedBitsForTargetNode after calculating known bits for VSHLI/VSRAI/VSRLI. (details)
Commit 2124ca1d5cb67cf494fb6605d1d437a40610e6ef by gkm
[lld-macho] create __TEXT,__unwind_info from __LD,__compact_unwind

Digest the input `__LD,__compact_unwind` and produce the output `__TEXT,__unwind_info`. This is the initial commit with the major functionality.

Successor commits will add handling for ...
* `__TEXT,__eh_frame`
* personalities & LSDA
* `-r` pass-through

Differential Revision: https://reviews.llvm.org/D86805
The file was addedlld/test/MachO/tools/generate-cfi-funcs.py
The file was modifiedlld/MachO/OutputSegment.h
The file was addedlld/MachO/UnwindInfoSection.cpp
The file was addedlld/test/MachO/compact-unwind.test
The file was addedlld/test/MachO/tools/validate-unwind-info.py
The file was modifiedlld/MachO/CMakeLists.txt
The file was modifiedlld/MachO/SyntheticSections.h
The file was addedlld/MachO/UnwindInfoSection.h
The file was modifiedlld/MachO/Writer.cpp
Commit 132aaec4f27e76af252ec95fe959f8f9588644df by andrew.litteken
[IRSim] Adding ilist for IRInstructionData.

The IRInstructionData structs are a different representation of the
program.  This list treats the program as if it was "flattened" and
the only parent is this list.  This lets us easily create ranges of
instructions.

Differential Revision: https://reviews.llvm.org/D86969
The file was modifiedllvm/include/llvm/Analysis/IRSimilarityIdentifier.h
The file was modifiedllvm/lib/Analysis/IRSimilarityIdentifier.cpp
The file was modifiedllvm/unittests/Analysis/IRSimilarityIdentifierTest.cpp
Commit 11453740bc6fb7c9a5fba3e0761060fc2182dc14 by xun
[ASAN] Properly deal with musttail calls in ASAN

When address sanitizing a function, stack unpinsoning code is inserted before each ret instruction. However if the ret instruciton is preceded by a musttail call, such transformation broke the musttail call contract and generates invalid IR.
This patch fixes the issue by moving the insertion point prior to the musttail call if there is one.

Differential Revision: https://reviews.llvm.org/D87777
The file was addedllvm/test/Instrumentation/AddressSanitizer/musttail.ll
The file was modifiedllvm/lib/Transforms/Instrumentation/AddressSanitizer.cpp
Commit 5a50f8b39f4e02cc05e78f1faf3c82c9c7449026 by Amara Emerson
[AArch64][GlobalISel] Add legalization and selection support for <4 x s16> G_SHL.
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64LegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/select-vector-shift.mir
The file was modifiedllvm/test/CodeGen/AArch64/GlobalISel/legalize-shift.mir
Commit 721d57f952ba0dbe02908fc897374dd6324668b9 by craig.topper
[X86] Return from SimplifyDemandedBitsForTargetNode after calculating known bits for VSHLI/VSRAI/VSRLI.

We were breaking out of the switch which falls into the default
implementation of SimplifyDemandedBitsForTargetNode which is a
wrapper around computeKnownBits. So we end up doing the recursion
and known bits calculation all over again. Instead we should return
with the known bits we calculated in the switch.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp