FailedChanges

Summary

  1. [clangd] Fix crash-bug in preamble indexing when using modules. (details)
  2. [clang] When loading preamble from AST file, re-export modules in Sema. (details)
  3. [AArch64] Update a code comment incorrectly referring to zero_reg. NFC (details)
  4. [clangd] Remove useless stderr logging. (details)
  5. [clangd] Don't crash on `#pragma clang __debug parser_crash` (details)
  6. Fix -allow-enabling-analyzer-alpha-checkers always being passed to run-clang-tidy.py (details)
  7. [lldb] Forcefully complete a type when adding typedefs (details)
  8. Revert "[compiler-rt] Compile assembly files as ASM not C" (details)
  9. [LV] Allow tail folded reduction selects to remain in the loop (details)
  10. Add triples to fixed-point tests which lacked them. (details)
  11. [index-while-building] Fix build with -DBUILD_SHARED_LIBS=True (details)
  12. [lldb/Utility] Simplify Scalar handling of float types (details)
  13. lld docs config: Use a list key in html_sidebars (details)
  14. [SyntaxTree] Add support for `MemberExpression` (details)
  15. [SyntaxTree] Unify logic for generating `id-expression` (details)
  16. [SyntaxTree] Split tests related to Namespace (details)
  17. [libc][NFC] Switch math tests to the new ULP based tolerance. (details)
  18. [PeepholeOptimizer] Remove dead code (details)
  19. [libc] Add a class called NormalFloat which represents normalized floats. (details)
  20. [lldb][asan] Mark destructor as virtual to allow subclasses. (details)
  21. [NFC] Expose the -Oz module optimization pipeline to opt (details)
  22. [AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister (details)
  23. [NFC][InstCombine] Tests for PHI-of-insertvalue's (details)
  24. [RISCV] Enable MCCodeEmitter instruction predicate verifier (details)
  25. [gn build] Port 1a995a0af3c (details)
  26. [SVE] Lower fixed length vXi8/vXi16 SDIV to scalable (details)
  27. [lldb] tab completion for breakpoint names (details)
  28. [llvm-dwarfdump] --statistics: switch to json::OStream. NFC (details)
  29. [TSan][Darwin] Enable test on non-macOS platforms (details)
  30. [NFCI][SVE] Move fixed length i32/i64 SDIV tests (details)
  31. [TSan][Darwin] Remove unnecessary lit substitution (details)
  32. [PowerPC][PCRelative] Thread Local Storage Support for General Dynamic (details)
  33. allSGPRSpillsAreDead() should use actual FP/BP frame indices (details)
  34. AMDGPU/GlobalISel: Legalize odd sized loads with widening (details)
  35. CodeGen: Don't drop AA metadata when splitting MachineMemOperands (details)
  36. [X86] Enable constexpr on POPCNT intrinsics (PR31446) (details)
  37. Fix a couple of typos. NFC (details)
  38. [lldb] Provide GetHomeDirectory wrapper in Host::FileSystem (NFC) (details)
  39. [llvm-dwarfdump] Fix a typo: witin -> within (details)
  40. [MLIR][SPIRVToLLVM] Removed std to llvm patterns from the conversion (details)
  41. [test] Replace `yaml2obj >` with `yaml2obj -o` and remove unneeded input redirection (details)
  42. [lldb] Extract FileSystem initialization code into helper (NFC) (details)
  43. Make DWARFExpression::GetLocationExpression public (details)
  44. [MLIR] Add affine.parallel folder and normalizer (details)
  45. Don't reject uses of void-returning consteval functions. (details)
  46. Fix 32 bit build broken by D85990 by dropping align from filecheck pattern (details)
  47. [ELF] Keep st_type for symbol assignment (details)
  48. [compiler-rt][Darwin] Refactor minimum deployment target substitutions (details)
  49. Fix up clangd after Clang 038edf6029bafe70b1f7165abe2b0e61ddf506b3. (details)
  50. [Darwin][iOS] Enable test on non-macOS platforms (details)
  51. Improve pretty-printing for APValues of void type. (details)
  52. [GISel] Correct the known bits of G_ANYEXT (details)
  53. Fix msan build (details)
  54. [NFC][libFuzzer] Try to fix test on Windows (details)
  55. [HeaderSearch] Fix processing #import-ed headers multiple times with modules enabled. (details)
  56. Revert "[libFuzzer] Fix value-profile-load test." (details)
  57. [lldb] Implement WorkingDirectoryProvider in terms of DirectoryProvider (NFC) (details)
  58. [lldb] Capture and load home directory from the reproducer. (details)
  59. [PowerPC] Fix a typo for InstAlias of mfsprg (details)
  60. [clang]:  Remove assertion which checks explicit declaration (details)
  61. [runtimes] Allow LLVM_BUILTIN_TARGETS to include Darwin (details)
  62. [amdgpu] Add codegen support for HIP dynamic shared memory. (details)
  63. [DWARFYAML] Add support for emitting multiple abbrev tables. (details)
  64. [cmake] Don't use ld.lld when targeting Darwin (details)
  65. [DWARFYAML] Add support for emitting multiple abbrev tables. (details)
  66. [DWARFYAML] Add support for referencing different abbrev tables. (details)
  67. [ADT] Allow IsSizeLessThanThresholdT for incomplete types. NFC (details)
  68. Revert "[DWARFYAML] Add support for referencing different abbrev tables." (details)
  69. Refactor Reduction Tree Pass (details)
  70. [Polly] Update isl to isl-0.22.1-416-g61d6dc75. (details)
  71. [lldb] Simplify CMake logic with LLVM's append_if function (details)
  72. [lldb] Remove redundant call to FindBacktrace (NFC) (details)
  73. [lldb] Fix a new -Wdocumetnation issues (NFC) (details)
  74. Allow multiple calls to InitLLVM() (NFC) (details)
  75. [X86] Correct the implementation of the testFeature macro in getIntelProcessorTypeAndSubtype to do a proper bit test. (details)
  76. [PowerPC] Add readflm/setflm intrinsics to Clang (details)
  77. [ARM][LV] Add a preferPredicatedReductionSelect target hook (details)
  78. [ARM][CostModel] Select instruction costs. (details)
  79. [SyntaxTree] Add support for `this` (details)
  80. [DSE,MemorySSA] Split off partial tracking from isOverwite. (details)
  81. [llvm-readobj] - Change how we create DynRegionInfo objects. NFCI. (details)
  82. [lldb] Tab completion for process load/unload (details)
  83. [SimplifyCFG] Cost required selects (details)
  84. [X86] ia32intrin.h - pull out common attributes into defines. NFCI. (details)
  85. [NewPM][PassInstrumentation] Add PreservedAnalyses parameter to AfterPass* callbacks (details)
  86. [Attributor][NFC] run update_test_checks with --check-attributes. (details)
  87. [AMDGPU] Apply llvm-prefer-register-over-unsigned from clang-tidy (details)
  88. [DSE,MemorySSA] Regenerate check lines for atomic.ll tests. (details)
  89. [X86] Enable constexpr on POPCNT intrinsics (PR31446) (details)
  90. [SelectionDAG] Better legalization for FSHL and FSHR (details)
  91. [NFC] Port InstCount pass to new pass manager (details)
  92. [DSE,MemorySSA] Handle atomicrmw/cmpxchg conservatively. (details)
  93. [X86] Enable constexpr on BSWAP intrinsics (PR31446) (details)
  94. [llvm-readelf] - Start recognizing 'PT_OPENBSD_*' segment types. (details)
  95. [AMDGPU] Fix alignment requirements for 96bit and 128bit local loads and stores (details)
  96. [AMDGPU] Reorganize GCN subtarget features for unaligned access (details)
  97. [AMDGPU][GlobalISel] Fix 96 and 128 local loads and stores (details)
  98. [AMDGPU] Use ds_read/write_b96/b128 when possible for SDag (details)
  99. [RISCV] Fix inaccurate annotations on PseudoBRIND (details)
  100. [X86] Enable constexpr on BITSCAN intrinsics (PR31446) (details)
  101. [NFC] Add SimplifyCFG for ARM (details)
  102. Recommit: [DWARFYAML] Add support for referencing different abbrev tables. (details)
  103. [clangd] Discard diagnostics from another SourceManager. (details)
  104. [AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. (details)
  105. [PowerPC] Pre-commit FISel with PC-Rel test (details)
  106. [llvm-readobj/elf] - Refine the code for broken PT_DYNAMIC segment diagnostic. (details)
  107. [compiler-rt][RISCV] Use muldi3 builtin assembly implementation (details)
  108. [llvm-readelf][test] - Refine the merged.test (details)
  109. [NFC][SimplifyCFG] Formatting and variable rename (details)
  110. [LoopIdiom,LSR] Add additional tests for SCEVExpander cleanups. (details)
  111. Correctly emit dwoIDs after ASTFileSignature refactoring (D81347) (details)
  112. [AST][RecoveryExpr] Fix a bogus unused diagnostic when the type is preserved. (details)
  113. [SVE] Lower fixed length UDIV to scalable (details)
  114. Recommit "[SCEVExpander] Add helper to clean up instrs inserted while expanding." (details)
  115. Revert "Correctly emit dwoIDs after ASTFileSignature refactoring (D81347)" (details)
  116. [SyntaxTree] Use annotations in Statement tests (details)
  117. [AIX][XCOFF] emit symbol visibility for xcoff object file. (details)
  118. [PowerPC][PCRelative] Thread Local Storage Support for Initial Exec (details)
  119. [Constants] Handle FNeg in getWithOperands. (details)
  120. [gn build] Port 57903cf0933 -- https://reviews.llvm.org/rG57903cf0933 (details)
  121. Teach AttachPreviousImpl to inherit MSInheritanceAttr attribute (details)
  122. [lldb] Skip PDB and NativePDB tests with reproducers (details)
Commit 53b9199a5cdba8a6e294e1fb183f308ec558db22 by adamcz
[clangd] Fix crash-bug in preamble indexing when using modules.

When preamble contains #undef, indexing code finds the matching #define
and uses that during indexing. However, it would only look for local
definitions. If the macro was defined in a module, MacroInfo
would be nullptr and clangd would crash.

This change makes clangd ignore any #undef without a matching #define
inside the same TU.

The indexing of macros happens for preamble only, so then #undef must be
in the preamble, which is why we need two .h files in a test.

Note that clangd is currently not ready for module support, but this
brings us one step closer.

This was previously attempted in
4061d9e42cff621462931ac7df9666806c77a237, but had to be reverted due to
broken test. This version fixes that test-only bug by setting a custom module
cache path to avoid re-use of modules across test invocations.

Differential Revision: https://reviews.llvm.org/D85923
The file was modifiedclang-tools-extra/clangd/unittests/TestFS.h
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.cpp
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.h
The file was modifiedclang/lib/Index/IndexingAction.cpp
The file was modifiedclang-tools-extra/clangd/unittests/SymbolCollectorTests.cpp
Commit baeff989b050e0f63412c52c1b8f9d8f3e91f671 by adamcz
[clang] When loading preamble from AST file, re-export modules in Sema.

This addresses a FIXME in ASTReader.

Modules were already re-exported for Preprocessor, but not for Sema.
The result was that, with -fmodules-local-submodule-visibility, all AST
nodes belonging to a module that was loaded in a premable where not
accesible from the main part of the file and a diagnostic recommending
importing those modules would be generated.

Differential Revision: https://reviews.llvm.org/D86069
The file was modifiedclang-tools-extra/clangd/unittests/ModulesTests.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/test/PCH/Inputs/modules/Foo.h
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was addedclang/test/PCH/preamble-modules.cpp
Commit ff107eed1546bcdb1b1ce2ffafbb7b10ea2b2a30 by bjorn.a.pettersson
[AArch64] Update a code comment incorrectly referring to zero_reg. NFC

The getSrcFromCopy helper nowadays return a MachineOperand pointer,
so talking about zero_reg was incorrect as it nowadays return
a nullptr when not finding a copy like instruction.
The file was modifiedllvm/lib/Target/AArch64/AArch64AdvSIMDScalarPass.cpp
Commit 707138d677861182083b3c6c3b44b76951fd36ef by adamcz
[clangd] Remove useless stderr logging.

This was accidentally added in 53b9199a5cdba8a6e294e1fb183f308ec558db22

Differential Revision: https://reviews.llvm.org/D86284
The file was modifiedclang-tools-extra/clangd/unittests/TestTU.cpp
Commit 445739826567e5402b558f2c130d76dc916c82ec by platonov.aleksandr
[clangd] Don't crash on `#pragma clang __debug parser_crash`

Currently, clangd crashes when opening a file with `#pragma clang __debug parser_crash` (e.g. clang/test/Modules/Inputs/crash.h).
This patch disables these crashes.

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D86279
The file was modifiedclang-tools-extra/clangd/Compiler.cpp
The file was modifiedclang-tools-extra/clangd/unittests/CompilerTests.cpp
Commit 03ded5497a2f458b6af054fa7bac0da0240e7b7a by aaron
Fix -allow-enabling-analyzer-alpha-checkers always being passed to run-clang-tidy.py

The action='store_true' option of argparse.add_argument implicitly
generates a default value of False if the argument is not specified.
Thus, the allow_enabling_alpha_checkers argument of
get_tidy_invocation is never None.
The file was modifiedclang-tools-extra/clang-tidy/tool/run-clang-tidy.py
Commit 9109311356cc9e74818dd7450020d9b85d2f8125 by pavel
[lldb] Forcefully complete a type when adding typedefs

This is very similar to D85968, only more elusive to since we were not
adding the typedef type to the relevant DeclContext until D86140, which
meant that the DeclContext was populated (and the relevant assertion
hit) only after importing the type into the expression ast in a
particular way.

I haven't checked whether this situation can be hit in the gmodules
case, but my money is on "yes".

Differential Revision: https://reviews.llvm.org/D86216
The file was modifiedlldb/source/Plugins/SymbolFile/DWARF/DWARFASTParserClang.cpp
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/DW_AT_declaration-with-children.s
Commit adf0b8cc70325f027d202139e3ff984c41896b57 by Raphael Isemann
Revert "[compiler-rt] Compile assembly files as ASM not C"

This reverts commit d58fd4e52197d55bf42ca446c8b0ed31b5c2ec1f. This broke
compiler-rt compilation on macOS:

codesign --sign - /Users/buildslave/jenkins/workspace/lldb-cmake/lldb-build/lib/clang/12.0.99/lib/darwin/libclang_rt.tsan_ios_dynamic.dylib
ld: warning: ignoring file projects/compiler-rt/lib/tsan/CMakeFiles/clang_rt.tsan_ios_dynamic.dir/rtl/tsan_rtl_amd64.S.o, building for iOS-arm64 but attempting to link with file built for iOS Simulator-x86_64
ld: warning: ignoring file projects/compiler-rt/lib/tsan/CMakeFiles/clang_rt.tsan_ios_dynamic.dir/rtl/tsan_rtl_aarch64.S.o, building for iOS-arm64 but attempting to link with file built for iOS Simulator-x86_64
Undefined symbols for architecture arm64:
  "_wrap__setjmp", referenced from:
      substitution__setjmp in tsan_interceptors_posix.cpp.o
  "_wrap_setjmp", referenced from:
      substitution_setjmp in tsan_interceptors_posix.cpp.o
  "_wrap_sigsetjmp", referenced from:
      substitution_sigsetjmp in tsan_interceptors_posix.cpp.o
ld: symbol(s) not found for architecture arm64
The file was modifiedclang/runtime/CMakeLists.txt
The file was modifiedcompiler-rt/cmake/Modules/AddCompilerRT.cmake
Commit 816097e4e5f32b59c2b6099f74356f1dbe55aabb by david.green
[LV] Allow tail folded reduction selects to remain in the loop

The normal scheme for tail folding reductions is to use:

loop:
  p = phi(0, a)
  mask = ...
  x = masked_load(..., mask)
  a = add(x, p)
s = select(mask, a, p)

This means we need to keep the register p and a alive out of the loop, plus
the mask. On a target with predicated operations we can instead generate
the phi as p = phi(0, s). This ensures the select in the loop and we can
fold select(m, add(a, b), c) to something like a vaddt c, a, b using the
m predicate. This in turn allows us to tail predicate the entire loop.

Differential Revision: https://reviews.llvm.org/D84741
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/reduction-predselect.ll
Commit 2bac004c905dc8db99fd3766678d33aa5a0eec2b by bevin.hansson
Add triples to fixed-point tests which lacked them.

This caused failures on clang-x390x-linux.
The file was modifiedclang/test/Frontend/fixed_point_sub.c
The file was modifiedclang/test/Frontend/fixed_point_mul.c
The file was modifiedclang/test/Frontend/fixed_point_sub_const.c
Commit 1ecf120246e7d3e5c9a9ed1db637914bbf4b5702 by asb
[index-while-building] Fix build with -DBUILD_SHARED_LIBS=True

The dependencies in clang/lib/IndexSerialization/CMakeLists.txt were
incomplete, leading to link errors for a -DBUILD_SHARED_LIBS=True build.
The file was modifiedclang/lib/IndexSerialization/CMakeLists.txt
Commit 8a8a2dd3165e63b29e725526745427c6434f0654 by pavel
[lldb/Utility] Simplify Scalar handling of float types

Similarly to D85836, collapse all Scalar float types to a single enum
value, and use APFloat semantics to differentiate between. This
simplifies the code, and opens to door to supporting other floating
point semantics (which would be needed for fully supporting
architectures with more interesting float types such as PPC).

Differential Revision: https://reviews.llvm.org/D86220
The file was modifiedlldb/source/Utility/Scalar.cpp
The file was modifiedlldb/include/lldb/Utility/Scalar.h
The file was modifiedlldb/unittests/Utility/ScalarTest.cpp
Commit 7f009389752c758ccd9f7cc46867e991d482933e by hans
lld docs config: Use a list key in html_sidebars

Otherwise the docs-lld-html target fails to build using recent Sphinx
with the following not very helpful error message:

An error happened in rendering the page index.
Reason: TemplateNotFound()

It turns out the values in the html_sidebars dictionary always need to be lists
now. See https://github.com/sphinx-doc/sphinx/issues/6186
The file was modifiedlld/docs/conf.py
Commit ba32915db2ce78256115a9db7b07bb3806e6364a by ecaldas
[SyntaxTree] Add support for `MemberExpression`

Differential Revision: https://reviews.llvm.org/D86227
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit a4ef9e8643e2f3f8972e19c5b25f4dd81ba03508 by ecaldas
[SyntaxTree] Unify logic for generating `id-expression`
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
Commit e4e983e240430b3a0dc92402cc940292bd0d263f by ecaldas
[SyntaxTree] Split tests related to Namespace

Differential Revision: https://reviews.llvm.org/D86139
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit ed8982da3e3122ffe2de8801d6ca1e1bd1e3c10a by sivachandra
[libc][NFC] Switch math tests to the new ULP based tolerance.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D86267
The file was modifiedlibc/test/src/math/exp2f_test.cpp
The file was modifiedlibc/test/src/math/sincosf_test.cpp
The file was modifiedlibc/test/src/math/cosf_test.cpp
The file was modifiedlibc/test/src/math/round_test.cpp
The file was modifiedlibc/test/src/math/fabsl_test.cpp
The file was modifiedlibc/test/src/math/expf_test.cpp
The file was modifiedlibc/test/src/math/roundf_test.cpp
The file was modifiedlibc/test/src/math/ceilf_test.cpp
The file was modifiedlibc/test/src/math/floor_test.cpp
The file was modifiedlibc/test/src/math/truncf_test.cpp
The file was modifiedlibc/test/src/math/floorl_test.cpp
The file was modifiedlibc/test/src/math/ceill_test.cpp
The file was modifiedlibc/test/src/math/roundl_test.cpp
The file was modifiedlibc/test/src/math/sinf_test.cpp
The file was modifiedlibc/test/src/math/fabs_test.cpp
The file was modifiedlibc/test/src/math/ceil_test.cpp
The file was modifiedlibc/test/src/math/trunc_test.cpp
The file was modifiedlibc/utils/MPFRWrapper/MPFRUtils.cpp
The file was modifiedlibc/utils/MPFRWrapper/MPFRUtils.h
The file was modifiedlibc/test/src/math/floorf_test.cpp
The file was modifiedlibc/test/src/math/fabsf_test.cpp
The file was modifiedlibc/test/src/math/truncl_test.cpp
Commit 4aaf77254296a3dddbbca416c5adfc3c6d63a0e7 by jay.foad
[PeepholeOptimizer] Remove dead code

At this point we have already ruled out all def operands, so we can't
possibly see a dead implicit def operand.
The file was modifiedllvm/lib/CodeGen/PeepholeOptimizer.cpp
Commit 87bf0b0ee986078a2c9e9bca02cf7a4c42012925 by sivachandra
[libc] Add a class called NormalFloat which represents normalized floats.

This class helps in dealing with normal and subnormal numbers uniformly.
Moreover, since this class has been designed to handle all floating
formats across platforms, it helps implement floating point functions in
a uniform manner.

The implementations of frexp and logb have been switched to use this new
class as it allows us to use just one implementation across all
different floating point formats.

Reviewed By: lntue

Differential Revision: https://reviews.llvm.org/D86241
The file was modifiedlibc/utils/FPUtil/ManipulationFunctions.h
The file was modifiedlibc/utils/FPUtil/CMakeLists.txt
The file was addedlibc/utils/FPUtil/NormalFloat.h
Commit 0de3d0c61266675cd5e688a09e02124518e01935 by rupprecht
[lldb][asan] Mark destructor as virtual to allow subclasses.

`lldb_private::ScriptInterpreterPython::CommandDataPython` inherits from `lldb_private::BreakpointOptions::CommandData`, but the latter does not have a virtual destructor. This leads to a new-delete-type-mismatch error when running certain tests (such as `functionalities/breakpoint/breakpoint_command/TestBreakpointCommand.py`) under asan.
The file was modifiedlldb/include/lldb/Breakpoint/BreakpointOptions.h
Commit 364cd768a2764211ec0cbcf0c0bdbe4d8f4565b9 by mtrofin
[NFC] Expose the -Oz module optimization pipeline to opt

This exposes the module optimization pipeline as a pass that can be
applied stand-alone when using 'opt'. This helps ml inliner training
scenarios, where we start with IR captured right before inlining,
perform the inlining (-scc-oz-module-inliner) and then want to continue
and observe the final IR (where this patch comes into play). We can then
apply llc on the resulting IR to continue compilation down to native.

Differential Revision: https://reviews.llvm.org/D86224
The file was modifiedllvm/lib/Passes/PassRegistry.def
Commit 34978602032fbd312998c8c3ef32316717013254 by jay.foad
[AMDGPU] Remove uses of Register::isPhysicalRegister/isVirtualRegister

... in favour of the isPhysical/isVirtual methods.
The file was modifiedllvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIOptimizeExecMaskingPreRA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.h
The file was modifiedllvm/lib/Target/AMDGPU/R600RegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNNSAReassign.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600InstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPeepholeSDWA.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIWholeQuadMode.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFormMemoryClauses.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600ISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFoldOperands.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600MachineScheduler.h
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/R600RegisterInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/R600MachineScheduler.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILoadStoreOptimizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegPressure.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIPreAllocateWWMRegs.cpp
The file was modifiedllvm/lib/Target/AMDGPU/GCNRegBankReassign.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
Commit ea2e682cc2f85594fccd7450b5e5e15294e7bf3f by lebedev.ri
[NFC][InstCombine] Tests for PHI-of-insertvalue's

Currently we don't do anything about these,
neither in InstCombine, nor in SimplifyCFG's sinking.
These happen exceedingly rarely, but i've seen them in the cases where
PHI-aware aggregate reconstruction would have fired if not for them.
The file was addedllvm/test/Transforms/InstCombine/phi-of-insertvalues.ll
The file was modifiedllvm/test/Transforms/InstCombine/phi-aware-aggregate-reconstruction.ll
Commit 3149ec07c0247397f7d963ccff28773a00bcdf9c by jrtc27
[RISCV] Enable MCCodeEmitter instruction predicate verifier

This ensures that we never encode an instruction which is unavailable,
such as if we explicitly insert a forbidden instruction when lowering.
This is particularly important on RISC-V given its high degree of
modularity, and will become increasingly important as new standard
extensions appear.

Reviewed By: asb, lenary

Differential Revision: https://reviews.llvm.org/D85015
The file was modifiedllvm/lib/Target/RISCV/MCTargetDesc/RISCVMCCodeEmitter.cpp
Commit ffadd30b31e79839ce286206a6b1fcffd072a682 by llvmgnsyncbot
[gn build] Port 1a995a0af3c
The file was modifiedllvm/utils/gn/secondary/clang/unittests/Basic/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/unittests/ADT/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/clang/lib/Basic/BUILD.gn
The file was modifiedllvm/utils/gn/secondary/llvm/lib/Support/BUILD.gn
Commit ac6395946060d5ff0830cd63be92f7fc20945ec0 by mcinally
[SVE] Lower fixed length vXi8/vXi16 SDIV to scalable

There are no nxv16i8/nxv8i16 SDIV instructions, so these fixed width operations must be promoted to nxv4i32.

Differential Revision: https://reviews.llvm.org/D86114
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
Commit 22e63cba17e5e6266b9251e3fb7032b793143d09 by Raphael Isemann
[lldb] tab completion for breakpoint names

1. created a common completion for breakpoint names;
2. bound the breakpoint name common completion with eArgTypeBreakpointName;
3. implemented the dedicated completion for breakpoint read -N.

Reviewed By: JDevlieghere

Differential Revision: https://reviews.llvm.org/D80693
The file was modifiedlldb/source/Commands/CommandCompletions.cpp
The file was modifiedlldb/source/Interpreter/CommandObject.cpp
The file was addedlldb/test/API/functionalities/completion/breakpoints_invalid.json
The file was modifiedlldb/include/lldb/Interpreter/CommandCompletions.h
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py
The file was addedlldb/test/API/functionalities/completion/breakpoints.json
The file was modifiedlldb/source/Commands/CommandObjectBreakpoint.cpp
Commit ddde8bebb0ce618fdcae969e8b2ac911e842683b by maskray
[llvm-dwarfdump] --statistics: switch to json::OStream. NFC

Then it is trivial to make the output indented (the second parameter of
json::OStream::OStream specifies the indentation).

Reviewed By: jhenderson, echristo

Differential Revision: https://reviews.llvm.org/D86045
The file was modifiedllvm/tools/llvm-dwarfdump/Statistics.cpp
Commit 6222a28db5ed6a04ef7a423dd30d4cc7ce9c216f by julian.lettner
[TSan][Darwin] Enable test on non-macOS platforms

After removing the unnecessary `-mmacosx-version-min=10.12` compiler
flag this test can run on all platforms.  I confirmed that this test is
green for iOS, iOS simulator, and watchOS simulator.

Differential Revision: https://reviews.llvm.org/D85952
The file was modifiedcompiler-rt/test/tsan/Darwin/os_unfair_lock.c
Commit 8372e47bb968803c139d0df54ea49c7e4e2488d1 by mcinally
[NFCI][SVE] Move fixed length i32/i64 SDIV tests

Move fixed length SDIV tests from sve-fixed-length-int-arith.ll to sve-fixed-length-int-div.ll. The former uses CHECK lines that verify legalization decisions. That's overkill for the i8/i16 SDIV tests, since they have a tricky legalization.
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-arith.ll
Commit d9b062ad8777c283f9a1099a3ce29248348e5f40 by julian.lettner
[TSan][Darwin] Remove unnecessary lit substitution

We don't test on very old versions of Apple platforms anymore.  The
following lit substitution concerning the minimum deployment target for
ARC support can be removed.

```
%darwin_min_target_with_full_runtime_arc_support -> 10.11
```

Differential Revision: https://reviews.llvm.org/D85803
The file was modifiedcompiler-rt/test/tsan/Darwin/norace-objcxx-run-time.mm
The file was modifiedcompiler-rt/test/tsan/Darwin/objc-synchronize-cycle.mm
The file was modifiedcompiler-rt/test/tsan/Darwin/objc-synchronize-tagged.mm
The file was modifiedcompiler-rt/test/tsan/Darwin/objc-synchronize.mm
The file was modifiedcompiler-rt/test/tsan/Darwin/objc-synchronize-cycle-tagged.mm
The file was modifiedcompiler-rt/test/lit.common.cfg.py
The file was modifiedcompiler-rt/test/tsan/Darwin/objc-synchronize-nested-recursive.mm
Commit b74b80bb2d31dfb09559fcb71a1c474a421c633d by kamau.bridgeman
[PowerPC][PCRelative] Thread Local Storage Support for General Dynamic

This patch is the initial support for the General Dynamic Thread Local
Local Storage model to produce code sequence and relocations correct
to the ABI for the model when using PC relative memory operations.

Patch by: NeHuang

Reviewed By: stefanp

Differential Revision: https://reviews.llvm.org/D82315
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.h
The file was modifiedllvm/lib/MC/MCExpr.cpp
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCTLSDynamicCall.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPC.h
The file was modifiedllvm/include/llvm/MC/MCExpr.h
The file was addedllvm/test/CodeGen/PowerPC/pcrel-tls-general-dynamic.ll
The file was addedllvm/test/MC/PowerPC/pcrel-tls-general-dynamic-value-load-reloc.s
The file was modifiedllvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCMCInstLower.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.td
The file was modifiedllvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCInstPrinter.cpp
The file was addedllvm/test/MC/PowerPC/pcrel-tls-general-dynamic-address-load-reloc.s
Commit 54d8ded4b19aeba05006367766d148d34be01c02 by Matthew.Arsenault
allSGPRSpillsAreDead() should use actual FP/BP frame indices

The SGPR spills happen in SILowerSGPRSpills() and allSGPRSpillsAreDead()
make sure there are no SGPR spills pending during PEI. But the FP/BP
spills happen during PEI and are exceptions.

Use actual frame indices of FP/BP in allSGPRSpillsAreDead() to
accommodate the exceptions.

Differential Revision: https://reviews.llvm.org/D86291
The file was modifiedllvm/lib/Target/AMDGPU/SIFrameLowering.cpp
Commit 18b218007db69627bb651bb2a548afe92d615cd3 by Matthew.Arsenault
AMDGPU/GlobalISel: Legalize odd sized loads with widening

Custom lower and widen odd sized loads up to the alignment. The
default set of legalization actions doesn't have a way to represent
this. This fixes naturally aligned <3 x s8> and <3 x s16> loads.

This also starts moving towards eliminating the buggy and
overcomplicated legalization rules for narrowing. All the memory size
changes should be done in the lower or custom action, not NarrowScalar
/ FewerElements. These currently have redundant and ambiguous code
with the lower action.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-global.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-private.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-flat.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store-global.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-store.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-constant.mir
Commit 79ce9bb3803998fc2a20ce1c88392cf292f35f92 by Matthew.Arsenault
CodeGen: Don't drop AA metadata when splitting MachineMemOperands

Assuming this is used to split a memory access into smaller pieces,
the new access should still have the same aliasing properties as the
original memory access. As far as I can tell, this wasn't
intentionally dropped. It may be necessary to drop this if you are
moving the operand outside of the bounds of the original object in
such a way that it may alias another IR object, but I don't think any
of the existing users are doing this. Some of the uses widen into
unused alignment padding, which I think is OK.
The file was modifiedllvm/lib/CodeGen/MachineFunction.cpp
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-split-scalar-load-metadata.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-memory-metadata.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Commit cff0db08761f310dfebb5b41b307d2c12bda85fc by llvm-dev
[X86] Enable constexpr on POPCNT intrinsics (PR31446)

This is a first step patch to enable constexpr support and testing to a large number of x86 intrinsics.

All I've done here is provide a DEFAULT_FN_ATTRS_CONSTEXPR variant to our existing DEFAULT_FN_ATTRS tag approach that adds constexpr on c++ builds. The clang cuda headers do something similar.

I've started with POPCNT mainly as its tiny and are wrappers to generic __builtin_* intrinsics which already act as constexpr.

Differential Revision: https://reviews.llvm.org/D86229
The file was modifiedclang/test/CodeGen/popcnt-builtins.c
The file was modifiedclang/lib/Headers/popcntintrin.h
The file was modifiedclang/docs/ReleaseNotes.rst
Commit 74ca5275e9509e5ec4e9f1d9123bc10674734b20 by jonathan_roelofs
Fix a couple of typos. NFC
The file was modifiedllvm/include/llvm/CodeGen/TargetInstrInfo.h
The file was modifiedllvm/lib/CodeGen/MachineInstr.cpp
Commit 921c1b7df37d6f5353ed5fdffa117dcda0c941ba by Jonas Devlieghere
[lldb] Provide GetHomeDirectory wrapper in Host::FileSystem (NFC)

Provider a wrapper around llvm::sys::path::home_directory in the
FileSystem class. This will make it possible for the reproducers to
intercept the call in a central place.
The file was modifiedlldb/source/Target/Platform.cpp
The file was modifiedlldb/source/Host/common/Editline.cpp
The file was modifiedlldb/include/lldb/Host/FileSystem.h
The file was modifiedlldb/source/Interpreter/CommandInterpreter.cpp
The file was modifiedlldb/source/API/SBHostOS.cpp
The file was modifiedlldb/source/Host/common/FileSystem.cpp
Commit 2b0f40b049e653af113f679e15ee653fb06fc56c by maskray
[llvm-dwarfdump] Fix a typo: witin -> within
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/statistics-dwo.test
The file was modifiedllvm/tools/llvm-dwarfdump/Statistics.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/statistics.ll
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/statistics-v3.test
Commit dc693a036de4da8e89b1805ae2ae1cb637d37ba4 by georgemitenk0v
[MLIR][SPIRVToLLVM] Removed std to llvm patterns from the conversion

Removed the Standard to LLVM conversion patterns that were previously
pulled in for testing purposes. This helps to separate the conversion
to LLVM dialect of the MLIR module with both SPIR-V and Standard
dialects in it (particularly helpful for SPIR-V cpu runner). Also,
tests were changed accordingly.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D86285
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/spirv-types-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/misc-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/bitwise-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/memory-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/glsl-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/arithmetic-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/func-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/cast-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/constant-op-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/shift-ops-to-llvm.mlir
The file was modifiedmlir/lib/Conversion/SPIRVToLLVM/ConvertSPIRVToLLVMPass.cpp
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/comparison-ops-to-llvm.mlir
The file was modifiedmlir/test/Conversion/SPIRVToLLVM/logical-ops-to-llvm.mlir
Commit b587ca93be114d07ec3bf654add97d7872325281 by maskray
[test] Replace `yaml2obj >` with `yaml2obj -o` and remove unneeded input redirection
The file was modifiedlld/test/COFF/pdb-tpi-aligned-records.test
The file was modifiedlld/test/COFF/guardcf-thunk.s
The file was modifiedlldb/test/Shell/ObjectFile/MachO/subsections.yaml
The file was modifiedlld/test/COFF/pdbaltpath.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/section-permissions.yaml
The file was modifiedlld/test/COFF/pdb-global-hashes.test
The file was modifiedlldb/test/Shell/ObjectFile/wasm/stripped-debug-sections.yaml
The file was modifiedlld/test/COFF/pdb-globals.test
The file was modifiedlld/test/COFF/arm64-delayimport.yaml
The file was modifiedlld/test/COFF/locally-imported.test
The file was modifiedlld/test/COFF/icf-local.test
The file was modifiedlld/test/COFF/manifestinput-nowarning.test
The file was modifiedlld/test/COFF/opt.test
The file was modifiedlld/test/COFF/delayimporttables.yaml
The file was modifiedlld/test/COFF/entry-inference32.test
The file was modifiedlld/test/COFF/conflict-mangled.test
The file was modifiedlld/test/COFF/pdb-tpi-hash-size.test
The file was modifiedlld/test/COFF/pdata-arm64.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/short-build-id.yaml
The file was modifiedlld/test/COFF/pdb-file-static.test
The file was modifiedlldb/test/Shell/Breakpoint/debug_rnglist_basic.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/stack-cfi-arm.yaml
The file was modifiedlld/test/COFF/invalid-debug.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/unwind-via-stack-cfi.test
The file was modifiedlld/test/COFF/seh.test
The file was modifiedlld/test/COFF/resource.test
The file was modifiedlld/test/COFF/merge-resource-manifest.test
The file was modifiedlldb/test/Shell/Breakpoint/split-dwarf-5-addrbase.test
The file was modifiedlldb/test/Shell/SymbolFile/DWARF/debug_loc-aslr.s
The file was modifiedlld/test/COFF/arm64-import2.test
The file was modifiedlld/test/COFF/incremental.test
The file was modifiedlld/test/COFF/export-all.s
The file was modifiedlld/test/COFF/includeoptional.yaml
The file was modifiedlld/test/COFF/export-arm64.yaml
The file was modifiedlldb/test/Shell/ObjectFile/wasm/unified-debug-sections.yaml
The file was modifiedlld/test/COFF/section.test
The file was modifiedlld/test/COFF/armnt-imports.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/section-overlap.yaml
The file was modifiedlld/test/COFF/guardcf.test
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/section-types.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/aarch64-relocations.yaml
The file was modifiedlld/test/COFF/pdb.test
The file was modifiedlld/test/COFF/invalid-obj.test
The file was modifiedlld/test/COFF/pdb-procid-remapping.test
The file was modifiedlld/test/COFF/armnt-branch24t.test
The file was modifiedlld/test/COFF/arm64-magic.yaml
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/line-table-missing-file.test
The file was modifiedlld/test/COFF/options.test
The file was modifiedlld/test/COFF/alternatename.test
The file was modifiedlld/test/COFF/base.test
The file was modifiedlld/test/COFF/dll.test
The file was modifiedlld/test/COFF/reloc-x64.test
The file was modifiedlld/test/COFF/icf-different-align.test
The file was modifiedlld/test/COFF/pdb-same-name.test
The file was modifiedlldb/test/Shell/Commands/command-disassemble-process.yaml
The file was modifiedlldb/test/Shell/Minidump/memory-region-from-module.yaml
The file was modifiedlld/test/COFF/icf-simple.test
The file was modifiedlld/test/COFF/ignore4217.yaml
The file was modifiedlld/test/COFF/rsds.test
The file was modifiedlldb/test/Shell/ObjectFile/wasm/embedded-debug-sections.yaml
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/symtab-macho.test
The file was modifiedlld/test/COFF/order.test
The file was modifiedlld/test/COFF/pdb-exe-path-dots.test
The file was modifiedlld/test/COFF/armnt-rel32.yaml
The file was modifiedlld/test/COFF/tls32.test
The file was modifiedlldb/test/Shell/ObjectFile/wasm/basic.yaml
The file was modifiedlld/test/COFF/force-multiple.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/unwind-via-stack-win-no-memory-info.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/base-address.yaml
The file was modifiedlld/test/COFF/driver-opt.s
The file was modifiedlldb/test/Shell/ObjectFile/ELF/build-id-case.yaml
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/sections.yaml
The file was modifiedlldb/test/Shell/Minidump/no-process-id.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/section-addresses.yaml
The file was modifiedlld/test/COFF/defparser.test
The file was modifiedlld/test/COFF/reloc-arm.test
The file was modifiedlld/test/COFF/icf-associative.test
The file was modifiedlld/test/COFF/pdb-none.test
The file was modifiedlldb/test/Shell/Minidump/disassemble-no-module.yaml
The file was modifiedlld/test/COFF/subsystem-drectve.test
The file was modifiedlldb/test/Shell/Breakpoint/single-file-split-dwarf.test
The file was modifiedlldb/test/Shell/Minidump/Windows/arm-fp-unwind.test
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/basic-info-arm64.yaml
The file was modifiedlldb/test/Shell/Breakpoint/implicit_const_form_support.test
The file was modifiedlld/test/COFF/def-name.test
The file was modifiedlld/test/COFF/machine.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/stack-cfi-parsing.test
The file was modifiedlld/test/COFF/manifestinput.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/symtab.test
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/symbol.yaml
The file was modifiedlld/test/COFF/heap.test
The file was modifiedlldb/test/Shell/Breakpoint/debug_rnglist_rlestartend.test
The file was modifiedlld/test/COFF/seh-comdat.test
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/disassemble-thumb.yaml
The file was modifiedlld/test/COFF/delayimports-armnt.yaml
The file was modifiedlld/test/COFF/entry-inference2.test
The file was modifiedlld/test/COFF/include.test
The file was modifiedlld/test/COFF/locally-imported32.test
The file was modifiedlldb/test/Shell/ObjectFile/MachO/lc_version_min.yaml
The file was modifiedlld/test/COFF/pdb-publics-import.test
The file was modifiedlld/test/COFF/section-order.test
The file was modifiedlld/test/COFF/version.test
The file was modifiedlld/test/COFF/export32.test
The file was modifiedlld/test/COFF/no-ipi-stream.test
The file was modifiedlld/test/COFF/export-armnt.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/minidebuginfo-no-lzma.yaml
The file was modifiedlld/test/COFF/includeoptional2.yaml
The file was modifiedlld/test/COFF/mixed-resource-obj.yaml
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/uuid.yaml
The file was modifiedlld/test/COFF/manifest.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/section-types-edgecases.yaml
The file was modifiedlld/test/COFF/manifestinput-error.test
The file was modifiedlldb/test/Shell/Minidump/Windows/find-module.test
The file was modifiedlldb/test/Shell/Minidump/dump-all.test
The file was modifiedlld/test/COFF/linkrepro-pdb.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/gnu-debuglink.yaml
The file was modifiedlldb/test/Shell/ObjectFile/MachO/lc_build_version.yaml
The file was modifiedlld/test/COFF/icf-data.test
The file was modifiedlld/test/COFF/weak-external2.test
The file was modifiedlld/test/COFF/broken-arm-reloc.yaml
The file was modifiedlld/test/COFF/map.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/compressed-sections.yaml
The file was modifiedlld/test/COFF/align.s
The file was modifiedlld/test/COFF/crt-dyn-initializer-order.test
The file was modifiedlld/test/COFF/weak-external3.test
The file was modifiedlld/test/COFF/symtab.test
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/sections-names.yaml
The file was modifiedlld/test/COFF/armnt-entry-point.test
The file was modifiedlld/test/COFF/baserel.test
The file was modifiedlld/test/COFF/pdb-natvis.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/unwind-via-stack-win.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/avr-basic-info.yaml
The file was modifiedlld/test/COFF/noentry.test
The file was modifiedlld/test/COFF/icf-circular.test
The file was modifiedlldb/test/Shell/Breakpoint/debug_addrx.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/line-table-mixed-path-styles.test
The file was modifiedlld/test/COFF/pdb-options.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/netbsd-exec-8.99.30-amd64.yaml
The file was modifiedlld/test/COFF/invalid-debug-type.test
The file was modifiedlld/test/COFF/common-alignment.test
The file was modifiedlld/test/COFF/allow-unknown-debug-info.test
The file was modifiedlld/test/COFF/filealign.test
The file was modifiedlldb/test/Shell/Breakpoint/debug_rnglistx_rlex.test
The file was modifiedlld/test/COFF/icf-circular2.test
The file was modifiedlld/test/COFF/debug.test
The file was modifiedlld/test/COFF/common.test
The file was modifiedlld/test/COFF/pdbstream.test
The file was modifiedlld/test/COFF/weak-external.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/section-types.yaml
The file was modifiedlld/test/COFF/conflict.test
The file was modifiedlld/test/COFF/output-chars.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/line-table-discontinuous-file-ids.test
The file was modifiedlld/test/COFF/armnt-mov32t-exec.test
The file was modifiedlld/test/COFF/largeaddressaware.test
The file was modifiedlld/test/COFF/responsefile.test
The file was modifiedlld/test/COFF/arm64-relocs-imports.test
The file was modifiedlld/test/COFF/locally-imported-arm64.test
The file was modifiedlld/test/COFF/out.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/basic-info.yaml
The file was modifiedlld/test/COFF/internal.test
The file was modifiedlldb/test/Shell/Breakpoint/split-dwarf5-debug-stroffsets.test
The file was modifiedlld/test/COFF/unwind.test
The file was modifiedlldb/test/Shell/Commands/command-target-modules-dump-sections.yaml
The file was modifiedlldb/test/Shell/Breakpoint/debug_rnglist_offset_pair.test
The file was modifiedlld/test/COFF/associative-comdat-empty.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/PT_LOAD-overlap-PT_INTERP.yaml
The file was modifiedlld/test/COFF/delayimports-error.test
The file was modifiedlld/test/COFF/linkrepro.test
The file was modifiedlldb/test/Shell/Minidump/memory-region.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/duplicate-section.yaml
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/dep-modules.yaml
The file was modifiedlld/test/COFF/pdata-arm64-bad.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/PT_LOAD-overlap-PT_TLS.yaml
The file was modifiedlld/test/COFF/merge.test
The file was modifiedlldb/test/Shell/Minidump/fb-dump.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/line-table-edgecases.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/minidebuginfo-find-symbols.yaml
The file was modifiedlld/test/COFF/loadcfg.test
The file was modifiedlld/test/COFF/timestamp.test
The file was modifiedlld/test/COFF/include2.test
The file was modifiedlldb/test/Shell/ObjectFile/MachO/lc_build_version_notools.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/minidebuginfo-corrupt-xz.yaml
The file was modifiedlldb/test/Shell/ObjectFile/ELF/PT_TLS-overlap-PT_LOAD.yaml
The file was modifiedlld/test/COFF/force.test
The file was modifiedlld/test/COFF/imports-mangle.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/unwind-via-raSearch.test
The file was modifiedlld/test/COFF/crt-chars.test
The file was modifiedlld/test/COFF/filetype.test
The file was modifiedlld/test/COFF/guardcf-align.s
The file was modifiedlld/test/COFF/dllimport-gc.test
The file was modifiedlld/test/COFF/hello32.test
The file was modifiedlld/test/COFF/armnt-movt32t.test
The file was modifiedlld/test/COFF/reloc-x86.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/PT_LOAD-overlap.yaml
The file was modifiedlld/test/COFF/driver.test
The file was modifiedlld/test/COFF/long-section-name.test
The file was modifiedlld/test/COFF/invalid-section-number.test
The file was modifiedlld/test/COFF/fixed.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/PT_LOAD.yaml
The file was modifiedlld/test/COFF/stack.test
The file was modifiedlld/test/COFF/subsystem-inference2.test
The file was modifiedlld/test/COFF/wholearchive.s
The file was modifiedlld/test/COFF/exclude-all.s
The file was modifiedlld/test/COFF/pdbstripped.test
The file was modifiedlld/test/COFF/sort-debug.test
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/export-dllfunc.yaml
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/basic-info-arm.yaml
The file was modifiedlld/test/COFF/ar-comdat.test
The file was modifiedlldb/test/Shell/Process/Windows/launch_failure.yaml
The file was modifiedlld/test/COFF/combined-resources.test
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/invalid-export-table.yaml
The file was modifiedlldb/test/Shell/Minidump/breakpad-symbols.test
The file was modifiedlld/test/COFF/loadcfg32.test
The file was modifiedlld/test/COFF/armnt-dynamicbase.test
The file was modifiedlld/test/COFF/debug-fastlink.test
The file was modifiedlld/test/COFF/ignore-many.test
The file was modifiedlld/test/COFF/tls.test
The file was modifiedlldb/test/Shell/ObjectFile/ELF/PT_LOAD-empty.yaml
The file was modifiedlldb/test/Shell/ObjectFile/PECOFF/basic-info.yaml
The file was modifiedlld/test/COFF/default-alignment.test
The file was modifiedlld/test/COFF/entry-mangled.test
The file was modifiedlld/test/COFF/delayimports32.test
The file was modifiedlld/test/COFF/export.test
The file was modifiedlld/test/COFF/armnt-blx23t.test
The file was modifiedlldb/test/Shell/Minidump/Windows/broken-unwind.test
The file was modifiedlldb/test/Shell/SymbolFile/Breakpad/line-table.test
The file was modifiedlld/test/COFF/order-i386.test
The file was modifiedlld/test/COFF/entry-drectve.test
Commit ed17b6f6308f81273919532d422e3858d9a7c1da by Jonas Devlieghere
[lldb] Extract FileSystem initialization code into helper (NFC)

The FileSystem initialization depends on the reproducer mode. It has
been growing organically to the point where it deserves its own helper
function. This also allows for early returns to simplify the code.
The file was modifiedlldb/source/Initialization/SystemInitializerCommon.cpp
Commit 4e266eaf132fa7e16eb6593dcfe4f4b9f55ea092 by dschuff
Make DWARFExpression::GetLocationExpression public

This method is used to get the DataExtractor when the expression is a location list.

Reviewed By: labath

Differential Revision: https://reviews.llvm.org/D86090
The file was modifiedlldb/include/lldb/Expression/DWARFExpression.h
Commit cca3f3dd2681877cae3dc601779e268ed2341fa3 by frank.laub
[MLIR] Add affine.parallel folder and normalizer

Add a folder to the affine.parallel op so that loop bounds expressions are canonicalized.

Additionally, a new AffineParallelNormalizePass is added to adjust affine.parallel ops so that the lower bound is always 0 and the upper bound always represents a range with a step size of 1.

Differential Revision: https://reviews.llvm.org/D84998
The file was modifiedmlir/include/mlir/Dialect/Affine/Passes.td
The file was modifiedmlir/test/Dialect/Affine/canonicalize.mlir
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineOps.td
The file was addedmlir/lib/Dialect/Affine/Transforms/AffineParallelNormalize.cpp
The file was modifiedmlir/include/mlir/Dialect/Affine/Utils.h
The file was modifiedmlir/lib/Dialect/Affine/IR/AffineOps.cpp
The file was modifiedmlir/lib/Dialect/Affine/Transforms/CMakeLists.txt
The file was addedmlir/test/Dialect/Affine/affine-parallel-normalize.mlir
The file was modifiedmlir/include/mlir/Dialect/Affine/Passes.h
The file was modifiedmlir/include/mlir/Dialect/Affine/IR/AffineValueMap.h
Commit 038edf6029bafe70b1f7165abe2b0e61ddf506b3 by richard
Don't reject uses of void-returning consteval functions.
The file was modifiedclang/lib/AST/ExprConstant.cpp
The file was modifiedclang/test/SemaCXX/consteval-return-void.cpp
Commit 3d82c9b6960afe50a76b8c23e9bc42c51d41e767 by jonchesterfield
Fix 32 bit build broken by D85990 by dropping align from filecheck pattern
The file was modifiedclang/test/CodeGenCXX/attr-loader-uninitialized.cpp
Commit 9670029b6b302c75bb373fb1814f4e02790c4da8 by i
[ELF] Keep st_type for symbol assignment

PR46970: for `alias = aliasee`, the alias can be used in relocation processing
and on ARM st_type does affect Thumb interworking. It is thus desirable for the
alias to get the same st_type.

Note that the st_size field should not be inherited because some tools use
st_size=0 as a heuristic to detect aliases. Retaining st_size can thwart such
heuristics and cause aliases to be preferred over the original symbols.

Differential Revision: https://reviews.llvm.org/D86263
The file was addedlld/test/ELF/linkerscript/symbol-assign-type.s
The file was modifiedlld/test/ELF/arm-thumb-interwork-ifunc.s
The file was modifiedlld/ELF/LinkerScript.h
The file was modifiedlld/docs/ELF/linker_script.rst
The file was modifiedlld/test/ELF/linkerscript/common-assign.s
The file was modifiedlld/ELF/LinkerScript.cpp
Commit 1f3c92f968edb8892ca7c152ca756f771a7f476d by julian.lettner
[compiler-rt][Darwin] Refactor minimum deployment target substitutions

* Support macOS 11+ version scheme
* Standardize substitution name `%min_deployment_target=x.y`
* Remove unneeded error cases (the input version is hard-coded)
* Specify version as tuple instead of string; no need to parse it

These changes should also facilitate a future addition of a substitution
that expands to "set deployment target to current target version"
(https://reviews.llvm.org/D70151).

Reviewed By: delcypher

Differential Revision: https://reviews.llvm.org/D85925
The file was modifiedcompiler-rt/test/asan/TestCases/initialization-bug.cpp
The file was modifiedcompiler-rt/test/lit.common.cfg.py
Commit efeb65d53b88d9c3ac3a185c396efd8db8c9f7d9 by richard
Fix up clangd after Clang 038edf6029bafe70b1f7165abe2b0e61ddf506b3.

Now that Clang is able to constant-evaluate void-typed expressions,
disable showing hover-card values for them. It's not useful to say that
an expression cast to void has value '<no value>', even if we can
constant-evaluate it to that result!
The file was modifiedclang-tools-extra/clangd/Hover.cpp
Commit 53aff8d864ad48d00d2dc5e49ad07034e8dcb82f by julian.lettner
[Darwin][iOS] Enable test on non-macOS platforms

We are now using a properly-substituted minimal deployment target
compiler flag (`%min_macos_deployment_target=10.11`).  Enable test on
iOS and watchOS plus simulators.  We are also not testing on very old
platforms anymore, so we can remove some obsolete lit infrastructure.
The file was modifiedcompiler-rt/test/lit.common.cfg.py
The file was modifiedcompiler-rt/test/asan/TestCases/initialization-bug.cpp
Commit 70923983e54253723600eb2f4cdfb0fbb347a364 by richard
Improve pretty-printing for APValues of void type.

No functionality change intended: there doesn't seem to be any way to
cause Clang to print such a value, but they can show up when dumping
APValues from a debugger.
The file was modifiedclang/lib/AST/APValue.cpp
Commit 1283dca0076b3441fa0ecae86d9f2d2afd3afa6f by Justin Bogner
[GISel] Correct the known bits of G_ANYEXT

Known bits for G_ANYEXT was incorrectly using KnownBits::zext, causing
us to treat the high bits as zero even though they're (by definition)
unknown.

Differential Revision: https://reviews.llvm.org/D86323
The file was modifiedllvm/unittests/CodeGen/GlobalISel/KnownBitsTest.cpp
The file was modifiedllvm/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
Commit 34fe9613dda3c7d8665b609136a8c12deb122382 by Vitaly Buka
Fix msan build

After D85820 TERMINFO_LIB is undefined.
The file was modifiedllvm/cmake/config-ix.cmake
Commit ea9bf460a876fbdf9457ef48bc61a9cece5b6b40 by Vitaly Buka
[NFC][libFuzzer] Try to fix test on Windows
Broken after D86247
The file was modifiedcompiler-rt/test/fuzzer/value-profile-load.test
Commit 7ac737e56bee721fb3535006140362c6e08726bb by vsapsai
[HeaderSearch] Fix processing #import-ed headers multiple times with modules enabled.

HeaderSearch was marking requested HeaderFileInfo as Resolved only based on
the presence of ExternalSource. As the result, using any module was enough
to set ExternalSource and headers unknown to this module would have
HeaderFileInfo with empty fields, including `isImport = 0`, `NumIncludes = 0`.
Such HeaderFileInfo was preserved without changes regardless of how the
header was used in other modules and caused incorrect result in
`HeaderSearch::ShouldEnterIncludeFile`.

Fix by marking HeaderFileInfo as Resolved only if ExternalSource knows
about this header.

rdar://problem/62126911

Reviewed By: bruno

Differential Revision: https://reviews.llvm.org/D80263
The file was modifiedclang/lib/Lex/HeaderSearch.cpp
The file was addedclang/test/Modules/Inputs/import-once/ImportOnce.framework/Headers/ImportOnce.h
The file was addedclang/test/Modules/Inputs/import-once/Unrelated.framework/Headers/Unrelated.h
The file was addedclang/test/Modules/import-once.m
The file was addedclang/test/Modules/Inputs/import-once/ImportOnce.framework/Modules/module.modulemap
The file was addedclang/test/Modules/Inputs/import-once/IndirectImporter.framework/Modules/module.modulemap
The file was addedclang/test/Modules/Inputs/import-once/IndirectImporter.framework/Headers/IndirectImporter.h
The file was addedclang/test/Modules/Inputs/import-once/Unrelated.framework/Modules/module.modulemap
Commit 66c882e529a388465463e80de93b4f353a9391a8 by Vitaly Buka
Revert "[libFuzzer] Fix value-profile-load test."

D86247 fails on Windows.

This reverts commit 428bebaf10e177db5e42206ca8f871f0bcbef058.
The file was modifiedcompiler-rt/test/fuzzer/LoadTest.cpp
Commit c90ca0c8e4956e051e2f29cff0c38f9f03b32f87 by Jonas Devlieghere
[lldb] Implement WorkingDirectoryProvider in terms of DirectoryProvider (NFC)

Add an abstract base class that can be used to create other directory
providers.
The file was modifiedlldb/source/Utility/Reproducer.cpp
The file was modifiedlldb/source/API/SBReproducer.cpp
The file was modifiedlldb/include/lldb/Utility/Reproducer.h
The file was modifiedlldb/source/Initialization/SystemInitializerCommon.cpp
Commit 73af341beb8435c7da1dd5e7a8abacb2de6a236d by Jonas Devlieghere
[lldb] Capture and load home directory from the reproducer.

When replaying the reproducer, lldb should source the .lldbinit file
that was captured by the reproducer and not the one in the current home
directory. This requires that we store the home directory as part of the
reproducer. By returning the virtual home directory during replay, we
ensure the correct virtual path gets constructed which the VFS can then
find and remap to the correct file in the reproducer root.

This patch adds a new HomeDirectoryProvider, similar to the existing
WorkingDirectoryProvider. As the home directory is not part of the VFS,
it is stored in LLDB's FileSystem instance.
The file was addedlldb/test/Shell/Reproducer/Inputs/HomeDir.in
The file was modifiedlldb/source/Commands/CommandObjectReproducer.cpp
The file was modifiedlldb/include/lldb/Host/FileSystem.h
The file was modifiedlldb/source/Initialization/SystemInitializerCommon.cpp
The file was modifiedlldb/source/Utility/Reproducer.cpp
The file was addedlldb/test/Shell/Reproducer/TestHomeDir.test
The file was modifiedlldb/source/Host/common/FileSystem.cpp
The file was modifiedlldb/include/lldb/Utility/Reproducer.h
Commit 95e18b2d9d5f93c209ea81df79c2e18ef77de506 by shkzhang
[PowerPC] Fix a typo for InstAlias of mfsprg

D77531 has a type for mfsprg, it should be mtsprg. This patch is to fix
this typo.
The file was modifiedllvm/lib/Target/PowerPC/PPCInstr64Bit.td
Commit fe86dbb32da21e1c8c6eb4864a00f61ed3d003a3 by richard
[clang]:  Remove assertion which checks explicit declaration

explicit keyword is declared outside of class is invalid, invalid explicit declaration is handled inside DiagnoseFunctionSpecifiers() function. To avoid compiler crash in case of invalid explicit declaration, remove assertion.

Reviewed By: rsmith

Differential Revision: https://reviews.llvm.org/D83929
The file was addedclang/test/Misc/explicit.cpp
The file was modifiedclang/lib/Sema/DeclSpec.cpp
Commit e2ab5bcf569107caf8c5efb6013d6902fe32238b by smeenai
[runtimes] Allow LLVM_BUILTIN_TARGETS to include Darwin

We have two ways of using the runtimes build setup to build the
builtins. You can either have an empty LLVM_BUILTIN_TARGETS (or have it
include the "default" target), in which case builtin_default_target is
called to set up the default target, or you can have actual triples in
LLVM_BUILTIN_TARGETS, in which case builtin_register_target is called
for each triple. builtin_default_target lets you build the builtins for
Darwin (assuming your default triple is Darwin); builtin_register_target
does not.

I don't understand the reason for this distinction. The Darwin builtins
build is special in that a single CMake configure handles building the
builtins for multiple platforms (e.g. macOS, iPhoneSimulator, and iOS)
and architectures (e.g. arm64, armv7, and x86_64). Consequently, if you
specify multiple Darwin triples in LLVM_BUILTIN_TARGETS, expecting each
configure to only build for that particular triple, it won't work.
However, if you specify a *single* x86_64-apple-darwin triple in
LLVM_BUILTIN_TARGETS, that single configure will build the builtins for
all Darwin targets, exactly the same way that the default target would.
The only difference between the configuration for the default target and
the x86_64-apple-darwin triple is that the latter runs the configuration
with `-DCOMPILER_RT_DEFAULT_TARGET_ONLY=ON`, but that makes no
difference for Apple targets (none of the CMake codepaths which have
different behavior based on that variable are run for Apple targets).

I tested this by running two builtins builds on my Mac, one with the
default target and one with the x86_64-apple-darwin19.5.0 target (which
is the default target triple for my clang). The only relevant
CMakeCache.txt difference was the following, and as discussed above, it
has no effect on the actual build for Apple targets:

```
-//Default triple for which compiler-rt runtimes will be built.
-COMPILER_RT_DEFAULT_TARGET_TRIPLE:STRING=x86_64-apple-darwin19.5.0
+//No help, variable specified on the command line.
+COMPILER_RT_DEFAULT_TARGET_ONLY:UNINITIALIZED=ON
```

Furthermore, when I add the `-D` flag to compiler-rt's libtool
invocations, the libraries produced by the two builds are *identical*.

If anything, I would expect builtin_register_target to complain if you
tried specifying a triple for a particular Apple platform triple (e.g.
macosx), since that's the scenario in which it won't work as you want.
The generic darwin triple should be fine though, as best as I can tell.
I'm happy to add the error for specific Apple platform triples, either
in this diff or in a follow-up.

Reviewed By: phosek

Differential Revision: https://reviews.llvm.org/D86313
The file was modifiedllvm/runtimes/CMakeLists.txt
Commit 5257a60ee02e5cbecb2f577b27a9c89e92b2f85f by michael.hliao
[amdgpu] Add codegen support for HIP dynamic shared memory.

Summary:
- HIP uses an unsized extern array `extern __shared__ T s[]` to declare
  the dynamic shared memory, which size is not known at the
  compile time.

Reviewers: arsenm, yaxunl, kpyzhov, b-sumner

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D82496
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/hip.extern.shared.array.ll
The file was addedllvm/test/CodeGen/MIR/AMDGPU/machine-function-info-dynlds-align-invalid-case.mir
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/SIMachineFunctionInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineFunction.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was addedllvm/test/CodeGen/AMDGPU/hip.extern.shared.array.ll
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/machine-function-info-no-ir.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/include/llvm/CodeGen/MIRYamlMapping.h
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/machine-function-info.ll
Commit 290e399f967390648ec7cf53c4b75a883a90b609 by Xing
[DWARFYAML] Add support for emitting multiple abbrev tables.

This patch adds support for emitting multiple abbrev tables. Currently,
compilation units will always reference the first abbrev table.

Reviewed By: jhenderson, labath

Differential Revision: https://reviews.llvm.org/D86194
The file was modifiedllvm/unittests/DebugInfo/GSYM/GSYMTest.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDieTest.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-LittleEndian.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-BigEndian.yaml
The file was modifiedllvm/test/tools/llvm-gsymutil/ARM_AArch64/fat-macho-dwarf.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_abbrev.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_attr_file_indexes.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF5-abbrevValues.yaml
The file was modifiedlldb/unittests/SymbolFile/DWARF/DWARFASTParserClangTests.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF5-debug_info.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_ranges.yaml
The file was modifiedllvm/test/tools/llvm-objcopy/MachO/Inputs/strip-all-with-dwarf.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
The file was modifiedlldb/unittests/SymbolFile/DWARF/XcodeSDKModuleTests.cpp
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_file_encoding.yaml
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-abbrev.yaml
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_line.yaml
The file was modifiedlldb/unittests/Symbol/Inputs/inlined-functions.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_attr_file_indexes_no_files.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF2-AddrSize8-FormValues.yaml
The file was modifiedllvm/test/tools/llvm-gsymutil/X86/mach-dwarf.yaml
The file was modifiedllvm/test/tools/llvm-dwarfdump/X86/verify_overlapping_cu_ranges.yaml
The file was modifiedlldb/unittests/Expression/DWARFExpressionTest.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_info.yaml
The file was modifiedlldb/test/API/functionalities/source-map/a.yaml
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
Commit 16f27e1e18fd975238e5439f48273c5aa0b09594 by smeenai
[cmake] Don't use ld.lld when targeting Darwin

ld.lld is an ELF linker. We can switch to the new LLD for Mach-O port
when it's more complete, but for now, assume the user will have set
CMAKE_LINKER correctly themselves when targeting Darwin.
The file was modifiedllvm/cmake/modules/LLVMExternalProjectUtils.cmake
Commit e151acc073ab8b311dbaee11a6bc4cf16cef0575 by Xing
[DWARFYAML] Add support for emitting multiple abbrev tables.

This patch adds support for emitting multiple abbrev tables. Currently,
compilation units will always reference the first abbrev table.

Reviewed By: jhenderson, labath

Differential Revision: https://reviews.llvm.org/D86194
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
Commit f7ff0ace96db9164dcde232c36cab6519ea4fce8 by Xing
[DWARFYAML] Add support for referencing different abbrev tables.

This patch adds support for referencing different abbrev tables. We use
'ID' to distinguish abbrev tables and use 'AbbrevTableID' to explicitly
assign an abbrev table to compilation units.

The syntax is:
```
debug_abbrev:
  - ID: 0
    Table:
      ...
  - ID: 1
    Table:
      ...
debug_info:
  - ...
    AbbrevTableID: 1 ## Reference the second abbrev table.
  - ...
    AbbrevTableID: 0 ## Reference the first abbrev table.
```

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D83116
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_info.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF5-debug_info.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_abbrev.yaml
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-abbrev.yaml
Commit 7d9a16241fdd800a394e5cb4ecdf76f6bb8c9d9f by yrouban
[ADT] Allow IsSizeLessThanThresholdT for incomplete types. NFC

If the type T is incomplete then sizeof(T) results in C++ compilation error at line:
  static constexpr bool value = sizeof(T) <= (2 * sizeof(void *));

This patch allows incomplete types in parameters of function. Example:
  using SomeFunc = void(SomeIncompleteType &);
  llvm::unique_function<SomeFuncType> SomeFunc;

Reviewers: DaniilSuchkov, vvereschaka

Differential Revision: https://reviews.llvm.org/D81554
The file was modifiedllvm/include/llvm/ADT/FunctionExtras.h
Commit 6d242a73264ef1e3e128547f00e0fe2d20d3ada0 by Xing
Revert "[DWARFYAML] Add support for referencing different abbrev tables."

This reverts commit f7ff0ace96db9164dcde232c36cab6519ea4fce8.

This change is causing build failure.

http://lab.llvm.org:8011/builders/clang-cmake-armv7-global-isel/builds/10400
The file was modifiedllvm/lib/ObjectYAML/ELFEmitter.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-abbrev.yaml
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF5-debug_info.yaml
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_info.yaml
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_abbrev.yaml
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
Commit 21f8d414689387d97120a49df3dabca10e3262e4 by sifontes
Refactor Reduction Tree Pass

Refactor the way the reduction tree pass works in the MLIR Reduce tool by introducing a set of utilities that facilitate the implementation of new Reducer classes to be used in the passes.

This will allow for the fast implementation of general transformations to operate on all mlir modules as well as custom transformations for different dialects.

These utilities allow for the implementation of Reducer classes by simply defining a method that indexes the operations/blocks/regions to be transformed and a method to perform the deletion or transfomration based on the indexes.

Create the transformSpace class member in the ReductionNode class to keep track of the indexes that have already been transformed or deleted at a current level.

Delete the FunctionReducer class and replace it with the OpReducer class to reflect this new API while performing the same transformation and allowing the instantiation of a reduction pass for different types of operations at the module's highest hierarchichal level.

Modify the SinglePath Traversal method to reflect the use of the new API.

Reviewed: jpienaar

Differential Revision: https://reviews.llvm.org/D85591
The file was modifiedmlir/include/mlir/Reducer/OptReductionPass.h
The file was modifiedmlir/include/mlir/Reducer/ReductionTreePass.h
The file was modifiedmlir/tools/mlir-reduce/OptReductionPass.cpp
The file was addedmlir/tools/mlir-reduce/Passes/OpReducer.cpp
The file was removedmlir/include/mlir/Reducer/Passes/FunctionReducer.h
The file was removedmlir/tools/mlir-reduce/Passes/FunctionReducer.cpp
The file was modifiedmlir/tools/mlir-reduce/ReductionNode.cpp
The file was addedmlir/include/mlir/Reducer/Passes/OpReducer.h
The file was modifiedmlir/include/mlir/Reducer/ReductionNode.h
The file was modifiedmlir/tools/mlir-reduce/CMakeLists.txt
The file was removedmlir/tools/mlir-reduce/ReductionTreePass.cpp
The file was modifiedmlir/tools/mlir-reduce/mlir-reduce.cpp
The file was addedmlir/include/mlir/Reducer/ReductionTreeUtils.h
The file was addedmlir/tools/mlir-reduce/ReductionTreeUtils.cpp
Commit a54eb9b7c509490f1e3cecba489de14a58699192 by llvm-project
[Polly] Update isl to isl-0.22.1-416-g61d6dc75.

This fixes llvm.org/PR47104
The file was addedpolly/lib/External/isl/interface/configure
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The file was modifiedpolly/lib/External/isl/test_inputs/codegen/separation_class2.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/infinite2.c
The file was modifiedpolly/lib/External/isl/include/isl/mat.h
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The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/stride2.c
The file was modifiedpolly/lib/External/isl/isl_local_space.c
The file was modifiedpolly/lib/External/isl/isl_bernstein.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/m2-1.c
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The file was addedpolly/lib/External/isl/interface/install-sh
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The file was modifiedpolly/lib/External/isl/include/isl/map.h
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The file was modifiedpolly/lib/External/isl/test_inputs/codegen/group.c
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The file was modifiedpolly/lib/External/isl/m4/ax_detect_clang.m4
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The file was modifiedpolly/lib/External/isl/isl_bound.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-fusion1.c
The file was modifiedpolly/lib/External/isl/isl_val.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/yosr.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/dealII.c
The file was modifiedpolly/lib/External/isl/isl_multi_arith_templ.c
The file was modifiedpolly/lib/External/isl/isl_union_multi.c
The file was modifiedpolly/lib/External/isl/config.sub
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/stride7-1.c
The file was addedpolly/lib/External/isl/isl_union_pw_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/gesced3.c
The file was modifiedpolly/lib/External/isl/interface/cpp.cc
The file was modifiedpolly/lib/External/isl/isl_union_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/merge.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/p6-0.c
The file was modifiedpolly/lib/External/isl/isl_test_cpp.cc
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/unroll4.c
The file was addedpolly/lib/External/isl/interface/missing
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/ts1d-check0-0.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/code_gen-2.c
The file was modifiedpolly/lib/External/isl/isl_pw_lift_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/component6.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/forwardsub-2-1-2-3.c
The file was addedpolly/lib/External/isl/isl_aff_lex_templ.c
The file was modifiedpolly/lib/External/isl/GIT_HEAD_ID
The file was modifiedpolly/lib/External/isl/isl_union_eval.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/multi-stride.c
The file was modifiedpolly/lib/External/isl/doc/Makefile.in
The file was modifiedpolly/lib/External/isl/include/isl/constraint.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/4-param.c
The file was addedpolly/lib/External/isl/isl_pw_locals_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/thomasset.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/walters3.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-lim-lam6.c
The file was modifiedpolly/lib/External/isl/isl_affine_hull.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/unroll7.c
The file was modifiedpolly/lib/External/isl/interface/Makefile.am
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/faber.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/gesced.c
The file was modifiedpolly/lib/External/isl/isl_input.c
The file was modifiedpolly/lib/External/isl/isl_vec_private.h
The file was modifiedpolly/lib/External/isl/interface/isl.py
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/component4.c
The file was modifiedpolly/lib/External/isl/isl_box.c
The file was addedpolly/lib/External/isl/interface/ltmain.sh
The file was addedpolly/lib/External/isl/isl_multi_min_max_templ.c
The file was modifiedpolly/lib/External/isl/include/isl/cpp.h
The file was modifiedpolly/lib/External/isl/interface/python.cc
The file was modifiedpolly/lib/External/isl/isl_polynomial.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-pingali4.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/separation_class.c
The file was modifiedpolly/lib/External/isl/include/isl/ast.h
The file was modifiedpolly/lib/External/isl/include/isl/polynomial.h
The file was addedpolly/lib/External/isl/interface/configure.ac
The file was modifiedpolly/lib/External/isl/include/isl/vec.h
The file was modifiedpolly/lib/External/isl/isl_vec.c
The file was addedpolly/lib/External/isl/test_inputs/schedule/niewang.sc
The file was modifiedpolly/lib/External/isl/isl_convex_hull.c
The file was addedpolly/lib/External/isl/interface/config.sub
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/unroll.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/usvd_e_t.c
The file was modifiedpolly/lib/External/isl/isl_constraint_private.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/chosol-0.c
The file was addedpolly/lib/External/isl/interface/depcomp
The file was modifiedpolly/lib/External/isl/isl_flow.c
The file was modifiedpolly/lib/External/isl/include/isl/val.h
The file was modifiedpolly/lib/External/isl/include/isl/aff.h
The file was modifiedpolly/lib/External/isl/isl_test_cpp-checked.cc
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/stride6-0.c
The file was addedpolly/lib/External/isl/test_inputs/schedule/niewang.st
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-lim-lam2.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/cholesky2.c
The file was modifiedpolly/lib/External/isl/isl_multi_templ.c
The file was addedpolly/lib/External/isl/isl_union_locals_templ.c
The file was modifiedpolly/lib/External/isl/codegen.c
The file was addedpolly/lib/External/isl/isl_insert_domain_templ.c
The file was modifiedpolly/lib/External/isl/isl_scheduler.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/singleton.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/durbin_e_s.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/guide.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/unroll6.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-mg-interp.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/wak1-0.c
The file was modifiedpolly/lib/External/isl/isl_constraint.c
The file was addedpolly/lib/External/isl/isl_pw_insert_domain_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/uday_scalars.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/ts1d-mp-i_ts-m_b-0.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/orc.c
The file was modifiedpolly/lib/External/isl/Makefile.am
The file was modifiedpolly/lib/External/isl/isl_ast_build.c
The file was modifiedpolly/lib/External/isl/isl_aff_private.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/component0.c
The file was modifiedpolly/lib/External/isl/isl_map.c
The file was modifiedpolly/lib/External/isl/isl_aff.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-mg-interp2.c
The file was addedpolly/lib/External/isl/isl_multi_insert_domain_templ.c
The file was addedpolly/lib/External/isl/isl_ilp_opt_val_templ.c
The file was modifiedpolly/lib/External/isl/Makefile.in
The file was modifiedpolly/lib/External/isl/isl_coalesce.c
The file was addedpolly/lib/External/isl/isl_multi_union_add_templ.c
The file was modifiedpolly/lib/External/isl/isl_pw_insert_dims_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/vasilache.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/levenshtein-1-2-3.c
The file was modifiedpolly/lib/External/isl/aclocal.m4
The file was modifiedpolly/lib/External/isl/include/isl/local_space.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/vivien2.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/fc1-1.c
The file was modifiedpolly/lib/External/isl/m4/ax_detect_gmp.m4
The file was addedpolly/lib/External/isl/isl_ilp_opt_multi_val_templ.c
The file was modifiedpolly/lib/External/isl/isl_test.c
The file was modifiedpolly/lib/External/isl/include/isl/list.h
The file was modifiedpolly/lib/External/isl/isl_equalities.h
The file was modifiedpolly/lib/External/isl/isl_sample.c
The file was modifiedpolly/lib/External/isl/isl_tab.h
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The file was modifiedpolly/lib/External/isl/isl_mat.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/logopar.c
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The file was modifiedpolly/lib/External/isl/test_inputs/codegen/component3.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/wak3-1.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/omega/fc1-2.c
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The file was modifiedpolly/lib/External/isl/isl_factorization.h
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/forwardsub-3-1-2.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/dot.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/ex1.c
The file was modifiedpolly/lib/External/isl/isl_ast_build_expr.c
The file was modifiedpolly/lib/External/isl/isl_mat_private.h
The file was modifiedpolly/lib/External/isl/polyhedron_minimize.c
The file was addedpolly/lib/External/isl/isl_opt_mpa_templ.c
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/forwardsub-1-1-2.c
The file was modifiedpolly/lib/External/isl/interface/extract_interface.cc
The file was modifiedpolly/lib/External/isl/interface/Makefile.in
The file was modifiedpolly/lib/External/isl/test_inputs/codegen/cloog/reservoir-pingali2.c
Commit c1bc4fb95e37ade1256da8ea8db1030ae84705bd by Jonas Devlieghere
[lldb] Simplify CMake logic with LLVM's append_if function

Use the append_if CMake function from HandleLLVMOptions. Since we
include this file in LLDBStandalone it should work in both for in-tree
and out-of-tree builds.
The file was modifiedlldb/cmake/modules/LLDBConfig.cmake
Commit e0b220d22eed75b2a2a783ac45b832e961e77a9e by Jonas Devlieghere
[lldb] Remove redundant call to FindBacktrace (NFC)

We're not using any of the Backtrace_* CMake variables set by
FindBacktrace in LLDB.
The file was modifiedlldb/cmake/modules/LLDBConfig.cmake
Commit 6ad3de350c462399a02adccab7fc70de8ecd6224 by Jonas Devlieghere
[lldb] Fix a new -Wdocumetnation issues (NFC)
The file was modifiedlldb/source/Plugins/TypeSystem/Clang/TypeSystemClang.h
The file was modifiedlldb/include/lldb/Target/Process.h
Commit 927da43ade12fffc8077c248e0243711071b2094 by joker.eph
Allow multiple calls to InitLLVM() (NFC)

In e99dee82b0, the "out_of_memory_new_handler" was changed to be
explicitly initialized instead of relying on a global static
constructor.
However before this change, install_out_of_memory_new_handler could be
called multiple times while it asserts right now.
We can be more tolerant to calling multiple time InitLLVM without
reintroducing a global constructor for this handler.

Differential Revision: https://reviews.llvm.org/D86330
The file was modifiedllvm/lib/Support/ErrorHandling.cpp
Commit df9a9bb7beb7bc04ca4188fe0e527baac2900ff1 by craig.topper
[X86] Correct the implementation of the testFeature macro in getIntelProcessorTypeAndSubtype to do a proper bit test.

Instead of ANDing with a one hot mask representing the bit to
be tested, we were ANDing with just the bit number. This tests
multiple bits none of them the correct one.

This caused skylake-avx512, cascadelake and cooperlake to all
be misdetected. Based on experiments with the Intel SDE, it seems
that all of these CPUs are being detected as being cooperlake.
This is bad since its the newest CPU of the 3.
The file was modifiedcompiler-rt/lib/builtins/cpu_model.c
Commit 91039784b3c9757c35e348d4e0700c90adb1a7e7 by qiucofan
[PowerPC] Add readflm/setflm intrinsics to Clang

Commit dbcfbffc adds ppc.readflm and ppc.setflm intrinsics to read or
write FPSCR register. This patch adds them to Clang.

Reviewed By: steven.zhang

Differential Revision: https://reviews.llvm.org/D85874
The file was modifiedclang/test/CodeGen/builtins-ppc.c
The file was modifiedllvm/include/llvm/IR/IntrinsicsPowerPC.td
The file was modifiedclang/include/clang/Basic/BuiltinsPPC.def
Commit 2b69efded0dc95ffbbdb39d109d38fbb8f0d6390 by david.green
[ARM][LV] Add a preferPredicatedReductionSelect target hook

As part of D84741, this adds a target hook for the
preferPredicatedReductionSelect option and makes use
of it under MVE, allowing us to tail predicate most
reduction loops.

Differential Revision: https://reviews.llvm.org/D85980
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.h
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/lib/Analysis/TargetTransformInfo.cpp
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/mve-reduction-predselect.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/tail-folding-not-allowed.ll
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfoImpl.h
The file was modifiedllvm/test/Transforms/LoopVectorize/ARM/tail-folding-allowed.ll
Commit acf0bb41e45c50c0f4e7310038d85101d4c1ef37 by sam.parker
[ARM][CostModel] Select instruction costs.

Modify the ARM getCmpSelInstrCost implementation for the code size
costs of selects. Now consider the legalization cost and increase
the cost of i1 because those values wouldn't live in a general purpose
register. We also make selects +1 more expensive to account for the IT
instruction.

Differential Revision: https://reviews.llvm.org/D82091
The file was modifiedllvm/test/Analysis/CostModel/ARM/select.ll
The file was modifiedllvm/lib/Target/ARM/ARMTargetTransformInfo.cpp
The file was modifiedllvm/test/Analysis/CostModel/ARM/immediates.ll
Commit 85c15f17cc684b35cdb4a5f3a76d45160de7b597 by ecaldas
[SyntaxTree] Add support for `this`

Differential Revision: https://reviews.llvm.org/D86298
The file was modifiedclang/include/clang/Tooling/Syntax/Nodes.h
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
The file was modifiedclang/lib/Tooling/Syntax/BuildTree.cpp
The file was modifiedclang/lib/Tooling/Syntax/Nodes.cpp
Commit a0e92ffd0d663a6f1c39239847d15c0d65d2c3d6 by flo
[DSE,MemorySSA] Split off partial tracking from isOverwite.

When traversing memory uses to look for aliasing reads/writes, we only
care about complete overwrites. This patch splits off the partial
overwrite tracking from isOverwrite This avoids some unnecessary work
when checking for read/write clobbers with MemorySSA-DSE.
isOverwrite, which skips the partial overwrite tracking.

This gives a relatively small improvement
http://llvm-compile-time-tracker.com/compare.php?from=ef2a2f77f87553a0a4a39f518eb9ac86b756bda6&to=658f3905dd96d3415f3782adc712c79fa59a4665&stat=instructions

This is part of the patches to bring down compile-time to the level
referenced in
http://lists.llvm.org/pipermail/llvm-dev/2020-August/144417.html

Reviewed By: asbirlea

Differential Revision: https://reviews.llvm.org/D86280
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
Commit 80e9dd08784fc4f28bb04a8e9c0639d433a94d08 by grimar
[llvm-readobj] - Change how we create DynRegionInfo objects. NFCI.

Currently we have `checkDRI` and two `createDRIFrom` methods which
are used to create `DynRegionInfo` objects.

And we have an issue: constructions like:
`ObjF->getELFFile()->base() + P->p_offset`
that are used in `createDRIFrom` functions might overflow.

I had to revert `D85519` which triggered such UBSan failure.

This NFC, simplifies and generalizes how we create `DynRegionInfo` objects.
It will allow us to introduce more/better validation checks in a single place.
It also will allow to change `createDRI` to return `Expected<>` so
that we will be able to stop using the `reportError`, which
is used inside currently, and have a warning instead.

Differential revision: https://reviews.llvm.org/D86297
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit e1cd7cac8a36608616d515b64d12f2e86643970d by Raphael Isemann
[lldb] Tab completion for process load/unload

1. Complete `process load` with the common disk file completion, so there is not test provided for it;
2. Complete `process unload` with the tokens of valid loaded images.

Thanks for Raphael's help on the test for `process unload`.

Reviewed By: teemperor

Differential Revision: https://reviews.llvm.org/D79887
The file was modifiedlldb/test/API/functionalities/completion/TestCompletion.py
The file was modifiedlldb/test/API/functionalities/completion/Makefile
The file was modifiedlldb/source/Commands/CommandObjectProcess.cpp
The file was modifiedlldb/include/lldb/Target/Process.h
The file was addedlldb/test/API/functionalities/completion/shared.cpp
Commit 47251582f5c2ac5962f52bc6ddd3d612c56ab83d by sam.parker
[SimplifyCFG] Cost required selects

Before we speculatively execute a basic block, query the cost of
inserting the necessary select instructions against the phi folding
threshold. For non-trivial insertions, a more accurate decision can
probably be made during machine if-conversion. With minsize we query
the CodeSize cost, otherwise we use SizeAndLatency.

Differential Revision: https://reviews.llvm.org/D82438
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
The file was modifiedllvm/test/Transforms/SimplifyCFG/ARM/select-costs.ll
Commit 33bb80bc7a6e67be90cf9b5e8d0f679e5e3acbaf by llvm-dev
[X86] ia32intrin.h - pull out common attributes into defines. NFCI.

Matches what we do in most other x86 headers
The file was modifiedclang/lib/Headers/ia32intrin.h
Commit 18bc400f97a64a23c8ce97873a0c4d958faf0f95 by yrouban
[NewPM][PassInstrumentation] Add PreservedAnalyses parameter to AfterPass* callbacks

Both AfterPass and AfterPassInvalidated pass instrumentation
callbacks get additional parameter of type PreservedAnalyses.
This patch was created by @fedor.sergeev. I have just slightly
changed it.

Reviewers: fedor.sergeev

Differential Revision: https://reviews.llvm.org/D81555
The file was modifiedllvm/include/llvm/Transforms/Scalar/LoopPassManager.h
The file was modifiedllvm/lib/Transforms/Scalar/LoopPassManager.cpp
The file was modifiedllvm/unittests/IR/TimePassesTest.cpp
The file was modifiedllvm/lib/IR/PassTimingInfo.cpp
The file was modifiedllvm/include/llvm/Analysis/CGSCCPassManager.h
The file was modifiedllvm/include/llvm/IR/PassInstrumentation.h
The file was modifiedllvm/include/llvm/IR/PassManager.h
The file was modifiedllvm/lib/Passes/StandardInstrumentations.cpp
The file was modifiedllvm/lib/Analysis/CGSCCPassManager.cpp
The file was modifiedllvm/unittests/IR/PassBuilderCallbacksTest.cpp
The file was modifiedllvm/lib/CodeGen/MachinePassManager.cpp
Commit 90e0a0212916483c08f298e11a92d0bb026a37f1 by sstipanovic
[Attributor][NFC] run update_test_checks with --check-attributes.
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/X86/attributes.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/X86/thiscall.ll
The file was modifiedllvm/test/Transforms/Attributor/ArgumentPromotion/X86/min-legal-vector-width.ll
Commit 98de0d22f5774bf463cb56555dd3c96ac8ef6dcb by jay.foad
[AMDGPU] Apply llvm-prefer-register-over-unsigned from clang-tidy
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.h
The file was modifiedllvm/lib/Target/AMDGPU/R600ISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUMachineCFGStructurizer.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIFixSGPRCopies.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerControlFlow.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SILowerI1Copies.cpp
Commit f7e4e87df34fe140020180a0ea8f7bde14b3a62f by flo
[DSE,MemorySSA] Regenerate check lines for atomic.ll tests.
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/atomic.ll
Commit c6863a4ab8b96ba4b878cb2da7e101bc6bcfaeef by llvm-dev
[X86] Enable constexpr on POPCNT intrinsics (PR31446)

Followup to D86229, this enables constexpr on the alternative (which fallback to generic code) POPCNT intrinsics defined in ia32intrin.h
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/test/CodeGen/popcnt-builtins.c
The file was modifiedclang/lib/Headers/ia32intrin.h
Commit 0819a6416fd217413a1d04e93531db1b30272e9b by jay.foad
[SelectionDAG] Better legalization for FSHL and FSHR

In SelectionDAGBuilder always translate the fshl and fshr intrinsics to
FSHL and FSHR (or ROTL and ROTR) instead of lowering them to shifts and
ORs. Improve the legalization of FSHL and FSHR to avoid code quality
regressions.

Differential Revision: https://reviews.llvm.org/D77152
The file was modifiedllvm/test/CodeGen/AArch64/funnel-shift.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-256.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfoB.td
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-512.ll
The file was modifiedllvm/test/CodeGen/AArch64/shift-by-signext.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbt.ll
The file was modifiedllvm/test/CodeGen/AArch64/funnel-shift-rot.ll
The file was modifiedllvm/test/CodeGen/PowerPC/funnel-shift-rot.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-256.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
The file was modifiedllvm/test/CodeGen/X86/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-512.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fshl.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbbp.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fshr.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-512.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/LegalizeTypes.h
The file was modifiedllvm/test/CodeGen/X86/fshl.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv64Zbt.ll
The file was modifiedllvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
The file was modifiedllvm/test/CodeGen/PowerPC/funnel-shift.ll
The file was modifiedllvm/test/CodeGen/RISCV/rv32Zbbp.ll
The file was modifiedllvm/test/CodeGen/X86/fshr.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-256.ll
Commit 5d7c5a5e9976854a50830f23445bacff87323fa3 by lebedev.ri
[NFC] Port InstCount pass to new pass manager
The file was modifiedllvm/lib/Passes/PassRegistry.def
The file was modifiedllvm/include/llvm/InitializePasses.h
The file was modifiedllvm/lib/Analysis/Analysis.cpp
The file was modifiedllvm/lib/Passes/PassBuilder.cpp
The file was addedllvm/include/llvm/Analysis/InstCount.h
The file was modifiedllvm/lib/Analysis/InstCount.cpp
Commit 9f7350672e3bd80a57a1296e1b6ecd41928ca0c6 by flo
[DSE,MemorySSA] Handle atomicrmw/cmpxchg conservatively.

This adds conservative handling of AtomicRMW/AtomicCmpXChg to
isDSEBarrier, similar to atomic loads and stores.
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp
The file was modifiedllvm/test/Transforms/DeadStoreElimination/MSSA/atomic.ll
Commit c8e6bf0a65fdbda7a611e8047e2a644777f15b24 by llvm-dev
[X86] Enable constexpr on BSWAP intrinsics (PR31446)

This enables constexpr BSWAP intrinsics defined in ia32intrin.h
The file was modifiedclang/test/CodeGen/x86-bswap.c
The file was modifiedclang/lib/Headers/ia32intrin.h
The file was modifiedclang/docs/ReleaseNotes.rst
Commit c66b82f14cc70ec063afa443525051c94621839b by grimar
[llvm-readelf] - Start recognizing 'PT_OPENBSD_*' segment types.

Its a follow-up for D85830, it stops ignoring 'PT_OPENBSD_*' segment types.
Now them are recognized properly.

Note: GNU readelf does not recognize them, though perhaps it shouldn't.
Anyways, it was reported to binutils: https://sourceware.org/bugzilla/show_bug.cgi?id=26405#c0

Differential revision: https://reviews.llvm.org/D86208
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
The file was modifiedllvm/test/tools/llvm-readobj/ELF/program-headers.test
Commit 5bd1febe214f166b93d95ca3007bcb9318c3ae79 by Mirko.Brkusanin
[AMDGPU] Fix alignment requirements for 96bit and 128bit local loads and stores

Adjust alignment requirements for ds_read/write_b96/b128.
GFX9 and onwards allow misaligned access for reads and writes but only if
SH_MEM_CONFIG.alignment_mode allows it.
UnalignedDSAccess is set on GCN subtargets from GFX9 onward to let us know if we
can relax alignment requirements.
UnalignedAccessMode acts similary to UnalignedBufferAccess for DS instructions
but only from GFX9 onward and is supposed to match alignment_mode. By default
alignment of 4 is required.

Differential Revision: https://reviews.llvm.org/D82788
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_write2.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-load-local.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/ds-combine-with-dependence.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
Commit f5cd7ec9f3fc969ff5e1feed961996844333de3b by Mirko.Brkusanin
[AMDGPU] Reorganize GCN subtarget features for unaligned access

Features UnalignedBufferAccess and UnalignedDSAccess are now used to determine
whether hardware supports such access.
UnalignedAccessMode should be used to enable them.
hasUnalignedBufferAccessEnabled() and hasUnalignedDSAccessEnabled() can be
now used to quickly check both.

Differential Revision: https://reviews.llvm.org/D84522
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
Commit d17ea67b92f6611a169dbd4a1399664078283648 by Mirko.Brkusanin
[AMDGPU][GlobalISel] Fix 96 and 128 local loads and stores

Fix local ds_read/write_b96/b128 so they can be selected if the alignment
allows. Otherwise, either pick appropriate ds_read2/write2 instructions or break
them down.

Differential Revision: https://reviews.llvm.org/D81638
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was modifiedllvm/lib/Target/AMDGPU/DSInstructions.td
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructions.td
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInstrInfo.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-load-local-128.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUGISel.td
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
Commit 0654ff703d4e99423133165db63083b831efb9b6 by Mirko.Brkusanin
[AMDGPU] Use ds_read/write_b96/b128 when possible for SDag

Do not break down local loads and stores so ds_read/write_b96/b128 in
ISelLowering can be selected on subtargets that support them and if align
requirements allow them.

Differential Revision: https://reviews.llvm.org/D84403
The file was modifiedllvm/test/CodeGen/AMDGPU/insert-subvector-unused-scratch.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local-i8.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local-i32.ll
The file was addedllvm/test/CodeGen/AMDGPU/load-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local-f32.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_read2.ll
The file was addedllvm/test/CodeGen/AMDGPU/store-local.128.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was addedllvm/test/CodeGen/AMDGPU/store-local.96.ll
The file was addedllvm/test/CodeGen/AMDGPU/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ds_write2.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-local.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-misaligned-bug.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local-i16.ll
Commit 9e6c09c0d995721eff6366d9af2f8ab1c203bf61 by lewis-revill
[RISCV] Fix inaccurate annotations on PseudoBRIND

PseudoBRIND had seemingly inherited incorrect annotations denoting it as
a call instruction and that it defines X1/ra. This caused excess
save/restore code to be emitted for ra.

Differential Revision: https://reviews.llvm.org/D86286
The file was modifiedllvm/lib/Target/RISCV/RISCVInstrInfo.td
The file was modifiedllvm/test/CodeGen/RISCV/codemodel-lowering.ll
The file was modifiedllvm/test/CodeGen/RISCV/blockaddress.ll
The file was modifiedllvm/test/CodeGen/RISCV/indirectbr.ll
Commit 9ffc412e1afba9e4853c94669d26c9ba0707096c by llvm-dev
[X86] Enable constexpr on BITSCAN intrinsics (PR31446)

This enables constexpr BSF/BSR intrinsics defined in ia32intrin.h
The file was modifiedclang/docs/ReleaseNotes.rst
The file was modifiedclang/test/CodeGen/bitscan-builtins.c
The file was modifiedclang/lib/Headers/ia32intrin.h
Commit 1dd85e9d0e0d655f42f6c3072bae9b8195906e36 by sam.parker
[NFC] Add SimplifyCFG for ARM

Add some phi elimination threshold testing.
The file was addedllvm/test/Transforms/SimplifyCFG/ARM/phi-eliminate.ll
Commit f5643dc3dce201a5c9b43cb68370bdbb4254495a by Xing
Recommit: [DWARFYAML] Add support for referencing different abbrev tables.

The original commit (7ff0ace96db9164dcde232c36cab6519ea4fce8) was causing
build failure and was reverted in 6d242a73264ef1e3e128547f00e0fe2d20d3ada0

==================== Original Commit Message ====================
This patch adds support for referencing different abbrev tables. We use
'ID' to distinguish abbrev tables and use 'AbbrevTableID' to explicitly
assign an abbrev table to compilation units.

The syntax is:
```
debug_abbrev:
  - ID: 0
    Table:
      ...
  - ID: 1
    Table:
      ...
debug_info:
  - ...
    AbbrevTableID: 1 ## Reference the second abbrev table.
  - ...
    AbbrevTableID: 0 ## Reference the first abbrev table.
```

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D83116
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_info.yaml
The file was modifiedllvm/include/llvm/ObjectYAML/DWARFYAML.h
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF-debug_abbrev.yaml
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-info.yaml
The file was modifiedllvm/lib/ObjectYAML/DWARFYAML.cpp
The file was modifiedllvm/tools/obj2yaml/dwarf2yaml.cpp
The file was modifiedllvm/unittests/DebugInfo/DWARF/DWARFDebugInfoTest.cpp
The file was modifiedllvm/test/tools/yaml2obj/ELF/DWARF/debug-abbrev.yaml
The file was modifiedllvm/lib/ObjectYAML/DWARFEmitter.cpp
The file was modifiedllvm/test/ObjectYAML/MachO/DWARF5-debug_info.yaml
Commit b4889353207aefd6f2641cef0301f78838c5b52e by adamcz
[clangd] Discard diagnostics from another SourceManager.

This can happen when building implicit modules, as demonstrated in test.
The CompilerInstance uses the same StoredDiags, but different
SourceManager. This used to crash clangd when it tried to relocate the
diagnostic to the main file, which, according to SourceManager from the
diagnostic, is a fake <module-includes> file.

Differential Revision: https://reviews.llvm.org/D85753
The file was modifiedclang-tools-extra/clangd/unittests/ModulesTests.cpp
The file was modifiedclang-tools-extra/clangd/Diagnostics.h
The file was modifiedclang-tools-extra/clangd/Diagnostics.cpp
Commit 3f7985e6ec21c21eb6d6cdd05ab206d0bcf2a770 by dmitry.preobrazhensky
[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.

Summary of changes:
- added description of MTBUF instructions and format modifier;
- described limitations of f16 inline constants when used with integer operands;
- updated description of gfx9+ flat global addressing modes;
- v_accvgpr_write_b32 src0 corrections (gfx908);
- minor bugfixing and improvements.
The file was modifiedllvm/docs/AMDGPU/gfx9_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_mod_sdwa_sext.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_opt.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_opt.rst
The file was addedllvm/docs/AMDGPU/gfx7_dst_buf_32.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_param.rst
The file was addedllvm/docs/AMDGPU/gfx908_src32_4.rst
The file was addedllvm/docs/AMDGPU/gfx8_dst_buf_32.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_mod_vop3_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_mod_sdwa_sext.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_mod_sdwa_sext.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_bimm32.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_hwreg.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_mod_dpp_sdwa_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/AMDGPUAsmGFX10.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_mod_vop3_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_src32_3.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_sdst64_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_label.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_mod.rst
The file was addedllvm/docs/AMDGPU/gfx9_src32_4.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_uimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_src32_1.rst
The file was addedllvm/docs/AMDGPU/gfx10_src32_4.rst
The file was modifiedllvm/docs/AMDGPUInstructionNotation.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_attr.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_bimm16.rst
The file was addedllvm/docs/AMDGPU/gfx9_src32_6.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_param.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_mod_vop3_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_simm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_mod_dpp_sdwa_abs_neg.rst
The file was addedllvm/docs/AMDGPU/gfx9_src32_5.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_bimm32.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_simm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_src32_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_ret.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_bimm16.rst
The file was addedllvm/docs/AMDGPU/gfx8_src32_7.rst
The file was modifiedllvm/docs/AMDGPU/AMDGPUAsmGFX908.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_attr.rst
The file was modifiedllvm/docs/AMDGPU/gfx904_mod_vop3_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_src32_0.rst
The file was addedllvm/docs/AMDGPU/gfx1011_src32_3.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_mod_sdwa_sext.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_sdata64_0.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_attr.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_fimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_imask.rst
The file was modifiedllvm/docs/AMDGPU/gfx904_src32_0.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_perm_smem.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_offset_buf.rst
The file was modifiedllvm/docs/AMDGPU/AMDGPUAsmGFX7.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_bimm32.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_waitcnt.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_simm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_fimm32.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_label.rst
The file was modifiedllvm/docs/AMDGPU/AMDGPUAsmGFX8.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_addr_mimg.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_bimm16.rst
The file was addedllvm/docs/AMDGPU/gfx10_src32_6.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_mod_vop3_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_label.rst
The file was modifiedllvm/docs/AMDGPUModifierSyntax.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_data_smem_atomic64.rst
The file was addedllvm/docs/AMDGPU/gfx10_src32_5.rst
The file was modifiedllvm/docs/AMDGPU/gfx900_mad_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/AMDGPUAsmGFX1011.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_label.rst
The file was addedllvm/docs/AMDGPU/gfx908_src32_5.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_opt.rst
The file was modifiedllvm/docs/AMDGPU/gfx900_src32_0.rst
The file was modifiedllvm/docs/AMDGPU/AMDGPUAsmGFX9.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_mod_sdwa_sext.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_perm_smem.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_vaddr_flat_global.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_src32_2.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_hwreg.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_tgt.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_fimm32.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_param.rst
The file was addedllvm/docs/AMDGPU/gfx1011_src32_2.rst
The file was addedllvm/docs/AMDGPU/gfx8_src32_5.rst
The file was addedllvm/docs/AMDGPU/gfx9_src32_7.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_tgt.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_saddr_flat_global.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_src32_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_mad_type_dev.rst
The file was addedllvm/docs/AMDGPU/gfx8_src32_6.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_src32_3.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_src32_0.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_src32_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_src32_2.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_waitcnt.rst
The file was addedllvm/docs/AMDGPU/gfx906_src32_4.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_src32_3.rst
The file was addedllvm/docs/AMDGPU/gfx906_src32_3.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_opt.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_simm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_ret.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_uimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_sdst64_0.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_mod_vop3_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_uimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_waitcnt.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_perm_smem.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_src32_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_uimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_fimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_imask.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_waitcnt.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_bimm32.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_ret.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_mad_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_ret.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_mod_dpp_sdwa_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_fimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_opt.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_vaddr_flat_global.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_mad_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_mod_dpp_sdwa_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_ret.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_bimm16.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_fimm32.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_ssrc64_0.rst
The file was modifiedllvm/docs/AMDGPU/gfx900_src32_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_src32_3.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_tgt.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_fimm32.rst
The file was modifiedllvm/docs/AMDGPUOperandSyntax.rst
The file was modifiedllvm/docs/AMDGPU/gfx906_src32_2.rst
The file was addedllvm/docs/AMDGPU/gfx8_src32_4.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_mod_dpp_sdwa_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx900_mod_vop3_abs_neg.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_vcc_32.rst
The file was modifiedllvm/docs/AMDGPU/AMDGPUAsmGFX906.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_ssrc64_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_param.rst
The file was modifiedllvm/docs/AMDGPU/gfx904_mad_type_dev.rst
The file was modifiedllvm/docs/AMDGPU/gfx10_src32_2.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_attr.rst
The file was modifiedllvm/docs/AMDGPU/gfx9_vaddr_flat_global.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_tgt.rst
The file was modifiedllvm/docs/AMDGPUInstructionSyntax.rst
The file was modifiedllvm/docs/AMDGPU/gfx7_hwreg.rst
The file was modifiedllvm/docs/AMDGPU/gfx904_src32_1.rst
The file was modifiedllvm/docs/AMDGPU/gfx908_src32_2.rst
The file was modifiedllvm/docs/AMDGPU/gfx8_hwreg.rst
Commit 519b0e3e9d6db21922d9a59c467d8b8709323a40 by nemanja.i.ibm
[PowerPC] Pre-commit FISel with PC-Rel test

Our handling of PC-Relative addressing is currently broken with
Fast ISel in 3 ways:
- FISel emits calls without handling all the PC-Rel intricacies
- FISel materializes FP constants through the TOC
- FISel materializes GV's through the TOC

As it would be unnecessarily tedious to implement all the handling
for PC-Rel in Fast ISel, we will turn off FISel for anything that
generates references to the TOC.
The file was addedllvm/test/CodeGen/PowerPC/fast-isel-pcrel.ll
Commit aa456a6df4931541c6aaf0e60a77cc646b5ad4c4 by grimar
[llvm-readobj/elf] - Refine the code for broken PT_DYNAMIC segment diagnostic.

The code that reports "PT_DYNAMIC segment offset + size exceeds the size of the file"
has an issue: it is possible to bypass the validation by overflowing the size + offset result.

Differential revision: https://reviews.llvm.org/D85519
The file was modifiedllvm/test/tools/llvm-readobj/ELF/malformed-pt-dynamic.test
The file was modifiedllvm/tools/llvm-readobj/ELFDumper.cpp
Commit 57903cf09335cd687e9fcfad4af7a9ef4bc84a95 by luismarques
[compiler-rt][RISCV] Use muldi3 builtin assembly implementation

D80465 added an assembly implementation of muldi3 for RISC-V but it didn't
add it to the cmake `*_SOURCES` list, so the C implementation was being used
instead. This patch fixes that.

Differential Revision: https://reviews.llvm.org/D86036
The file was modifiedcompiler-rt/lib/builtins/CMakeLists.txt
Commit 88dd7c85497a104ab7e3e52e41fe61be7175d8a9 by grimar
[llvm-readelf][test] - Refine the merged.test

The testing in merged.test is not ideal.
It uses the following set of flags: `-aeWhSrnudlVgIs`
and the precompiled object `trivial.obj.elf-i386`.

In fact, this object, for example, does not contain versioning stuff,
so specifying `-V` does not make much sense for it, so it is not really tested.
Also, we want to avoid using of precompiled objects, ideally we
want to use a YAML that triggers an output for each of the short options in use:

```
-a: --all
-e: --headers
-W: --wide
-h: --file-headers, --file-header
-S: --section-headers, --sections
-r: --relocations
-n: --notes
-u: --unwind
-d: --dynamic-table
-l: --program-headers
-V: --version-info
-g: --elf-section-groups
-I: --elf-hash-histogram
-s: --symbols
```

Note that, for example, we do not need to have groups to test `-g`, because for a
object with no groups llvm-readelf still prints "There are no section groups in this file.",
but that is not always the case. E.g. for `-d` we don't print anything when we have
no dynamic table, so we have to describe it in a YAML to test `-d` properly.

Also, we probably want to test cases with and without `-a`(-all) option separately
to be sure that we handle all options and not only the first one in the sequence.

Differential revision: https://reviews.llvm.org/D86283
The file was modifiedllvm/test/tools/llvm-readobj/ELF/merged.test
Commit bfc6d8b59b7b3f736f43ba16666c1f7ed9c780e4 by sam.parker
[NFC][SimplifyCFG] Formatting and variable rename
The file was modifiedllvm/lib/Transforms/Utils/SimplifyCFG.cpp
Commit 88818491b9dea64ec65c92ce5652bc45bef337a4 by flo
[LoopIdiom,LSR] Add additional tests for SCEVExpander cleanups.
The file was addedllvm/test/Transforms/LoopIdiom/expander-do-not-delete-reused-values.ll
The file was addedllvm/test/Transforms/LoopStrengthReduce/X86/expander-reused-value-insert-point.ll
Commit a4c3ed42ba5625af54254584d762ebf96cc06942 by Raphael Isemann
Correctly emit dwoIDs after ASTFileSignature refactoring (D81347)

D81347 changes the ASTFileSignature to be an array of 20 uint8_t instead of 5
uint32_t. However, it didn't update the code in ObjectFilePCHContainerOperations
that creates the dwoID in the module from the ASTFileSignature
(`Buffer->Signature` being the array subclass that is now `std::array<uint8_t,
20>` instead of `std::array<uint32_t, 5>`).

```
  uint64_t Signature = [..] (uint64_t)Buffer->Signature[1] << 32 | Buffer->Signature[0]
```

This code works with the old ASTFileSignature (where two uint32_t are enough to
fill the uint64_t), but after the patch this only took two bytes from the
ASTFileSignature and only partly filled the Signature uint64_t.

This caused that the dwoID in the module ref and the dwoID in the actual module
no longer match (which in turns causes that LLDB keeps warning about the dwoID's
not matching when debugging -gmodules-compiled binaries).

This patch just unifies the logic for turning the ASTFileSignature into an
uint64_t which makes the dwoID match again (and should prevent issues like that
in the future).

Reviewed By: aprantl, dang

Differential Revision: https://reviews.llvm.org/D84013
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was addedclang/test/Modules/Inputs/DebugDwoId.h
The file was modifiedclang/include/clang/Basic/Module.h
The file was modifiedclang/lib/CodeGen/ObjectFilePCHContainerOperations.cpp
The file was addedclang/test/Modules/ModuleDebugInfoDwoId.cpp
The file was modifiedclang/test/Modules/Inputs/module.map
Commit 466590192b4202ceb294eb82f881193d013dc90c by hokein.wu
[AST][RecoveryExpr] Fix a bogus unused diagnostic when the type is preserved.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D85716
The file was modifiedclang/lib/AST/Expr.cpp
The file was modifiedclang/test/SemaCXX/recovery-expr-type.cpp
Commit 36dbb8fc972f841a42eea41c0a8523140afbf2a5 by mcinally
[SVE] Lower fixed length UDIV to scalable

Pretty much just a copy of the SDIV patches (D86114 and D85982) with string replacement.

Differential Revision: https://reviews.llvm.org/D86316
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/AArch64/sve-fixed-length-int-div.ll
Commit 8eded24bf46c05ffd110d521f58320cdee93866e by flo
Recommit "[SCEVExpander] Add helper to clean up instrs inserted while expanding."

Recommit the patch after fixing an issue reported caused by the fact
that re-used values are also added to InsertedValues.

Additional tests have been added in 88818491b9dea64ec65c92ce5652bc45bef337a4

This reverts the revert commit 38884641f28e373ce291dc5ea93416756216e536.
The file was modifiedllvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp
The file was modifiedllvm/include/llvm/Transforms/Utils/ScalarEvolutionExpander.h
The file was modifiedllvm/lib/Transforms/Scalar/LoopIdiomRecognize.cpp
Commit c1dd5df4255cd870e96a59e73163b22d85fbaba3 by Raphael Isemann
Revert "Correctly emit dwoIDs after ASTFileSignature refactoring (D81347)"

This reverts commit a4c3ed42ba5625af54254584d762ebf96cc06942.

The test is curiously failing with a plain exit code 1 on Fuchsia.
The file was removedclang/test/Modules/ModuleDebugInfoDwoId.cpp
The file was modifiedclang/include/clang/Basic/Module.h
The file was modifiedclang/lib/CodeGen/ObjectFilePCHContainerOperations.cpp
The file was modifiedclang/lib/CodeGen/CGDebugInfo.cpp
The file was modifiedclang/test/Modules/Inputs/module.map
The file was removedclang/test/Modules/Inputs/DebugDwoId.h
Commit 1beb11c61ae4b0130cb87ed56b9e010ef6a06691 by ecaldas
[SyntaxTree] Use annotations in Statement tests

Differential Revision: https://reviews.llvm.org/D86345
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit a0818689213234d5a078641432d10eccccf61a13 by diggerlin
[AIX][XCOFF] emit symbol visibility for xcoff object file.

SUMMARY:

Reviewers:  Jason liu

Differential Revision: https://reviews.llvm.org/D84265
The file was modifiedllvm/include/llvm/MC/MCSectionXCOFF.h
The file was modifiedllvm/test/CodeGen/PowerPC/aix-xcoff-visibility.ll
The file was modifiedllvm/lib/MC/XCOFFObjectWriter.cpp
Commit 365f861c45bb504c7b61f64943916fc570818cd1 by kamau.bridgeman
[PowerPC][PCRelative] Thread Local Storage Support for Initial Exec

This patch is the initial support for the Intial Exec Thread Local
Local Storage model to produce code sequence and relocations correct
to the ABI for the model when using PC relative memory operations.

Reviewed By: stefanp

Differential Revision: https://reviews.llvm.org/D81947
The file was modifiedllvm/lib/Target/PowerPC/PPCMCInstLower.cpp
The file was addedllvm/test/MC/PowerPC/pcrel-tls-initial-exec-value-load-reloc.s
The file was addedllvm/test/CodeGen/PowerPC/pcrel-tls-initial-exec.ll
The file was modifiedllvm/lib/MC/MCExpr.cpp
The file was modifiedllvm/include/llvm/MC/MCExpr.h
The file was modifiedllvm/include/llvm/BinaryFormat/ELFRelocs/PowerPC64.def
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCELFObjectWriter.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrInfo.cpp
The file was modifiedllvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp
The file was modifiedllvm/lib/Target/PowerPC/AsmParser/PPCAsmParser.cpp
The file was addedllvm/test/MC/PowerPC/pcrel-tls-initial-exec-address-load-reloc.s
The file was modifiedllvm/lib/Target/PowerPC/PPC.h
Commit bc72a3ab949e14b990c080985fc1e74475f1e7d2 by flo
[Constants] Handle FNeg in getWithOperands.

Currently ConstantExpr::getWithOperands does not handle FNeg and
subsequently treats FNeg as binary operator, leading to an assertion
failure or segmentation fault if built without assertions.

Originally I reproduced this with llvm-dis on a bitcode file, which I
unfortunately cannot share and also cannot really reduce.

But PR45426 describes the same issue and has a reproducer with Clang, so
I'll go with that.

Reviewed By: aprantl

Differential Revision: https://reviews.llvm.org/D86274
The file was addedclang/test/CodeGen/constantexpr-fneg.c
The file was modifiedllvm/lib/IR/Constants.cpp
Commit 72d0f094898881e59da37efdfb669392ccd87f63 by thakis
[gn build] Port 57903cf0933 -- https://reviews.llvm.org/rG57903cf0933
The file was modifiedllvm/utils/gn/secondary/compiler-rt/lib/builtins/BUILD.gn
Commit 7a527f17776be78ec44b88e82b39afb65fc148e4 by aaron
Teach AttachPreviousImpl to inherit MSInheritanceAttr attribute

This commit teaches ASTDeclReader::attachPreviousDecl to successfully merge
two Decl's when one contains an inheritable attribute like the
MSInheritanceAttr. Usually, attributes that are needed to be present along the
redeclaration chain are attached during ASTReading from
ASTDeclReader::attachPreviousDecl, but no such thing is done for inheritable
attributes. Currently, only the logic for merging MSInheritanceAttr is
provided.
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was addedclang/test/Modules/Inputs/inherit-attribute/module.modulemap
The file was addedclang/test/Modules/inherit-attribute.cpp
The file was addedclang/test/Modules/Inputs/inherit-attribute/b.h
The file was addedclang/test/Modules/Inputs/inherit-attribute/a.h
The file was addedclang/test/Modules/Inputs/inherit-attribute/c.h
Commit 2799031a14323eee48694a3aa4f56a171a687d00 by Jonas Devlieghere
[lldb] Skip PDB and NativePDB tests with reproducers
The file was addedlldb/test/Shell/SymbolFile/NativePDB/lit.local.cfg
The file was addedlldb/test/Shell/SymbolFile/PDB/lit.local.cfg