FailedChanges

Summary

  1. [llvm][LV] Replace `unsigned VF` with `ElementCount VF` [NFCI] (details)
  2. GlobalISel: Reduce G_SHL width if source is extension (details)
  3. Revert "[llvm][LV] Replace `unsigned VF` with `ElementCount VF` [NFCI]" (details)
  4. AMDGPU/GlobalISel: Start implementing computeKnownBitsForTargetInstr (details)
  5. [llvm][LV] Replace `unsigned VF` with `ElementCount VF` [NFCI] (details)
  6. [OPENMP]Fix PR47158, case 3: allow devic_typein nested declare target region. (details)
  7. AMDGPU/GlobalISel: Add baseline, failing unmerge tests (details)
  8. AMDGPU/GlobalISel: Use different technique for sample v3s16 values (details)
  9. GlobalISel: Improve dead instruction debug printing (details)
  10. [coroutine] should disable inline before calling coro split (details)
  11. [SyntaxTree] Split array declarator tests (details)
  12. [SyntaxTree] Use annotations to reduce noise on member function tests (details)
  13. [SyntaxTree] Split FreeStandingClass tests (details)
  14. [SyntaxTree] Split ExplicitTemplateInstantiation test (details)
  15. [SyntaxTree] Group tests related to `using` (details)
  16. [SyntaxTree] Split `ParametersAndQualifiers` tests (details)
  17. [SyntaxTree] Split `DynamicExceptionSpecification` test (details)
  18. [PowerPC] Add clang options to control MMA support (details)
  19. Test all CHECK-NOT in a block even if one fails (details)
  20. [libFuzzer] Make msan.test:SimpleCmpTest succeed with less trials. (details)
  21. [OpenMP] Check if _MSC_VER is defined before using it (details)
  22. AMDGPU/GlobalISel: Use unmerge instead of extract in addrspace queries (details)
  23. [clang][NFC] Fix a GCC warning in ASTImporterTest.cpp (details)
  24. [DSE,MemorySSA] Do not use callCapturesBefore in isReadClobber. (details)
Commit c8d2b065b98fa91139cc7bb1fd1407f032ef252e by francesco.petrogalli
[llvm][LV] Replace `unsigned VF` with `ElementCount VF` [NFCI]

Changes:

* Change `ToVectorTy` to deal directly with `ElementCount` instances.
* `VF == 1` replaced with `VF.isScalar()`.
* `VF > 1` and `VF >=2` replaced with `VF.isVector()`.
* `VF <=1` is replaced with `VF.isZero() || VF.isScalar()`.
* Add `<` operator to `ElementCount` to be able to use
`llvm::SmallSetVector<ElementCount, ...>`.
* Bits and pieces around printing the ElementCount to string streams.
* Added a static method to `ElementCount` to represent a scalar.

To guarantee that this change is a NFC, `VF.Min` and asserts are used
in the following places:

1. When it doesn't make sense to deal with the scalable property, for
example:
   a. When computing unrolling factors.
   b. When shuffle masks are built for fixed width vector types
In this cases, an
assert(!VF.Scalable && "<mgs>") has been added to make sure we don't
enter coepaths that don't make sense for scalable vectors.
2. When there is a conscious decision to use `FixedVectorType`. These
uses of `FixedVectorType` will likely be removed in favour of
`VectorType` once the vectorizer is generic enough to deal with both
fixed vector types and scalable vector types.
3. When dealing with building constants out of the value of VF, for
example when computing the vectorization `step`, or building vectors
of indices. These operation _make sense_ for scalable vectors too,
but changing the code in these places to be generic and make it work
for scalable vectors is to be submitted in a separate patch, as it is
a functional change.
4. When building the potential VFs in VPlan. Making the VPlan generic
enough to handle scalable vectorization factors is a functional change
that needs a separate patch. See for example `void
LoopVectorizationPlanner::buildVPlans(unsigned MinVF, unsigned
MaxVF)`.
5. The class `IntrinsicCostAttribute`: this class still uses `unsigned
VF` as updating the field to use `ElementCount` woudl require changes
that could result in changing the behavior of the compiler. Will be done
in a separate patch.
7. When dealing with user input for forcing the vectorization
factor. In this case, adding support for scalable vectorization is a
functional change that migh require changes at command line.

Differential Revision: https://reviews.llvm.org/D85794
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
The file was modifiedllvm/include/llvm/Support/TypeSize.h
The file was modifiedllvm/lib/IR/DiagnosticInfo.cpp
The file was modifiedllvm/include/llvm/IR/DiagnosticInfo.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit e1644a377996565e119aa178f40c567b986a6203 by Matthew.Arsenault
GlobalISel: Reduce G_SHL width if source is extension

shl ([sza]ext x, y) => zext (shl x, y).

Turns expensive 64 bit shifts into 32 bit if it does not overflow the
source type:

This is a port of an AMDGPU DAG combine added in
5fa289f0d8ff85b9e14d2f814a90761378ab54ae. InstCombine does this
already, but we need to do it again here to apply it to shifts
introduced for lowered getelementptrs. This will help matching
addressing modes that use 32-bit offsets in a future patch.

TableGen annoyingly assumes only a single match data operand, so
introduce a reusable struct. However, this still requires defining a
separate GIMatchData for every combine which is still annoying.

Adds a morally equivalent function to the existing
getShiftAmountTy. Without this, we would have to do try to repeatedly
query the legalizer info and guess at what type to use for the shift.
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.postlegal.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/combine-shl-from-extend-narrow.prelegal.mir
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
The file was modifiedllvm/include/llvm/Target/GlobalISel/Combine.td
The file was modifiedllvm/include/llvm/CodeGen/GlobalISel/CombinerHelper.h
The file was modifiedllvm/lib/CodeGen/GlobalISel/CombinerHelper.cpp
The file was modifiedllvm/include/llvm/CodeGen/TargetLowering.h
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
Commit bad7d6b3735d1d855ffb07f32a272049cff085e6 by francesco.petrogalli
Revert "[llvm][LV] Replace `unsigned VF` with `ElementCount VF` [NFCI]"

Reverting because the commit message doesn't reflect the one agreed on
phabricator at https://reviews.llvm.org/D85794.

This reverts commit c8d2b065b98fa91139cc7bb1fd1407f032ef252e.
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/include/llvm/Support/TypeSize.h
The file was modifiedllvm/lib/IR/DiagnosticInfo.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/include/llvm/IR/DiagnosticInfo.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
Commit 70cd9f5b779c04d1b32c790cb289c9f00f548b57 by Matthew.Arsenault
AMDGPU/GlobalISel: Start implementing computeKnownBitsForTargetInstr

Handle workitem intrinsics. There isn't really away to adequately test
this right now, since none of the known bits users are fine grained
enough to test the edge conditions. This triggers a number of
instances of the new 64-bit to 32-bit shift combine in the existing
tests.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.large.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.h
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.fmas.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.dec.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.div.scale.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.update.dpp.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/shl-ext-reduce.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
Commit 5a34b3ab95b5659ef395ffe7b6bd79f2a0423514 by francesco.petrogalli
[llvm][LV] Replace `unsigned VF` with `ElementCount VF` [NFCI]

Changes:

* Change `ToVectorTy` to deal directly with `ElementCount` instances.
* `VF == 1` replaced with `VF.isScalar()`.
* `VF > 1` and `VF >=2` replaced with `VF.isVector()`.
* `VF <=1` is replaced with `VF.isZero() || VF.isScalar()`.
* Replaced the uses of `llvm::SmallSet<ElementCount, ...>` with
   `llvm::SmallSetVector<ElementCount, ...>`. This avoids the need of an
   ordering function for the `ElementCount` class.
* Bits and pieces around printing the `ElementCount` to string streams.

To guarantee that this change is a NFC, `VF.Min` and asserts are used
in the following places:

1. When it doesn't make sense to deal with the scalable property, for
example:
   a. When computing unrolling factors.
   b. When shuffle masks are built for fixed width vector types
In this cases, an
assert(!VF.Scalable && "<mgs>") has been added to make sure we don't
enter coepaths that don't make sense for scalable vectors.
2. When there is a conscious decision to use `FixedVectorType`. These
uses of `FixedVectorType` will likely be removed in favour of
`VectorType` once the vectorizer is generic enough to deal with both
fixed vector types and scalable vector types.
3. When dealing with building constants out of the value of VF, for
example when computing the vectorization `step`, or building vectors
of indices. These operation _make sense_ for scalable vectors too,
but changing the code in these places to be generic and make it work
for scalable vectors is to be submitted in a separate patch, as it is
a functional change.
4. When building the potential VFs in VPlan. Making the VPlan generic
enough to handle scalable vectorization factors is a functional change
that needs a separate patch. See for example `void
LoopVectorizationPlanner::buildVPlans(unsigned MinVF, unsigned
MaxVF)`.
5. The class `IntrinsicCostAttribute`: this class still uses `unsigned
VF` as updating the field to use `ElementCount` woudl require changes
that could result in changing the behavior of the compiler. Will be done
in a separate patch.
7. When dealing with user input for forcing the vectorization
factor. In this case, adding support for scalable vectorization is a
functional change that migh require changes at command line.

Note that in some places the idiom

```
unsigned VF = ...
auto VTy = FixedVectorType::get(ScalarTy, VF)
```

has been replaced with

```
ElementCount VF = ...
assert(!VF.Scalable && ...);
auto VTy = VectorType::get(ScalarTy, VF)
```

The assertion guarantees that the new code is (at least in debug mode)
functionally equivalent to the old version. Notice that this change had been
possible because none of the methods that are specific to `FixedVectorType`
were used after the instantiation of `VTy`.

Reviewed By: rengolin, ctetreau

Differential Revision: https://reviews.llvm.org/D85794
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
The file was modifiedllvm/include/llvm/Analysis/TargetTransformInfo.h
The file was modifiedllvm/lib/IR/DiagnosticInfo.cpp
The file was modifiedllvm/include/llvm/Support/TypeSize.h
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorizationPlanner.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.cpp
The file was modifiedllvm/include/llvm/Analysis/VectorUtils.h
The file was modifiedllvm/include/llvm/IR/DiagnosticInfo.h
Commit bedc841a5098bc0a90bbc66328d7aab4b2c23c4a by a.bataev
[OPENMP]Fix PR47158, case 3: allow devic_typein nested declare target region.

OpenMP 5.0 supports nested declare target regions. So, in general,it is
allow to mark a declarationas declare target with different device_type
or link type. Patch adds support for such kind of nesting.

Differential Revision: https://reviews.llvm.org/D86239
The file was modifiedclang/test/AST/dump.cpp
The file was modifiedclang/lib/AST/AttrImpl.cpp
The file was modifiedclang/test/OpenMP/declare_target_ast_print.cpp
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/include/clang/Sema/Sema.h
The file was modifiedclang/lib/Sema/SemaOpenMP.cpp
The file was modifiedclang/include/clang/Basic/Attr.td
Commit 9b3222d56067502dc5f6139ca7e4c78171439bd4 by Matthew.Arsenault
AMDGPU/GlobalISel: Add baseline, failing unmerge tests
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/artifact-combiner-unmerge-values.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-unmerge-values.mir
Commit bdb25b3ce5479a820a4c6539d22aeedad7e06875 by Matthew.Arsenault
AMDGPU/GlobalISel: Use different technique for sample v3s16 values

Avoid relying on implicit_def values, and odd sized G_INSERT/G_EXTRACT
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmul.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fadd.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fsub.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-intrinsic-round.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-lshr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-uaddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fma.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fminnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fpext.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-phi.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-saddo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sext-inreg.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-fmaxnum.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-xor.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-usubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-and.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ssubo.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-or.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-select.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-shl.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/legalize-ashr.mir
Commit 517caca359e027ba6e88b8531ef072084204cc2d by Matthew.Arsenault
GlobalISel: Improve dead instruction debug printing

This was printing the "Is dead" on a separate line from the
instruction, which was harder to follow.
The file was modifiedllvm/lib/CodeGen/GlobalISel/Legalizer.cpp
Commit 2e43acfed89b1903de473f682c65878bdebc395a by dongaxis
[coroutine] should disable inline before calling coro split
summary:
When callee coroutine function is inlined into caller coroutine
function before coro-split pass, llvm will emits "coroutine should
have exactly one defining @llvm.coro.begin". It seems that coro-early
pass can not handle this quiet well.
So we believe that unsplited coroutine function should not be inlined.
This patch fix such issue by not inlining function if it has attribute
"coroutine.presplit" (it means the function has not been splited) to
fix this issue

TestPlan: check-llvm

Reviewed By: wenlei

Differential Revision: https://reviews.llvm.org/D85812
The file was modifiedllvm/lib/Transforms/IPO/SampleProfile.cpp
The file was addedllvm/test/Transforms/Coroutines/coro-inline.ll
The file was modifiedllvm/include/llvm/Transforms/Coroutines.h
The file was modifiedllvm/lib/Transforms/Coroutines/CoroInternal.h
The file was addedllvm/test/Transforms/Coroutines/Inputs/sample.text.prof
The file was modifiedllvm/lib/Transforms/IPO/AlwaysInliner.cpp
Commit 4e8dd506e66642329dcd530524f43b0d2b528521 by ecaldas
[SyntaxTree] Split array declarator tests

Differential Revision: https://reviews.llvm.org/D86437
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit ed83095254a3e212d14b293a6a0e6c85d1f3331c by ecaldas
[SyntaxTree] Use annotations to reduce noise on member function tests

Differential Revision: https://reviews.llvm.org/D86439
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit b4093d663f8377b3ca3746ff104c83c9c5510c0a by ecaldas
[SyntaxTree] Split FreeStandingClass tests

Differential Revision: https://reviews.llvm.org/D86440
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit a722d6a197c7a4f7a1afb72b4732b8ebe8272628 by ecaldas
[SyntaxTree] Split ExplicitTemplateInstantiation test

Differential Revision: https://reviews.llvm.org/D86441
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 90f85dfc14bc6020486eb2d2c6399f8207ef3625 by ecaldas
[SyntaxTree] Group tests related to `using`

Differential Revision: https://reviews.llvm.org/D86443
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 4baa163c74237b30c5094c1fafd7ed355575bcfa by ecaldas
[SyntaxTree] Split `ParametersAndQualifiers` tests

Differential Revision: https://reviews.llvm.org/D86459
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 235f9f7fe94488904a60a8a1f5430183b0504945 by ecaldas
[SyntaxTree] Split `DynamicExceptionSpecification` test
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 512e256c0d8c0fed5b4603ed5ed74b6ad503f368 by baptiste.saleil
[PowerPC] Add clang options to control MMA support

This patch adds frontend and backend options to enable and disable
the PowerPC MMA operations added in ISA 3.1. Instructions using these
options will be added in subsequent patches.

Differential Revision: https://reviews.llvm.org/D81442
The file was modifiedllvm/lib/Target/PowerPC/PPCScheduleP9.td
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.h
The file was modifiedclang/test/Preprocessor/init-ppc64.c
The file was modifiedclang/lib/Basic/Targets/PPC.h
The file was modifiedllvm/lib/Target/PowerPC/PPC.td
The file was modifiedllvm/test/CodeGen/PowerPC/future-check-features.ll
The file was modifiedclang/test/Driver/ppc-dependent-options.cpp
The file was modifiedclang/include/clang/Driver/Options.td
The file was modifiedclang/lib/Basic/Targets/PPC.cpp
The file was modifiedllvm/lib/Target/PowerPC/PPCSubtarget.cpp
Commit 2c9131665d00c83a13c90db26c4fafaccbc27822 by thomasp
Test all CHECK-NOT in a block even if one fails

This commit makes FileCheck print all CHECK-NOT directive failure in a
CHECK-NOT block even if one fails. Prior to that, it would stop trying
to match CHECK-NOT directive as soon as one in the block fails.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D86315
The file was modifiedllvm/lib/Support/FileCheck.cpp
The file was addedllvm/test/FileCheck/multiple-check-not-failures.txt
Commit 9659b81b2ad8f3b4951ef46e2d90120bdf00fe6f by dokyungs
[libFuzzer] Make msan.test:SimpleCmpTest succeed with less trials.

Currently SimpleCmpTest passes after 9,831,994 trials on x86_64/Linux
when the number of given trials is 10,000,000, just a little bigger than
that. This patch modifies SimpleCmpTest.cpp so that the test passes with less
trials, reducing its chances of future failures as libFuzzer evolves. More
specifically, this patch changes a 32-bit equality check to a 8-bit equality
check, making this test pass at 4,635,303 trials.

Differential Revision: https://reviews.llvm.org/D86382
The file was modifiedcompiler-rt/test/fuzzer/SimpleCmpTest.cpp
Commit d0f4f5a182d7ea91150ae090563bc0095e8ca1b3 by Andrey.Churbanov
[OpenMP] Check if _MSC_VER is defined before using it

Patch by mati865@gmail.com

Differential Revision: https://reviews.llvm.org/D86448
The file was modifiedopenmp/runtime/src/kmp_atomic.h
Commit 62d1fb828f918fef0c139028fed6e81c5ba1fa41 by Matthew.Arsenault
AMDGPU/GlobalISel: Use unmerge instead of extract in addrspace queries

This is a bit more consistent with regular operation legalization.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Commit c9b45ce1fd97531c228e092bedee719b971f82a3 by Raphael Isemann
[clang][NFC] Fix a GCC warning in ASTImporterTest.cpp

Apparently only overriding one of the two CompleteType overloads causes
GCC to emit a warning with -Woverloaded-virtual .
The file was modifiedclang/unittests/AST/ASTImporterTest.cpp
Commit d1a1cce5b130630df0c821e8cafe5f683ccccb90 by flo
[DSE,MemorySSA] Do not use callCapturesBefore in isReadClobber.

Using callCapturesBefore potentially improves the precision and the
number of stores we can remove. But in practice, it seems to have very
little impact in terms of stores removed. For example, for
SPEC2000/SPEC2006/MultiSource with -O3 -flto, ~50 more stores are
removed (out of ~26900 stores removed). But in terms of compile-time, it
is very expensive and the patch gives substantial compile-time
improvements: Geomean O3 -0.24%, ReleaseThinLTO -0.47%, ReleaseLTO-g
-0.39%.

http://llvm-compile-time-tracker.com/compare.php?from=612a0bff88ed906c83b82f079d4c49e5fecfb9d0&to=e6c86b96d20d97dd88e903a409bd8d39b6114312&stat=instructions
The file was modifiedllvm/lib/Transforms/Scalar/DeadStoreElimination.cpp