SuccessChanges

Summary

  1. [SyntaxTree] Fix C++ versions on tests of `BuildTreeTest.cpp` (details)
  2. [Attributor] Provide an edge-based interface in AAIsDead (details)
  3. [mlir] Fix bug in block merging when the types of the operands differ (details)
  4. [SelectionDAG] Handle non-power-of-2 bitwidths in expandROT (details)
  5. [lldb] XFAIL TestMemoryHistory on Linux (details)
  6. [Support] Speedup llvm-dwarfdump 3.9x (details)
  7. [clangd] Compute the inactive code range for semantic highlighting. (details)
  8. [NFC] Fix some spelling errors in clang Driver Options.td (details)
  9. [AArch64][SVE] Fix calculation restore point for SVE callee saves. (details)
  10. [analyzer] Add modeling of assignment operator in smart ptr (details)
  11. [AArch64][AsmParser] Fix bug in operand printer (details)
  12. Reland [IR] Intrinsics default attributes and opt-out flag (details)
Commit 3b75f65e6ba4862977fd193ddb4918c4fc380fa5 by ecaldas
[SyntaxTree] Fix C++ versions on tests of `BuildTreeTest.cpp`

Differential Revision: https://reviews.llvm.org/D86591
The file was modifiedclang/unittests/Tooling/Syntax/BuildTreeTest.cpp
Commit 30507137986ab5d27c82c024dff1ffbf51ee9b31 by okuraofvegetable
[Attributor] Provide an edge-based interface in AAIsDead

This patch produces an edge-based interface in AAIsDead.
By this, we can query a set of basic blocks that are directly reachable from a given basic block.
This is specifically useful for implementation of AAReachability.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D85547
The file was modifiedllvm/lib/Transforms/IPO/AttributorAttributes.cpp
The file was modifiedllvm/include/llvm/Transforms/IPO/Attributor.h
Commit 474f7639e3494d9605f4444b087f48e710fbb0d4 by riddleriver
[mlir] Fix bug in block merging when the types of the operands differ

The merging algorithm was previously not checking for type equivalence.

Fixes PR47314

Differential Revision: https://reviews.llvm.org/D86594
The file was modifiedmlir/lib/Transforms/Utils/RegionUtils.cpp
The file was modifiedmlir/test/Transforms/canonicalize-block-merge.mlir
Commit b7e3599a22a9fdea42bf40cae750d10a5fb56888 by jay.foad
[SelectionDAG] Handle non-power-of-2 bitwidths in expandROT

Differential Revision: https://reviews.llvm.org/D86449
The file was addedllvm/test/CodeGen/WebAssembly/fshl.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
Commit 7518006d75accd21325747430d6bced66b2c5ada by Raphael Isemann
[lldb] XFAIL TestMemoryHistory on Linux

This test appears to have never worked on Linux but it seems none of the current
bots ever ran this test as it required enabling compiler-rt (otherwise it
would have just been skipped).

This just copies over the XFAIL decorator that are already on all other sanitizer
tests.
The file was modifiedlldb/test/API/functionalities/asan/TestMemoryHistory.py
Commit b20a4e293c3b617d0890657b3c46edcc7410c8fd by jan.kratochvil
[Support] Speedup llvm-dwarfdump 3.9x

Currently `strace llvm-dwarfdump x.debug >/tmp/file`:

  ioctl(1, TCGETS, 0x7ffd64d7f340)        = -1 ENOTTY (Inappropriate ioctl for device)
  write(1, "           DW_AT_decl_line\t(89)\n"..., 4096) = 4096
  ioctl(1, TCGETS, 0x7ffd64d7f400)        = -1 ENOTTY (Inappropriate ioctl for device)
  ioctl(1, TCGETS, 0x7ffd64d7f410)        = -1 ENOTTY (Inappropriate ioctl for device)
  ioctl(1, TCGETS, 0x7ffd64d7f400)        = -1 ENOTTY (Inappropriate ioctl for device)

After this patch:

  write(1, "0000000000001102 \"strlen\")\n     "..., 4096) = 4096
  write(1, "site\n                  DW_AT_low"..., 4096) = 4096
  write(1, "d53)\n\n0x000e4d4d:       DW_TAG_G"..., 4096) = 4096

The same speedup can be achieved by `--color=0` but that is not much convenient.

This implementation has been suggested by Joerg Sonnenberger.

Differential Revision: https://reviews.llvm.org/D86406
The file was modifiedllvm/include/llvm/Support/raw_ostream.h
The file was modifiedllvm/lib/Support/raw_ostream.cpp
Commit 0aaa2acc4ca0389a79a46bca3dc5b9365c641d77 by hokein.wu
[clangd] Compute the inactive code range for semantic highlighting.

Differential Revision: https://reviews.llvm.org/D85635
The file was modifiedclang-tools-extra/clangd/unittests/SemanticHighlightingTests.cpp
The file was modifiedclang-tools-extra/clangd/SemanticHighlighting.cpp
Commit f22d27624b6532a5542b283de9ce586c72c6b846 by puyan
[NFC] Fix some spelling errors in clang Driver Options.td

Differential Revision: https://reviews.llvm.org/D86427
The file was modifiedclang/include/clang/Driver/Options.td
Commit 5f47d4456d192eaea8c56a2b4648023c8743c927 by sander.desmalen
[AArch64][SVE] Fix calculation restore point for SVE callee saves.

This fixes an issue where the restore point of callee-saves in the
function epilogues was incorrectly calculated when the basic block
consisted of only a RET instruction. This caused dealloc instructions
to be inserted in between the block of callee-save restore instructions,
rather than before it.

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D86099
The file was modifiedllvm/lib/Target/AArch64/AArch64FrameLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/framelayout-sve-calleesaves-fix.mir
Commit 20676cab1168c2c60982af85f42725955cbcd7b5 by vrnithinkumar
[analyzer] Add modeling of assignment operator in smart ptr

Summary: Support for 'std::unique_ptr>::operator=' in SmartPtrModeling

Reviewers: NoQ, Szelethus, vsavchenko, xazax.hun

Reviewed By: NoQ, vsavchenko, xazax.hun

Subscribers: martong, cfe-commits
Tags: #clang

Differential Revision: https://reviews.llvm.org/D86293
The file was modifiedclang/lib/StaticAnalyzer/Checkers/SmartPtrModeling.cpp
The file was modifiedclang/test/Analysis/smart-ptr.cpp
The file was modifiedclang/test/Analysis/smart-ptr-text-output.cpp
The file was modifiedclang/test/Analysis/Inputs/system-header-simulator-cxx.h
Commit 1f44dfb640cbf04fd348c726950e556883cf7944 by cullen.rhodes
[AArch64][AsmParser] Fix bug in operand printer

The switch in AArch64Operand::print was changed in D45688 so the shift
can be printed after printing the register. This is implemented with
LLVM_FALLTHROUGH and was broken in D52485 when BTIHint was put between
the register and shift operands.

Reviewed By: ostannard

Differential Revision: https://reviews.llvm.org/D86535
The file was modifiedllvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
Commit 99d18f79646cf154fed1ffdb473afa8ebd943b07 by sstipanovic
Reland [IR] Intrinsics default attributes and opt-out flag

Intrinsic properties can now be set to default and applied to all
intrinsics. If the attributes are not needed, the user can opt-out by
setting the DisableDefaultAttributes flag to true.

Differential Revision: https://reviews.llvm.org/D70365
The file was modifiedllvm/test/TableGen/intrinsic-long-name.td
The file was modifiedllvm/utils/TableGen/SearchableTableEmitter.cpp
The file was modifiedllvm/test/TableGen/searchabletables-intrinsic.td
The file was modifiedllvm/test/TableGen/intrinsic-varargs.td
The file was modifiedllvm/test/TableGen/intrinsic-struct.td
The file was modifiedllvm/utils/TableGen/CodeGenTarget.cpp
The file was modifiedllvm/include/llvm/IR/Intrinsics.td
The file was modifiedllvm/test/TableGen/intrinsic-pointer-to-any.td
The file was modifiedllvm/utils/TableGen/CodeGenIntrinsics.h
The file was modifiedllvm/test/TableGen/intrin-side-effects.td