FailedChanges

Summary

  1. [DAGCombiner] Enhance (zext(setcc)) (details)
  2. [LLD][PowerPC][test] Disable ELF/ppc64-pcrel-long-branch-error.s (details)
Commit b904324788a8446791dbfbfd9c716644dbac283e by lkail
[DAGCombiner] Enhance (zext(setcc))

Current `v:t = zext(setcc x,y,cc)` will be transformed to `select x, y, 1:t, 0:t, cc`. It misses some opportunities if x's type size is less than `t`'s size. This patch enhances the above transformation.

Reviewed By: spatel

Differential Revision: https://reviews.llvm.org/D86687
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was modifiedllvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/PowerPC/fp-strict-fcmp.ll
The file was modifiedllvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/PowerPC/setcc-logic.ll
The file was modifiedllvm/test/CodeGen/PowerPC/signbit-shift.ll
Commit 97febb139dc45b67a3896266697ea1e1b1d9950c by hubert.reinterpretcast
[LLD][PowerPC][test] Disable ELF/ppc64-pcrel-long-branch-error.s

Following 0becc27ebfec, `ppc64-pcrel-long-branch-error.s` fails in some
environments with out-of-memory errors associated with buffering the
output in-memory. Since the alternative of writing to an allocated file
is also known to cause problems, we will disable the test
unconditionally (pending a mechanism to disable the test selectively).
The file was modifiedlld/test/ELF/ppc64-pcrel-long-branch-error.s