FailedChanges

Summary

  1. [CodeGen][typeid] Emit typeinfo directly if type is known at compile-time (details)
  2. [PowerPC] Implement __int128 vector divide operations (details)
  3. [AArch64][SVE] Add lowering for llvm fsqrt (details)
  4. [clang] Add a command line flag for the Machine Function Splitter. (details)
  5. InferAddressSpaces: Fix assert with unreachable code (details)
  6. [TableGen] Fix invalid comparison function `SizeOrder` in `getMatchingSubClassWithSubRegs` (details)
  7. Implement __isOSVersionAtLeast for Android (details)
  8. [libc] remove useless headers (details)
  9. [SLPVectorizer][SVE] Skip scalable-vector instructions before vectorizeSimpleInstructions. (details)
  10. [libc] use stddef instead of string header (details)
  11. Sema: add support for `__attribute__((__swift_bridged_typedef__))` (details)
  12. [libc] Remove special case for 8 and 16 bytes (details)
  13. [mlir] Rename 'setInsertionPointAfter' to avoid ambiguity (details)
Commit f975ae4867d1fdfaba11a3ec7e479da8fbfd82d8 by zequanwu
[CodeGen][typeid] Emit typeinfo directly if type is known at compile-time

Differential Revision: https://reviews.llvm.org/D87425
The file was modifiedclang/lib/AST/ExprCXX.cpp
The file was modifiedclang/include/clang/AST/ExprCXX.h
The file was modifiedclang/test/CodeGenCXX/microsoft-abi-typeid.cpp
The file was modifiedclang/lib/CodeGen/CGExprCXX.cpp
Commit 05aa997d511eed530305e2f3aa401584d0691186 by conanap
[PowerPC] Implement __int128 vector divide operations

This patch implements __int128 vector divide operations for ISA3.1.

Differential Revision: https://reviews.llvm.org/D85453
The file was modifiedllvm/lib/Target/PowerPC/PPCISelLowering.cpp
The file was modifiedclang/lib/Headers/altivec.h
The file was modifiedclang/test/CodeGen/builtins-ppc-p10vector.c
The file was modifiedllvm/test/CodeGen/PowerPC/p10-vector-divide.ll
The file was modifiedllvm/lib/Target/PowerPC/PPCInstrPrefix.td
Commit d417488ef5a6cd1089900defcd6d5ae5a1d47fd4 by dancgr
[AArch64][SVE] Add lowering for llvm fsqrt

Add the functionality to lower fsqrt for passthru variant

Reviewed By: paulwalker-arm

Differential Revision: https://reviews.llvm.org/D87707
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was modifiedllvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
The file was modifiedllvm/test/CodeGen/AArch64/sve-fp.ll
Commit f1a3ab904439a63b21ba1c4521765c46630687c6 by snehasishk
[clang] Add a command line flag for the Machine Function Splitter.

This patch adds a command line flag for the machine function splitter
(added in rG94faadaca4e1).

-fsplit-machine-functions
Split machine functions using profile information (x86 ELF). On
other targets an error is emitted. If profile information is not
provided a warning is emitted notifying the user that profile
information is required.

Differential Revision: https://reviews.llvm.org/D87047
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/CodeGen/BackendUtil.cpp
The file was modifiedclang/include/clang/Basic/CodeGenOptions.def
The file was addedclang/test/Driver/fsplit-machine-functions.c
The file was modifiedclang/include/clang/Driver/Options.td
Commit 7d6ca2ec57073b9eabe6808ff1fe0560586c5ffb by Matthew.Arsenault
InferAddressSpaces: Fix assert with unreachable code

Invalid IR in unreachable code is technically valid IR. In this case,
the address space of the value was never inferred, and we tried to
rewrite it with an invalid address space value which would assert.
The file was addedllvm/test/Transforms/InferAddressSpaces/AMDGPU/self-phi.ll
The file was addedllvm/test/Transforms/InferAddressSpaces/AMDGPU/unreachable-code-assert.ll
The file was modifiedllvm/lib/Transforms/Scalar/InferAddressSpaces.cpp
Commit 38ecd6161993ea9632efe0c0bf304bf6c2dee98f by Matthew.Arsenault
[TableGen] Fix invalid comparison function `SizeOrder` in `getMatchingSubClassWithSubRegs`

Building LLVM with -DEXPENSIVE_CHECKS fails with the following error
message with libstdc++ in debug mode:

Error: comparison doesn't meet irreflexive requirements,
assert(!(a < a)).

The patch fixes the comparison function SizeOrder by returning false
when comparing two equal items.
The file was modifiedllvm/utils/TableGen/CodeGenRegisters.cpp
Commit 516a01b5f36d4188778a34202cd11856d70ac808 by srhines
Implement __isOSVersionAtLeast for Android

Add the implementation of __isOSVersionAtLeast for Android. Currently,
only the major version is checked against the API level of the platform
which is an integer. The API level is retrieved by reading the system
property ro.build.version.sdk (and optionally ro.build.version.codename
to see if the platform is released or not).

Patch by jiyong@google.com

Bug: 150860940
Bug: 134795810
Test: m

Reviewed By: srhines

Differential Revision: https://reviews.llvm.org/D86596
The file was modifiedcompiler-rt/lib/builtins/os_version_check.c
Commit 00ba1a3de7faad80f7bb75d07a1a5da09a009895 by gchatelet
[libc] remove useless headers
The file was modifiedlibc/src/string/memset.h
The file was modifiedlibc/src/string/memcpy.h
Commit 3b7f5166bd11fc6cbf96597d26753e8c3fc0e6ab by huihuiz
[SLPVectorizer][SVE] Skip scalable-vector instructions before vectorizeSimpleInstructions.

For scalable type, the aggregated size is unknown at compile-time.
Skip instructions with scalable type to ensure the list of instructions
for vectorizeSimpleInstructions does not contains any scalable-vector instructions.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D87550
The file was addedllvm/test/Transforms/SLPVectorizer/AArch64/insertelement.ll
The file was modifiedllvm/lib/Transforms/Vectorize/SLPVectorizer.cpp
Commit c19fda9aa073254c0979301bd57d875608329fa2 by gchatelet
[libc] use stddef instead of string header
The file was modifiedlibc/src/string/bzero.h
Commit 7d26d6a1b062f7ce820b02b39d102d5f8f15fa5f by Saleem Abdulrasool
Sema: add support for `__attribute__((__swift_bridged_typedef__))`

Extend the semantic attributes that clang processes for Swift to include
`swift_bridged_typedef`.  This attribute enables typedefs to be bridged
into Swift with a bridged name.

This is based on the work of the original changes in
https://github.com/llvm/llvm-project-staging/commit/8afaf3aad2af43cfedca7a24cd817848c4e95c0c

Differential Revision: https://reviews.llvm.org/D87396
Reviewed By: Aaron Ballman
The file was modifiedclang/lib/Sema/SemaDeclAttr.cpp
The file was addedclang/test/AST/attr-swift_bridged_typedef.m
The file was modifiedclang/test/Misc/pragma-attribute-supported-attributes-list.test
The file was modifiedclang/include/clang/Basic/Attr.td
The file was addedclang/test/SemaObjC/attr-swift_bridged_typedef.m
The file was modifiedclang/include/clang/Basic/AttrDocs.td
The file was addedclang/test/AST/attr-swift_bridged_typedef.mm
Commit c3fd2a50ba1395b6c2240f6a688c6a1aa975a1fe by gchatelet
[libc] Remove special case for 8 and 16 bytes

They don't seem to gain much in real apps and its better to favor less branches and smaller code.
The file was modifiedlibc/src/string/memcpy.cpp
The file was modifiedlibc/src/string/x86/memcpy.cpp
Commit 609f5e050cea760694a46e126e5aa3f62660cae9 by diego.caballero
[mlir] Rename 'setInsertionPointAfter' to avoid ambiguity

Rename 'setInsertionPointAfter(Value)' API to avoid ambiguity with
'setInsertionPointAfter(Operation *)' for SingleResult operations which
implicitly convert to Value (see D86756).

Differential Revision: https://reviews.llvm.org/D87155
The file was modifiedmlir/lib/Dialect/Affine/Transforms/SuperVectorize.cpp
The file was modifiedmlir/include/mlir/IR/Builders.h