Started 2 mo 9 days ago
Took 3 hr 4 min

Success Build #23913 (Sep 21, 2020 4:08:03 AM)

Changes
  1. [CodeGen] Fixing inconsistent ABI mangling of vlaues in SelectionDAGBuilder (details)
  2. [Test] Test auto-update (details)
  3. [lld][ELF][test] Add additional LTO testing (details)
  4. [RISC-V] Implement RISCVInstrInfo::isCopyInstrImpl() (details)
  5. [compiler-rt] Fix atomic support functions on 32-bit architectures (details)
  6. [SyntaxTree][Synthesis] Implement `deepCopy` (details)
  7. [mlir] Shape.AssumingOp implements RegionBranchOpInterface. (details)
  8. [AArch64] Cortex-A55 scheduler model (details)
  9. [NFC][ARM] More tail predication tests. (details)
  10. [llvm-readelf/obj] - Stop printing invalid names for unnamed section symbols. (details)
  11. Do not dereference an array out of bound just to take its address (details)
  12. [ARM] Select f32 constants with vmov.f16 (details)
  13. [mlir][VectorOps] Loosen restrictions on vector.reduction types (details)
  14. Recommit "[SCEV] Look through single value PHIs." (details)
  15. [AST] Reduce the size of TemplateArgumentLocInfo. (details)
  16. Revert "[NFC][ScheduleDAG] Remove unused EntrySU SUnit" (details)
  17. Fix buildbot. (details)
  18. [MLIR] Fix typo and expand gpu.host_register description. (details)
  19. [SyntaxTree][NFC] follow naming convention + remove auto on empty vector declaration (details)

Started by timer (13 times)

This run spent:

  • 2 hr 42 min waiting;
  • 3 hr 4 min build duration;
  • 5 hr 7 min total from scheduled to completion.
Revision: afcad9888264b073d5a16d0efe57792de51c2627
  • refs/remotes/origin/master
Revision: 87f0b51d68de40e7106be89d934b5191d983e3d5
  • refs/remotes/origin/master
Revision: afcad9888264b073d5a16d0efe57792de51c2627
  • refs/remotes/origin/master
Test Result (no failures)