SuccessChanges

Summary

  1. [SYCL] Assume SYCL device functions are convergent (details)
  2. [sanitizer] Don't build gmock for tests (follow-up to 82827244). (details)
  3. [LoopUtils] Only verify SE in builds with assertions. (details)
  4. [mlir][GPU] Improve constant sinking in kernel outlining (details)
  5. [SystemZ] Don't emit PC-relative memory accesses to unaligned symbols. (details)
  6. [SDag] Refactor and simplify divergence calculation and checking. NFC. (details)
  7. [SDag] Verify DAG divergence after dumping. NFC. (details)
  8. [mlir] Fix shared libs build (details)
  9. Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access" (details)
  10. [AArch64] Add v8.5 Branch Target Identification support. (details)
  11. [mlir][Linalg] Refactor Linalg creation of loops to allow passing iterArgs - NFC (details)
  12. [GlobalISel] fix widenScalarUnmerge if widen type is not a multiple of destination type (details)
  13. [mlir][Linalg] Refactor Linalg op initTensors support - NFC (details)
  14. [mlir][openacc] Add update operation (details)
Commit 9263931fcccdc99000c1de668bea330711333729 by alexey.bader
[SYCL] Assume SYCL device functions are convergent

SYCL device compiler (similar to other SPMD compilers) assumes that
functions are convergent by default to avoid invalid transformations.
This attribute can be removed if compiler can prove that function does
not have convergent operations.

Reviewed By: Naghasan

Differential Revision: https://reviews.llvm.org/D87282
The file was addedclang/test/CodeGenSYCL/convergent.cpp
The file was modifiedclang/lib/Frontend/CompilerInvocation.cpp
Commit a59be54e611997f23d1e5a76cada448b5f98d47e by hans
[sanitizer] Don't build gmock for tests (follow-up to 82827244).

A use of gmock was briefly added in a90229d6, but was soon removed in
82827244. This also removes it from the cmake files.
The file was modifiedcompiler-rt/lib/sanitizer_common/tests/CMakeLists.txt
Commit 7bae2bc5a8dd11c016c895e3a691fb93575773f3 by flo
[LoopUtils] Only verify SE in builds with assertions.

Follow up to 60b852092c98.
The file was modifiedllvm/lib/Transforms/Utils/LoopUtils.cpp
Commit edeff6e642e66a5be05c11cb8b9b36b3383078ae by herhut
[mlir][GPU] Improve constant sinking in kernel outlining

The previous implementation did not support sinking simple expressions. In particular,
it is often beneficial to sink dim operations.

Differential Revision: https://reviews.llvm.org/D88439
The file was modifiedmlir/test/Dialect/GPU/outlining.mlir
The file was modifiedmlir/lib/Dialect/GPU/Transforms/KernelOutlining.cpp
Commit 75a5febe31cb2660c4f72d9745625704d29946e1 by paulsson
[SystemZ] Don't emit PC-relative memory accesses to unaligned symbols.

In the presence of packed structures (#pragma pack(1)) where elements are
referenced through pointers, there will be stores/loads with alignment values
matching the default alignments for the element types while the elements are
in fact unaligned. Strictly speaking this is incorrect source code, but is
unfortunately part of existing code and therefore now addressed.

This patch improves the pattern predicate for PC-relative loads and stores by
not only checking the alignment value of the instruction, but also making
sure that the symbol (and element) itself is aligned.

Fixes https://bugs.llvm.org/show_bug.cgi?id=44405

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D87510
The file was modifiedllvm/lib/Target/SystemZ/SystemZISelDAGToDAG.cpp
The file was modifiedllvm/lib/Target/SystemZ/SystemZOperators.td
The file was addedllvm/test/CodeGen/SystemZ/int-move-10.ll
Commit d6b04f3937e374572039005d1446b4a950dc8f01 by jay.foad
[SDag] Refactor and simplify divergence calculation and checking. NFC.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/include/llvm/CodeGen/SelectionDAG.h
Commit 781edd501c25ce1b526764e2b048e9e1c5a41728 by jay.foad
[SDag] Verify DAG divergence after dumping. NFC.

When debugging, it's useful to be able to see the DAG that has just
failed divergence verification.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
Commit 6199219bbd8224b7cf69b4a538bd6bc49f6daaf0 by andrzej.warzynski
[mlir] Fix shared libs build

The following change causes the shared libraries build
(BUILD_SHARED_LIBS=On) to fail:
  * https://reviews.llvm.org/D88351
This patch will fix that.

Differential Revision: https://reviews.llvm.org/D88484
The file was modifiedmlir/lib/Target/CMakeLists.txt
Commit 8b08fa0103c8d8e624b19fad5a5006e7a783ecb7 by Mirko.Brkusanin
Revert "[AMDGPU] Reorganize GCN subtarget features for unaligned access"

This reverts commit f5cd7ec9f3fc969ff5e1feed961996844333de3b.

Certain rocPRIM/rocThrust/hipCUB tests were failing because of this change.
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/adjust-alloca-alignment.ll
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/multiple_tails.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
The file was modifiedllvm/lib/Target/AMDGPU/SIISelLowering.cpp
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
The file was modifiedllvm/test/Transforms/LoadStoreVectorizer/AMDGPU/merge-stores.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPU.td
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline-ir.mir
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
The file was modifiedllvm/test/CodeGen/AMDGPU/unaligned-load-store.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
The file was modifiedllvm/test/CodeGen/MIR/AMDGPU/llc-target-cpu-attr-from-cmdline.mir
Commit f34ae1b9de68152de037fd3e394d196b997c4296 by daniel.kiss
[AArch64] Add v8.5 Branch Target Identification support.

The .note.gnu.property must be in the assembly file to indicate the
support for BTI otherwise BTI will be disabled for the whole library.
__unw_getcontext and libunwind::Registers_arm64::jumpto() may be called
indirectly therefore they should start with a landing pad.

Reviewed By: tamas.petz, #libunwind, compnerd

Differential Revision: https://reviews.llvm.org/D77786
The file was modifiedlibunwind/src/assembly.h
Commit 074ab233ed620c1afa44e5bc2d86ab448a9ce1ed by ntv
[mlir][Linalg] Refactor Linalg creation of loops to allow passing iterArgs - NFC

This revision changes the signatures of helper function that Linalg uses to create loops so that they can also take iterArgs.
iterArgs are asserted empty to ensure no functional change.
This is a mechanical change in preparation of tiling on linalg on tensors to avoid  polluting the implementation with an NFC change.

Differential Revision: https://reviews.llvm.org/D88480
The file was modifiedmlir/include/mlir/Dialect/SCF/EDSC/Builders.h
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/SCF/EDSC/Builders.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Loops.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Utils/Utils.cpp
Commit 113114a5da60ef30731046f50fc1d67ff87897fc by dominik.montada
[GlobalISel] fix widenScalarUnmerge if widen type is not a multiple of destination type

Fix creation of illegal unmerge when widen was requested to a type which
is not a multiple of the destination type. E.g. when trying to widen
an s48 unmerge to s64 the existing code would create an illegal unmerge
from s64 to s48.

Instead, create further unmerges to a GCD type, then use this to remerge
these intermediate results to the actual destinations.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D88422
The file was modifiedllvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
The file was modifiedllvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp
Commit 6b649570cbc44dd775d9657805cc60b2075d8011 by ntv
[mlir][Linalg] Refactor Linalg op initTensors support - NFC

Manually-defined named ops do not currently support `init_tensors` or return values and may never support them. Add extra interface to the StructuredOpInterface so that we can still write op-agnostic transformations based on StructuredOpInterface.

This is an NFC extension in preparation for tiling on tensors.

Differential Revision: https://reviews.llvm.org/D88481
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOpsInterface.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
Commit ecc997807180a6e763f12e3d011f6b887db0d6a9 by clementval
[mlir][openacc] Add update operation

This patch introduce the update operation that represent the OpenACC update directive.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88102
The file was modifiedmlir/include/mlir/Dialect/OpenACC/OpenACCOps.td
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
The file was modifiedmlir/test/Dialect/OpenACC/invalid.mlir
The file was modifiedmlir/test/Dialect/OpenACC/ops.mlir