SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [DebugInfo][Support] Replace DWARFDataExtractor size function (details)
  2. [lldb][NFC] Use range-based for loops in IRInterpreter (details)
  3. [lldb] Fix lookup of symbols with the same address range but different (details)
  4. [X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI. (details)
  5. [SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in (details)
  6. [llvm-exegesis][mips] Expand loadImmediate() (details)
  7. [clangd] Remove raw string literals in macros (details)
  8. [X86][SSE] Add knownbits test showing missing (details)
  9. [SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant() (details)
Commit b6ffa2fe1250a8f506cc66044275b0bced56059e by james.henderson
[DebugInfo][Support] Replace DWARFDataExtractor size function
This patch adds a new size function to the base DataExtractor class,
which removes the need for the DWARFDataExtractor size function.
It is unclear why DWARFDataExtractor's size function returned zero in
some circumstances (i.e. when it is constructed without a section, and
with a different data source instead), so that behaviour has changed.
The old behaviour could cause an assertion in the debug line parser, as
the size did not reflect the actual data available, and could be lower
than the current offset being parsed.
Reviewed by: dblaikie
Differential Revision: https://reviews.llvm.org/D72337
The file was modifiedllvm/unittests/Support/DataExtractorTest.cpp
The file was modifiedllvm/include/llvm/DebugInfo/DWARF/DWARFDataExtractor.h
The file was modifiedllvm/include/llvm/Support/DataExtractor.h
Commit af4adb07cd18b7081ec5818aee385654c8454356 by Raphael Isemann
[lldb][NFC] Use range-based for loops in IRInterpreter
The file was modifiedlldb/source/Expression/IRInterpreter.cpp
Commit bf7225888a99f49afac0b95a8996d0a942b6b0e3 by jan.kratochvil
[lldb] Fix lookup of symbols with the same address range but different
binding
This fixes a failing testcase on Fedora 30 x86_64 (regression Fedora
29->30):
PASS:
./bin/lldb
./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out
-o 'settings set symbols.enable-external-lookup false' -o r -o bt -o
quit
* frame #0: 0x00007ffff7aa6e75 libc.so.6`__GI_raise + 325
   frame #1: 0x00007ffff7a91895 libc.so.6`__GI_abort + 295
   frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
   frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
   frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
   frame #5: 0x000000000040112e a.out`main(argc=<unavailable>,
argv=<unavailable>) at main.c:32:2
   frame #6: 0x00007ffff7a92f33 libc.so.6`__libc_start_main + 243
   frame #7: 0x000000000040106e a.out`_start + 46
vs.
FAIL - unrecognized abort() function:
./bin/lldb
./lldb-test-build.noindex/functionalities/unwind/noreturn/TestNoreturnUnwind.test_dwarf/a.out
-o 'settings set symbols.enable-external-lookup false' -o r -o bt -o
quit
* frame #0: 0x00007ffff7aa6e75 libc.so.6`.annobin_raise.c + 325
   frame #1: 0x00007ffff7a91895
libc.so.6`.annobin_loadmsgcat.c_end.unlikely + 295
   frame #2: 0x0000000000401140 a.out`func_c at main.c:12:2
   frame #3: 0x000000000040113a a.out`func_b at main.c:18:2
   frame #4: 0x0000000000401134 a.out`func_a at main.c:26:2
   frame #5: 0x000000000040112e a.out`main(argc=<unavailable>,
argv=<unavailable>) at main.c:32:2
   frame #6: 0x00007ffff7a92f33 libc.so.6`.annobin_libc_start.c + 243
   frame #7: 0x000000000040106e a.out`.annobin_init.c.hot + 46
The extra ELF symbols are there due to Annobin (I did not investigate
why this problem happened specifically since F-30 and not since F-28).
It is due to:
Symbol table '.dynsym' contains 2361 entries: Valu e          Size Type
Bind   Vis     Name 0000000000022769   5 FUNC   LOCAL  DEFAULT
_nl_load_domain.cold 000000000002276e   0 NOTYPE LOCAL  HIDDEN
.annobin_abort.c.unlikely
... 000000000002276e   0 NOTYPE LOCAL  HIDDEN
.annobin_loadmsgcat.c_end.unlikely
... 000000000002276e   0 NOTYPE LOCAL  HIDDEN
.annobin_textdomain.c_end.unlikely 000000000002276e 548 FUNC   GLOBAL
DEFAULT abort 000000000002276e 548 FUNC   GLOBAL DEFAULT
abort@@GLIBC_2.2.5 000000000002276e 548 FUNC   LOCAL  DEFAULT __GI_abort
0000000000022992   0 NOTYPE LOCAL  HIDDEN  .annobin_abort.c_end.unlikely
GDB has some more complicated preferences between overlapping and/or
sharing address symbols, I have made here so far the most simple fix for
this case.
Differential revision: https://reviews.llvm.org/D63540
The file was modifiedlldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp
The file was addedlldb/test/Shell/SymbolFile/Inputs/symbol-binding.s
The file was addedlldb/test/Shell/SymbolFile/symbol-binding.test
The file was modifiedlldb/include/lldb/Symbol/Symtab.h
The file was modifiedlldb/source/Symbol/Symtab.cpp
Commit 7f1cf7d5f658b15abb8bd6840fc01e6d44487a23 by llvm-dev
[X86] Fix MSVC "truncation from 'int' to 'bool'" warning. NFCI.
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
Commit 8f49204f26ea8856b870d4c2344b98f4b706bea0 by llvm-dev
[SelectionDAG] ComputeKnownBits - minimum leading/trailing zero bits in
LSHR/SHL (PR44526)
As detailed in https://blog.regehr.org/archives/1709 we don't make use
of the known leading/trailing zeros for shifted values in cases where we
don't know the shift amount value.
This patch adds support to SelectionDAG::ComputeKnownBits to use
KnownBits::countMinTrailingZeros and countMinLeadingZeros to set the
minimum guaranteed leading/trailing known zero bits.
Differential Revision: https://reviews.llvm.org/D72573
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
The file was modifiedllvm/test/CodeGen/BPF/shifts.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-rot-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-sub128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-rotate-128.ll
The file was modifiedllvm/test/CodeGen/X86/vector-shift-lshr-128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.v2i16.ll
The file was modifiedllvm/test/CodeGen/ARM/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-shift.ll
The file was modifiedllvm/test/CodeGen/ARM/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/AArch64/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/hoist-and-by-const-from-lshr-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshr-128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/lshr.v2i16.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-128.ll
The file was modifiedllvm/test/CodeGen/X86/avx2-vector-shifts.ll
The file was modifiedllvm/test/CodeGen/X86/vector-fshl-rot-128.ll
The file was modifiedllvm/test/CodeGen/AArch64/hoist-and-by-const-from-shl-in-eqcmp-zero.ll
The file was modifiedllvm/test/CodeGen/Mips/llvm-ir/lshr.ll
Commit 804dd6722762040e7ce7e04bf97b19d9596fee20 by Milos.Stojanovic
[llvm-exegesis][mips] Expand loadImmediate()
Add support for loading 32-bit immediates and enable the use of GPR64
registers.
Differential Revision: https://reviews.llvm.org/D71873
The file was modifiedllvm/tools/llvm-exegesis/lib/Mips/Target.cpp
The file was addedllvm/test/tools/llvm-exegesis/Mips/latency-GPR64.s
The file was modifiedllvm/unittests/tools/llvm-exegesis/Mips/TargetTest.cpp
Commit b96ec492d34ecf31fd2c8d2f0033f00e36cc2b9c by oliver.stannard
[clangd] Remove raw string literals in macros
Older (but still supported) versions of GCC don't handle C++11 raw
string literals in macro parameters correctly.
The file was modifiedclang-tools-extra/clangd/unittests/FormattedStringTests.cpp
Commit 7efc7ca8edf6762dc64472417dabfbbdd838ceeb by llvm-dev
[X86][SSE] Add knownbits test showing missing
getValidMinimumShiftAmountConstant() ISD::SHL support
As mentioned on D72573
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll
Commit ef5debac4302cd479ddd9e784a5b5acc8c2b9804 by llvm-dev
[SelectionDAG] ComputeKnownBits add getValidMinimumShiftAmountConstant()
ISD::SHL support
As mentioned on D72573
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
The file was modifiedllvm/test/CodeGen/X86/combine-shl.ll