SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. Fix tests for builtbot failures (details)
  2. [lldb/Docs] Extend description section of the main page (details)
  3. [X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift (details)
  4. AMDGPU/GlobalISel: Simplify assert (details)
  5. AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF (details)
  6. AMDGPU/GlobalISel: Add some baseline tests for vector extract (details)
  7. AMDGPU/GlobalISel: Set insert point after waterfall loop (details)
  8. [SelectionDAG] ComputeNumSignBits add (details)
  9. AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap} (details)
  10. Try number 2 for fixing bot failures (details)
  11. Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf (details)
  12. Fix readability-identifier-naming missing member variables (details)
  13. Hopefully last fix for bot failures (details)
  14. [llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands. (details)
  15. [X86][Disassembler] Fix a bug when disassembling an empty string (details)
  16. Add a couple of missed wildcards in debug-pass-manager output checking (details)
Commit bb2e5f5e454245c8e7e9e4c9bf7a463c64604292 by tejohnson
Fix tests for builtbot failures
Should fix most of the buildbot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, by loosening up the matching
on the AnalysisProxy output.
Added in --dump-input=fail on the one test that appears to be something
different, so I can hopefully debug it better.
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
Commit 9d30d769041b14c0ff29770d59027e679e6b7edc by Jonas Devlieghere
[lldb/Docs] Extend description section of the main page
The current description is a bit terse. I've copy/pasted the
introduction form the website.
The file was modifiedlldb/docs/man/lldb.rst
Commit ffc05d0dbc88b89756d553ff32abefe720d27742 by llvm-dev
[X86][SSE] Add sitofp(shl(sext(x),y)) test case with non-uniform shift
value
Shows that for non-uniform SHL shifts we fail to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
Commit 7d9b0a61c32b95fdc73228266d3f14687a8ada95 by arsenm2
AMDGPU/GlobalISel: Simplify assert
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit ca19d7a3993c69633826ae388155c9ad176b11df by arsenm2
AMDGPU/GlobalISel: Fix branch targets when emitting SI_IF
The branch target needs to be changed depending on whether there is an
unconditional branch or not.
Loops also need to be similarly fixed, but compiling a simple testcase
end to end requires another set of patches that aren't upstream yet.
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
Commit 2f090cc8f1a3144c81b024bdc52ec1ae49dc0def by arsenm2
AMDGPU/GlobalISel: Add some baseline tests for vector extract
A future change will try to fold constant offsets into the loop which
these will stress.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-extract-vector-elt.mir
Commit 3d8f1b2d22be79aab3d246fa5bc9c24b911b0bd2 by arsenm2
AMDGPU/GlobalISel: Set insert point after waterfall loop
The current users of the waterfall loop utility functions do not make
use of the restored original insert point. The insertion is either done,
or they set the insert point somewhere else. A future change will want
to insert instructions after the waterfall loop, but figuring out the
point after the loop is more difficult than ensuring the insert point is
there after the loop.
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
Commit c6fcd5d115b62280669719c5ead436904c93d6cb by llvm-dev
[SelectionDAG] ComputeNumSignBits add
getValidMaximumShiftAmountConstant() for ISD::SHL support
Allows us to handle non-uniform SHL shifts to determine the minimum
number of sign bits remaining (based off the maximum shift amount value)
The file was modifiedllvm/test/CodeGen/X86/known-signbits-vector.ll
The file was modifiedllvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
Commit 203801425d222555fa2617fff19ecd861525429f by arsenm2
AMDGPU/GlobalISel: Select llvm.amdgcn.ds.ordered.{add|swap}
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.swap.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.ordered.add.gfx10.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
Commit 292562c0046c72ea1ed229dbe13a89dca73e5b89 by tejohnson
Try number 2 for fixing bot failures
Additional fixes for bot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f. Remove more exact matching on
AnalyisManagers, as they can vary. Also allow different orders between
LoopAnalysis and BranchProbabilityAnalysis as that can vary due to both
being accessed in the parameter list of a call.
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
Commit a2cd4fe6bf2a4e37d5f69b0b19cb1134a14e2970 by benny.kra
Unbreak the mlir build after 202ab273e6eca134b69882f100c666fcd3affbcf
The file was modifiedmlir/lib/Conversion/GPUToROCDL/LowerGpuOpsToROCDLOps.cpp
The file was modifiedmlir/lib/Conversion/GPUToNVVM/LowerGpuOpsToNVVMOps.cpp
Commit fb79ef524171c96a9f3df025ac7a8a3e00fdc0b4 by aaron
Fix readability-identifier-naming missing member variables
Fixes PR41122 (missing fixes for member variables in a destructor) and
PR29005 (does not rename class members in all locations).
The file was modifiedclang-tools-extra/clang-tidy/readability/IdentifierNamingCheck.cpp
The file was addedclang-tools-extra/test/clang-tidy/checkers/readability-identifier-naming-member-decl-usage.cpp
Commit 7aed43b60739653b13b8503f9df4c958c44feed8 by tejohnson
Hopefully last fix for bot failures
Hopefully final bot fix for last few failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f.
Looks like sometimes the "llvm::" preceeding objects get printed in the
debug pass manager output and sometimes they don't. Replace with
wildcard matching.
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-samplepgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-postlink-pgo-defaults.ll
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-samplepgo-defaults.ll
Commit 484a7472f1aa6906f2b66dc33bcf69cc8d5b9f29 by puyan
[llvm][MIRVRegNamerUtils] Adding hashing on FrameIndex MachineOperands.
This patch makes it so that cases where multiple instructions that
differ only in their FrameIndex MachineOperand values no longer collide.
For instance:
%1:_(p0) = G_FRAME_INDEX %stack.0
%2:_(p0) = G_FRAME_INDEX %stack.1
Prior to this patch these instructions would collide together.
Differential Revision: https://reviews.llvm.org/D71583
The file was modifiedllvm/lib/CodeGen/MIRVRegNamerUtils.cpp
The file was addedllvm/test/CodeGen/MIR/X86/mir-namer-hash-frameindex.mir
Commit 64a93afc3c630c39e5c583e4f67aef5821d635b6 by maskray
[X86][Disassembler] Fix a bug when disassembling an empty string
readPrefixes() assumes insn->bytes is non-empty. The code path is not
exercised in llvm-mc because llvm-mc does not feed empty input to
MCDisassembler::getInstruction().
This bug is uncovered by a5994c789a2982a770254ae1607b5b4cb641f73c. An
empty string did not crash before because the deleted regionReader()
allowed UINT64_C(-1) as insn->readerCursor.
  Bytes.size() <= Address -> R->Base
0 <= UINT64_C(-1) - UINT32_C(-1)
The file was modifiedllvm/lib/Target/X86/Disassembler/X86Disassembler.cpp
The file was modifiedllvm/unittests/MC/Disassembler.cpp
Commit cb988a858abbaf1a1ae0fe03f2a1dae692131ea9 by tejohnson
Add a couple of missed wildcards in debug-pass-manager output checking
Along with the previous fix for bot failures from
2af97be8027a0823b88d4b6a07fc5eedb440bc1f, need to add a wildcard in a
couple of places where my local output did not print "llvm::" but the
bot is.
The file was modifiedclang/test/CodeGen/thinlto-distributed-newpm.ll
The file was modifiedllvm/test/Other/new-pm-thinlto-prelink-pgo-defaults.ll