SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [OPENMP]Do not emit special virtual function for NVPTX target. (details)
  2. [DAGCombine] Replace `getIntPtrConstant()` with `getVectorIdxTy()`. (details)
  3. [mlir][Linalg] Update the semantics, verifier and test for Linalg with (details)
  4. -fmodules-codegen should not emit extern templates (details)
  5. fix recent -fmodules-codegen fix test (details)
  6. make -fmodules-codegen and -fmodules-debuginfo work also with PCHs (details)
  7. [mlir] Enable printing of FuncOp in the generic form. (details)
  8. [OPENMP]Do not use RTTI by default for NVPTX devices. (details)
  9. [mlir] Refactor ModuleState into AsmState and expose it to users. (details)
Commit a48600c0a653d34f4af760f117755ed1776adf9d by a.bataev
[OPENMP]Do not emit special virtual function for NVPTX target.
There are no special virtual function handlers (like __cxa_pure_virtual)
defined for NVPTX target, so just emit such functions as null pointers
to prevent issues with linking and unresolved references.
The file was addedclang/test/OpenMP/nvptx_target_pure_deleted_codegen.cpp
The file was modifiedclang/lib/CodeGen/CGVTables.cpp
Commit 8d07f8d98c48ee0a9dca450aaf4e1cabc621ff68 by michael.hliao
[DAGCombine] Replace `getIntPtrConstant()` with `getVectorIdxTy()`.
- Prefer `getVectorIdxTy()` as the index operand type for
`EXTRACT_SUBVECTOR` as targets expect different types by overloading
`getVectorIdxTy()`.
The file was modifiedllvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
The file was addedllvm/test/CodeGen/AMDGPU/extract-subvector.ll
Commit f52d71736b10e87b1aa1880b777dc9462a0085ce by ntv
[mlir][Linalg] Update the semantics, verifier and test for Linalg with
tensors.
Summary: This diff fixes issues with the semantics of linalg.generic on
tensors that appeared when converting directly from HLO to
linalg.generic. The changes are self-contained within MLIR and can be
captured and tested independently of XLA.
The linalg.generic and indexed_generic are updated to:
To allow progressive lowering from the value world (a.k.a tensor values)
to the buffer world (a.k.a memref values), a linalg.generic op accepts
mixing input and output ranked tensor values with input and output
memrefs.
```
%1 = linalg.generic #trait_attribute %A, %B {other-attributes} :
tensor<?x?xf32>,
memref<?x?xf32, stride_specification>
-> (tensor<?x?xf32>)
```
In this case, the number of outputs (args_out) must match the sum of (1)
the number of output buffer operands and (2) the number of tensor return
values. The semantics is that the linalg.indexed_generic op produces
(i.e. allocates and fills) its return values.
Tensor values must be legalized by a buffer allocation pass before most
transformations can be applied. Such legalization moves tensor return
values into output buffer operands and updates the region argument
accordingly.
Transformations that create control-flow around linalg.indexed_generic
operations are not expected to mix with tensors because SSA values do
not escape naturally. Still, transformations and rewrites that take
advantage of tensor SSA values are expected to be useful and will be
added in the near future.
Subscribers: bmahjour, mehdi_amini, rriddle, jpienaar, burmako,
shauheen, antiagainst, arpith-jacob, mgester, lucyrfox, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72555
The file was modifiedmlir/test/Dialect/Linalg/roundtrip.mlir
The file was modifiedmlir/lib/Dialect/Linalg/IR/LinalgOps.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Promotion.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Tiling.cpp
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgTraits.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/Fusion.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Analysis/DependenceAnalysis.cpp
The file was modifiedmlir/test/Dialect/Linalg/invalid.mlir
The file was modifiedmlir/include/mlir/Dialect/Linalg/IR/LinalgStructuredOps.td
The file was modifiedmlir/include/mlir/Dialect/Linalg/Utils/Utils.h
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgTransforms.cpp
The file was modifiedmlir/lib/Dialect/Linalg/Transforms/LinalgToLoops.cpp
Commit 729530f68fe135ad41d470fbed019cc5e31ac8a5 by l.lunak
-fmodules-codegen should not emit extern templates
If a header contains 'extern template', then the template should be
provided somewhere by an explicit instantiation, so it is not necessary
to generate a copy. Worse, this can lead to an unresolved symbol,
because the codegen's object file will not actually contain functions
from such a template because of the GVA_AvailableExternally, but the
object file for the explicit instantiation will not contain them either
because it will be blocked by the information provided by the module.
Differential Revision: https://reviews.llvm.org/D69779
The file was addedclang/test/Modules/codegen-extern-template.cpp
The file was addedclang/test/Modules/codegen-extern-template.modulemap
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
The file was addedclang/test/Modules/codegen-extern-template.h
Commit b5b2cf7af47f1ca04635dae7b787c8a81d5af4c9 by l.lunak
fix recent -fmodules-codegen fix test
The file was removedclang/test/Modules/codegen-extern-template.modulemap
The file was addedclang/test/Modules/Inputs/codegen-extern-template.modulemap
The file was modifiedclang/test/Modules/codegen-extern-template.cpp
Commit cbc9d22e49b434b6ceb2eb94b67079d02e0a7b74 by l.lunak
make -fmodules-codegen and -fmodules-debuginfo work also with PCHs
Allow to build PCH's (with -building-pch-with-obj and the extra .o file)
with -fmodules-codegen -fmodules-debuginfo to allow emitting shared code
into the extra .o file, similarly to how it works with modules. A bit of
a misnomer, but the underlying functionality is the same. This saves up
to 20% of build time here.
Differential Revision: https://reviews.llvm.org/D69778
The file was modifiedclang/lib/Serialization/ASTReader.cpp
The file was modifiedclang/lib/Serialization/ASTReaderDecl.cpp
The file was modifiedclang/lib/Serialization/ASTWriter.cpp
The file was modifiedclang/test/Modules/Inputs/codegen-flags/foo.h
The file was addedclang/test/PCH/codegen.cpp
The file was modifiedclang/lib/Serialization/ASTWriterDecl.cpp
Commit 20c6e0749461147df19a3b126d1a48106c63c351 by riverriddle
[mlir] Enable printing of FuncOp in the generic form.
Summary: This was previously disabled as FunctionType TypeAttrs could
not be roundtripped in the IR. This has been fixed, so we can now
generically print FuncOp.
Depends On D72429
Reviewed By: jpienaar, mehdi_amini
Differential Revision: https://reviews.llvm.org/D72642
The file was modifiedmlir/test/IR/wrapping_op.mlir
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
Commit 23058f9dd4d7e18239fd63b6da52549514b45fda by a.bataev
[OPENMP]Do not use RTTI by default for NVPTX devices.
NVPTX does not support RTTI, so disable it by default.
The file was modifiedclang/lib/Driver/ToolChain.cpp
The file was addedclang/test/Driver/openmp-offload-gpu.cpp
Commit fa9dd8336bbd1167926f93fe2018d0c47839d5d6 by riverriddle
[mlir] Refactor ModuleState into AsmState and expose it to users.
Summary: This allows for users to cache printer state, which can be
costly to recompute. Each of the IR print methods gain a new overload
taking this new state class.
Depends On D72293
Reviewed By: jpienaar
Differential Revision: https://reviews.llvm.org/D72294
The file was modifiedmlir/include/mlir/IR/Operation.h
The file was modifiedmlir/include/mlir/IR/Module.h
The file was modifiedmlir/include/mlir/IR/Value.h
The file was modifiedmlir/lib/IR/AsmPrinter.cpp
The file was modifiedmlir/include/mlir/IR/Block.h
The file was modifiedmlir/include/mlir/IR/OpDefinition.h
The file was addedmlir/include/mlir/IR/AsmState.h