SuccessChanges

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [remark][diagnostics] Using clang diagnostic handler for IR input files (details)
  2. [mlir][spirv] Properly support SPIR-V conversion target (details)
  3. [codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU. (details)
  4. [LIBOMPTARGET] Do not increment/decrement the refcount for "declare (details)
  5. Fix windows bot failures in c410adb092c9cb51ddb0b55862b70f2aa8c5b16f (details)
  6. [libcxx] Use C11 thread API on Fuchsia (details)
  7. [mlir] : Fix ViewOp shape folder for identity affine maps (details)
  8. [X86] Swap the 0 and the fudge factor in the constant pool for the (details)
  9. [X86] Drop an unneeded FIXME. NFC (details)
  10. [amdgpu] Fix typos in a test case. (details)
Commit 60d39479221d6bc09060f7816bcd7c54eb286603 by xur
[remark][diagnostics] Using clang diagnostic handler for IR input files
For IR input files, we currently use LLVM diagnostic handler even the
compilation is from clang. As a result, we are not able to use -Rpass to
get the transformation reports. Some warnings are not handled properly
either: We found many mysterious warnings in our ThinLTO backend
compilations in SamplePGO and CSPGO. An example of the warning:
"warning: net/proto2/public/metadata_lite.h:51:21: 0.02% (1 / 4999)"
This turns out to be a warning by Wmisexpect, which is supposed to be
filtered out by default. But since the filter is in clang's diagnostic
hander, we emit these incomplete warnings from LLVM's diagnostic
handler.
This patch uses clang diagnostic handler for IR input files. We create a
fake backendconsumer just to install the diagnostic handler.
With this change, we will have proper handling of all the warnings and
we can use -Rpass* options in IR input files compilation. Also note that
with is patch, LLVM's diagnostic options, like
"-mllvm -pass-remarks=*", are no longer be able to get optimization
remarks.
Differential Revision: https://reviews.llvm.org/D72523
The file was addedclang/test/CodeGen/Inputs/thinlto_expect1.proftext
The file was addedclang/test/CodeGen/thinlto-clang-diagnostic-handler-in-be.c
The file was modifiedclang/lib/CodeGen/CodeGenAction.cpp
The file was addedclang/test/CodeGen/Inputs/thinlto_expect2.proftext
The file was modifiedclang/test/CodeGen/thinlto-diagnostic-handler-remarks-with-hotness.ll
Commit 47c6ab2b97773ee5fb360fc093a5824be64b8c68 by antiagainst
[mlir][spirv] Properly support SPIR-V conversion target
This commit defines a new SPIR-V dialect attribute for specifying a
SPIR-V target environment. It is a dictionary attribute containing the
SPIR-V version, supported extension list, and allowed capability list. A
SPIRVConversionTarget subclass is created to take in the target
environment and sets proper dynmaically legal ops by querying the op
availability interface of SPIR-V ops to make sure they are available in
the specified target environment. All existing conversions targeting
SPIR-V is changed to use this SPIRVConversionTarget. It probes whether
the input IR has a `spv.target_env` attribute, otherwise, it uses the
default target environment: SPIR-V 1.0 with Shader capability and no
extra extensions.
Differential Revision: https://reviews.llvm.org/D72256
The file was modifiedmlir/lib/Conversion/StandardToSPIRV/ConvertStandardToSPIRVPass.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/Transforms/LowerABIAttributesPass.cpp
The file was modifiedmlir/lib/Conversion/GPUToSPIRV/ConvertGPUToSPIRVPass.cpp
The file was modifiedmlir/test/Dialect/SPIRV/target-and-abi.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.h
The file was modifiedmlir/docs/Dialects/SPIR-V.md
The file was modifiedmlir/include/mlir/Dialect/SPIRV/TargetAndABI.td
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVDialect.cpp
The file was modifiedmlir/test/Dialect/SPIRV/TestAvailability.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/SPIRVLowering.cpp
The file was modifiedmlir/lib/Dialect/SPIRV/TargetAndABI.cpp
The file was addedmlir/test/Dialect/SPIRV/target-env.mlir
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVLowering.h
Commit 01a4b83154760ea286117ac4de9576b8a215cb8d by michael.hliao
[codegen,amdgpu] Enhance MIR DIE and re-arrange it for AMDGPU.
Summary:
- `dead-mi-elimination` assumes MIR in the SSA form and cannot be
arranged after phi elimination or DeSSA. It's enhanced to handle the
dead register definition by skipping use check on it. Once a register
def is `dead`, all its uses, if any, should be `undef`.
- Re-arrange the DIE in RA phase for AMDGPU by placing it directly after
`detect-dead-lanes`.
- Many relevant tests are refined due to different register assignment.
Reviewers: rampitec, qcolombet, sunfish
Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl,
dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72709
The file was modifiedllvm/test/CodeGen/AMDGPU/copy-illegal-type.ll
The file was modifiedllvm/lib/CodeGen/DeadMachineInstructionElim.cpp
The file was addedllvm/test/CodeGen/AMDGPU/dead-machine-elim-after-dead-lane.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/loop_break.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/select.f16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/spill-vgpr-to-agpr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.round.f64.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_optimizations_local_pointer.ll
The file was modifiedllvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
The file was removedllvm/test/CodeGen/AMDGPU/dead-mi-use-same-intr.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/idot8u.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/bswap.ll
Commit e244145ab08ae79ea3d22c2fe479ec084dbd7742 by georgios.rokos
[LIBOMPTARGET] Do not increment/decrement the refcount for "declare
target" objects
The reference counter for global objects marked with declare target is
INF. This patch prevents the runtime from incrementing /decrementing INF
refcounts. Without it, the map(delete: global_object) directive actually
deallocates the global on the device. With this patch, such a directive
becomes a no-op.
Differential Revision: https://reviews.llvm.org/D72525
The file was modifiedopenmp/libomptarget/src/device.cpp
The file was addedopenmp/libomptarget/test/mapping/delete_inf_refcount.c
The file was modifiedopenmp/libomptarget/src/omptarget.cpp
The file was modifiedopenmp/libomptarget/src/device.h
Commit c9ee5e996e3c89a751a35e8b771870e0ec24f3c0 by xur
Fix windows bot failures in c410adb092c9cb51ddb0b55862b70f2aa8c5b16f
(clang diagnostic handler for IR input files)
The file was modifiedclang/test/CodeGen/thinlto-clang-diagnostic-handler-in-be.c
Commit ab9aefee9fa09957d1a3e76fcc47abda0d002255 by phosek
[libcxx] Use C11 thread API on Fuchsia
On Fuchsia, pthread API is emulated on top of C11 thread API. Using C11
thread API directly is more efficient.
While this implementation is only used by Fuchsia at the moment, it's
not Fuchsia specific, and could be used by other platforms that use C11
threads rather than pthreads in the future.
Differential Revision: https://reviews.llvm.org/D64378
The file was modifiedlibcxx/include/__threading_support
The file was modifiedlibcxx/include/__config
Commit ab035647061272b7efa39364c42e48972cebc0ab by ataei
[mlir] : Fix ViewOp shape folder for identity affine maps
Summary: Fix the ViewOpShapeFolder in case of no affine mapping
associated with a Memref construct identity mapping.
Reviewers: nicolasvasilache
Subscribers: mehdi_amini, rriddle, jpienaar, burmako, shauheen,
antiagainst, arpith-jacob, mgester, lucyrfox, liufengdb, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D72735
The file was modifiedmlir/lib/Dialect/StandardOps/Ops.cpp
The file was modifiedmlir/test/Transforms/canonicalize.mlir
Commit 57eb56b83926675dd8a554fc8a8e28ee57278f90 by craig.topper
[X86] Swap the 0 and the fudge factor in the constant pool for the
32-bit mode i64->f32/f64/f80 uint_to_fp algorithm.
This allows us to generate better code for selecting the fixup to load.
Previously when the sign was set we had to load offset 0. And when it
was clear we had to load offset 4. This required a testl, setns, zero
extend, and finally a mul by 4. By switching the offsets we can just
shift the sign bit into the lsb and multiply it by 4.
The file was modifiedllvm/test/CodeGen/X86/scalar-int-to-fp.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-512.ll
The file was modifiedllvm/test/CodeGen/X86/fp-intrinsics.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-256.ll
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
The file was modifiedllvm/test/CodeGen/X86/pr44396.ll
The file was modifiedllvm/test/CodeGen/X86/pr15309.ll
The file was modifiedllvm/test/CodeGen/X86/uint64-to-float.ll
The file was modifiedllvm/test/CodeGen/X86/fp-strict-scalar-inttofp.ll
The file was modifiedllvm/test/CodeGen/X86/avx512-intrinsics-fast-isel.ll
The file was modifiedllvm/test/CodeGen/X86/fildll.ll
The file was modifiedllvm/test/CodeGen/X86/vec-strict-inttofp-128.ll
The file was modifiedllvm/test/CodeGen/X86/fp-cvt.ll
The file was modifiedllvm/test/CodeGen/X86/fp80-strict-scalar.ll
The file was modifiedllvm/test/CodeGen/X86/half.ll
Commit 76291e1158c2aedddfe0be0ea69452ea6dc2db24 by craig.topper
[X86] Drop an unneeded FIXME. NFC
The extload on X87 is free.
The file was modifiedllvm/lib/Target/X86/X86ISelLowering.cpp
Commit 65c8abb14e77b28d8357c52dddb8e0a6b12b4ba2 by michael.hliao
[amdgpu] Fix typos in a test case.
- There are typos introduced due to merge.
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll