FailedChanges

Changes from Git (git http://labmaster3.local/git/llvm-zorg.git)

Summary

  1. [zorg] [PowerPC] set lld as the default linker on ppc64le-clang-rhel bot (details)
Commit f6a1fc1366bd977313c9e332c54357b297959d6b by saghir
[zorg] [PowerPC] set lld as the default linker on ppc64le-clang-rhel bot

This patch sets lld as the default linker for ppc64le-clang-rhel-test
buildbot.

Reviewed By: gkistanova

Differential Revision: https://reviews.llvm.org/D87993
The file was modifiedbuildbot/osuosl/master/config/builders.py

Changes from Git (git http://labmaster3.local/git/llvm-project.git)

Summary

  1. [NFC][ARM] Pre-commit tail predication test (details)
  2. [SystemZ] Make sure not to call getZExtValue on a >64 bit constant. (details)
  3. [mlir] Fix typos in Dialect.h. NFC. (details)
  4. [VPlan] Disconnect VPValue and VPUser. (details)
  5. [SVE] Lower fixed length ISD::VECREDUCE_ADD to Scalable (details)
  6. [clangd] Refactor code completion signal's utility properties. (details)
  7. [docs][llvm] Fix typos (details)
  8. [mlir][openacc] Use OptionalParseResult in loop op parser instead of bool variables (details)
  9. Add Operation to python bindings. (details)
  10. Implement python iteration over the operation/region/block hierarchy. (details)
  11. Add mlir python APIs for creating operations, regions and blocks. (details)
  12. NFC: Remove unused variable. (details)
  13. [mlir][ods] Custom builder with no params (details)
  14. [mlir] Remove unneeded OpBuilder params. NFC. (details)
  15. Revert "[AMDGPU] Insert waitcnt after returning from call" (details)
  16. Add missing namespace closure comment. NFCI. (details)
  17. Add missing namespace closure comments. NFCI. (details)
  18. [AArch64] Fix ldst optimization of non-immediate store offset (details)
  19. recommit [HIP] Fix -gsplit-dwarf option (details)
  20. [lldb] Remove lldb-perf remenant (details)
  21. [mlir] Add insert before/after to list-like constructs in C API (details)
Commit 00c34f72fba4b6b8a446d57e2257c27eedad1a1d by sam.parker
[NFC][ARM] Pre-commit tail predication test
The file was addedllvm/test/CodeGen/Thumb2/LowOverheadLoops/lstp-insertion-position.mir
Commit 370a8c802558ed7aedbcc09c1bdf4c2d3f4c28c0 by paulsson
[SystemZ] Make sure not to call getZExtValue on a >64 bit constant.

Better use isZero() and isIntN() in SystemZTargetTransformInfo rather than
calling getZExtValue() since the immediate operand may be wider than 64 bits,
which is not allowed with getZExtValue().

Fixes https://bugs.llvm.org/show_bug.cgi?id=47600

Review: Simon Pilgrim
The file was modifiedllvm/lib/Target/SystemZ/SystemZTargetTransformInfo.cpp
The file was addedllvm/test/Analysis/CostModel/SystemZ/huge-immediates.ll
Commit 9691806840606d48139b13516e9576902ba98923 by zinenko
[mlir] Fix typos in Dialect.h. NFC.
The file was modifiedmlir/include/mlir/IR/Dialect.h
Commit 31923f6b360300b8b148ad257419766999dfe504 by flo
[VPlan] Disconnect VPValue and VPUser.

This refactors VPuser to not inherit from VPValue to facilitate
introducing operations that introduce multiple VPValues (e.g.
VPInterleaveRecipe).

Reviewed By: Ayal

Differential Revision: https://reviews.llvm.org/D84679
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanSLP.cpp
The file was modifiedllvm/lib/Transforms/Vectorize/VPlanValue.h
The file was modifiedllvm/lib/Transforms/Vectorize/VPlan.h
The file was modifiedllvm/docs/Proposals/VectorizationPlan.rst
Commit db40a74344292410aa3e08c42834423013c4f192 by mcinally
[SVE] Lower fixed length ISD::VECREDUCE_ADD to Scalable

Differential Revision: https://reviews.llvm.org/D87796
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.cpp
The file was addedllvm/test/CodeGen/AArch64/sve-fixed-length-int-reduce.ll
The file was modifiedllvm/lib/Target/AArch64/AArch64ISelLowering.h
Commit 158af0d3d165c0382a6a291e81ffecf0b18ffe77 by usx
[clangd] Refactor code completion signal's utility properties.

Current implementation of heuristic-based scoring function also contains
computation of derived signals (e.g. whether name contains a word from
context, computing file distances, scope distances.)
This is an attempt to separate out the logic for computation of derived
signals from the scoring function.
This will allow us to have a clean API for scoring functions that will
take only concrete code completion signals as input.

Differential Revision: https://reviews.llvm.org/D88146
The file was modifiedclang-tools-extra/clangd/Quality.cpp
The file was modifiedclang-tools-extra/clangd/Quality.h
Commit 270d334a665faa574db0c7d3a23af78bed9366d0 by paul
[docs][llvm] Fix typos

I don't have commit access.
Please help me commit it.
Thanks : )

Reviewed By: Paul-C-Anagnostopoulos

Differential Revision: https://reviews.llvm.org/D88139
The file was modifiedllvm/docs/TableGen/BackGuide.rst
Commit bd8b50cd7f5dd5237ec9187ef2fcea3adc15b61a by clementval
[mlir][openacc] Use OptionalParseResult in loop op parser instead of bool variables

This patch switch from using bool variables to OptionalParseResult for the parsing
inside loop operation. This is already done for parallel operation and this patch unify this
in the dialect.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D88111
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Commit 7abb0ff7e0419a9554d77e9108cb7da670b7471c by stellaraccident
Add Operation to python bindings.

* Fixes a rather egregious bug with respect to the inability to return arbitrary objects from py::init (was causing aliasing of multiple py::object -> native instance).
* Makes Modules and Operations referencable types so that they can be reliably depended on.
* Uniques python operation instances within a context. Opens the door for further accounting.
* Next I will retrofit region and block to be dependent on the operation, and I will attempt to model the API to avoid detached regions/blocks, which will simplify things a lot (in that world, only operations can be detached).
* Added quite a bit of test coverage to check for leaks and reference issues.
* Supercedes: https://reviews.llvm.org/D87213

Differential Revision: https://reviews.llvm.org/D87958
The file was modifiedmlir/test/Bindings/Python/ir_module.py
The file was modifiedmlir/docs/Bindings/Python.md
The file was modifiedmlir/test/Bindings/Python/ir_attributes.py
The file was modifiedmlir/lib/Bindings/Python/IRModules.h
The file was modifiedmlir/test/Bindings/Python/ir_operation.py
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/test/Bindings/Python/ir_location.py
The file was modifiedmlir/test/Bindings/Python/ir_types.py
Commit 4cf754c4bca94e957b634a854f57f4c7ec9151fb by stellaraccident
Implement python iteration over the operation/region/block hierarchy.

* Removes the half-completed prior attempt at region/block mutation in favor of new approach to ownership.
* Will re-add mutation more correctly in a follow-on.
* Eliminates the detached state on blocks and regions, simplifying the ownership hierarchy.
* Adds both iterator and index based access at each level.

Differential Revision: https://reviews.llvm.org/D87982
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/test/Bindings/Python/ir_operation.py
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/lib/CAPI/IR/CMakeLists.txt
The file was modifiedmlir/lib/Bindings/Python/IRModules.h
The file was modifiedmlir/include/mlir-c/IR.h
Commit c1ded6a759913a32b44a851f0823bbb648d2a7e1 by stellaraccident
Add mlir python APIs for creating operations, regions and blocks.

* The API is a bit more verbose than I feel like it needs to be. In a follow-up I'd like to abbreviate some things and look in to creating aliases for common accessors.
* There is a lingering lifetime hazard between the module and newly added operations. We have the facilities now to solve for this but I will do that in a follow-up.
* We may need to craft a more limited API for safely referencing successors when creating operations. We need more facilities to really prove that out and should defer for now.

Differential Revision: https://reviews.llvm.org/D87996
The file was modifiedmlir/lib/Bindings/Python/IRModules.cpp
The file was modifiedmlir/lib/Bindings/Python/PybindUtils.h
The file was modifiedmlir/lib/Bindings/Python/IRModules.h
The file was modifiedmlir/test/Bindings/Python/ir_operation.py
Commit 8e84972ab7060ace889bb383e76dc2c835a47c06 by stellaraccident
NFC: Remove unused variable.
The file was modifiedmlir/lib/Dialect/OpenACC/IR/OpenACC.cpp
Commit 80deb1e106a8c3c5ba31ef0bb4d7651acb6e6b69 by jpienaar
[mlir][ods] Custom builder with no params

Incorrect generation of custom build method without any params.
The file was modifiedmlir/tools/mlir-tblgen/OpDefinitionsGen.cpp
Commit 501d7e07e31d8f79160324e683e4931403f469d5 by jpienaar
[mlir] Remove unneeded OpBuilder params. NFC.

These are now automatically prepended.
The file was modifiedmlir/include/mlir/Dialect/PDL/IR/PDLOps.td
The file was modifiedmlir/include/mlir/Dialect/PDLInterp/IR/PDLInterpOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVAtomicOps.td
The file was modifiedmlir/examples/toy/Ch2/include/toy/Ops.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVCompositeOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVNonUniformOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVStructureOps.td
The file was modifiedmlir/examples/toy/Ch6/include/toy/Ops.td
The file was modifiedmlir/examples/toy/Ch7/include/toy/Ops.td
The file was modifiedmlir/examples/toy/Ch5/include/toy/Ops.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVLogicalOps.td
The file was modifiedmlir/examples/toy/Ch3/include/toy/Ops.td
The file was modifiedmlir/examples/toy/Ch4/include/toy/Ops.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVControlFlowOps.td
The file was modifiedmlir/include/mlir/Dialect/SPIRV/SPIRVOps.td
Commit a343b9b032772894a7e27fcd03ebec3c53faa5d9 by sebastian.neubauer
Revert "[AMDGPU] Insert waitcnt after returning from call"

This reverts commit ca907bfb57d8ad3ec3bcc2cff2abab7b1b933af6.

According to michel.daenzer,
> This completely broke the Mesa radeonsi driver on Navi 14. Xorg +
> xterm come up with major corruption & psychedelic colours.
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.gather4.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.getlod.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.format.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/vector_shuffle.packed.ll
The file was modifiedllvm/lib/Target/AMDGPU/SIInsertWaitcnts.cpp
The file was modifiedllvm/test/CodeGen/AMDGPU/vgpr-tuple-allocation.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.dwordx3.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.d16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_load_local.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/offset-split-global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmax_legacy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.add.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mad-mix-hi.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicit.buffer.ptr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-atomics.gfx1030.ll
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.implicitarg.ptr.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.ds.ordered.swap.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/wave32.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-frame-setup.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-lo16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/sibling-call.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cross-block-use-is-not-abi-copy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/hsa-func.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/smrd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.private.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-argument-types.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/non-entry-alloca.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.fadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/fast-unaligned-load-store.global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/offset-split-flat.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmax.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/function-args.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memcpy-fixed-align.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-constant.96.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/multi-divergent-exit-region.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.format.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement-stack-lower.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.raw.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/scalar-store-cache-flush.mir
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.1d.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.2darraymsaa.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/image_ls_mipmap_zero.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/callee-special-input-vgprs.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fadd.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/undefined-subreg-liverange.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.ltolz.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.global.atomic.csub.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/mubuf-global.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/visit-physreg-vgpr-imm-folding-bug.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/memory_clause.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/imm16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.encode.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/local-stack-alloc-block-sp-reference.ll
The file was modifiedllvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected
The file was modifiedllvm/test/CodeGen/AMDGPU/lds-global-non-entry-func.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.encode.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/infer-uniform-load-shader.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/nested-calls.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/ret_jump.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.load.3d.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/insertelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/shl.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-hi16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/atomic_store_local.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/cvt_f32_ubyte.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.o.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/store-weird-sizes.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.getresinfo.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/mul24-pass-ordering.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/fmin_legacy.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-realign.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-local.128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/function-returns.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.i128.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.sample.ltolz.a16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/stack-pointer-offset-relative-frameindex.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.buffer.load.format.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.gather4.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/lds-global-non-entry-func.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.tbuffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/load-hi16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-waitcnt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/load-unaligned.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/call-preserved-registers.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/global-saddr-atomics.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.struct.buffer.load.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.d16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.a16.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.image.atomic.dim.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/zextload.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/extractelement.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/insert_vector_elt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.ds.fmin.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/waitcnt-vscnt.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/llvm.amdgcn.image.sample.g16.ll
The file was modifiedllvm/test/CodeGen/AMDGPU/chain-hi-to-lo.ll
Commit 474dc33d075ae6b136bcaa4e4c5014d3deda5d25 by llvm-dev
Add missing namespace closure comment. NFCI.

Fixes clang-tidy llvm-namespace-comment warning.
The file was modifiedllvm/lib/Transforms/Vectorize/LoopVectorize.cpp
Commit 91589cf679c7946edfb5b33d1eb94d723ad99e2b by llvm-dev
Add missing namespace closure comments. NFCI.

Fixes some clang-tidy llvm-namespace-comment warnings.
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombineAtomicRMW.cpp
The file was modifiedllvm/lib/Transforms/InstCombine/InstCombinePHI.cpp
Commit c2deacd929dabded734a478e78c1eef23aa459c5 by weiwei64
[AArch64] Fix ldst optimization of non-immediate store offset

When matching store instruction for ldst opt, we should make sure store instr is in 'reg+imm' form as load instr,
otherwise, it will have assertion in isLdOffsetInRangeOfSt since it will use getImm() directly.

Reviewed By: efriedma

Differential Revision: https://reviews.llvm.org/D87905
The file was modifiedllvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
The file was addedllvm/test/CodeGen/AArch64/ldst-opt-non-imm-offset.mir
Commit e6d50b4f22dc6bbf0b0b40cfdab172bf5c1694e1 by Yaxun.Liu
recommit [HIP] Fix -gsplit-dwarf option

recommit e50465ecefc964e5700df26fc7e02a673eed085a with fix for
regression in lldb tests.

Two issues:

1. the directory part of original .dwo file was dropped
2. if the stem of the .dwo file contains '.', the last dot
and strings after that were removed

This recommit fixes those two issues.
The file was modifiedclang/lib/Driver/ToolChains/Gnu.cpp
The file was modifiedclang/lib/Driver/ToolChains/Clang.cpp
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.h
The file was modifiedclang/lib/Driver/ToolChains/MinGW.cpp
The file was addedclang/test/Driver/hip-gsplit-dwarf-options.hip
The file was modifiedclang/lib/Driver/ToolChains/CommonArgs.cpp
Commit 9abd1e8f4e5ddd6e5e592306432fb32dd68f4c14 by davelee.com
[lldb] Remove lldb-perf remenant

Delete a file remaining from the deletion of lldb-perf in D64362.

Differential Revision: https://reviews.llvm.org/D88119
The file was removedlldb/tools/lldb-perf/darwin/sketch/foobar.sketch2
Commit c538169ee99516c178ecc00a5ec5187d78941fac by zinenko
[mlir] Add insert before/after to list-like constructs in C API

Blocks in a region and operations in a block are organized in a linked list.
The C API only provides functions to append or to insert elements at the
specified numeric position in the list. The latter is expensive since it
requires to traverse the list. Add insert before/after functionality with low
cost that relies on the iplist elements being convertible to iterators.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D88148
The file was modifiedmlir/lib/CAPI/IR/IR.cpp
The file was modifiedmlir/test/CAPI/ir.c
The file was modifiedmlir/include/mlir-c/IR.h