SuccessChanges

Summary

  1. [mlir] [VectorOps] Add expand/compress operations to Vector dialect (details)
  2. [libc++abi] Make sure we use a 32 bit guard on 32 bit Aarch64 (details)
  3. AMDGPU/GlobalISel: Add baseline tests for andn2/orn2 matching (details)
  4. GlobalISel: Add node mappings for frameindex/blockaddress (details)
  5. [libc] Add implementations for isblank, iscntrl, isgraph, ispunct. (details)
  6. GlobalISel: Handle llvm.localescape (details)
  7. [llvm-symbolizer][test] Fix pdb/pdb.test after D83530 (details)
  8. [MLIR][Affine] Fix createPrivateMemRef in affine fusion (details)
Commit e8dcf5f87dc20b3f08005ac767ff934e36bf2a5b by ajcbik
[mlir] [VectorOps] Add expand/compress operations to Vector dialect

Introduces the expand and compress operations to the Vector dialect
(important memory operations for sparse computations), together
with a first reference implementation that lowers to the LLVM IR
dialect to enable running on CPU (and other targets that support
the corresponding LLVM IR intrinsics).

Reviewed By: reidtatge

Differential Revision: https://reviews.llvm.org/D84888
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-compress.mlir
The file was modifiedmlir/include/mlir/Dialect/LLVMIR/LLVMOps.td
The file was modifiedmlir/lib/Dialect/Vector/VectorOps.cpp
The file was modifiedmlir/test/Target/llvmir-intrinsics.mlir
The file was modifiedmlir/test/Dialect/Vector/ops.mlir
The file was modifiedmlir/test/Dialect/Vector/invalid.mlir
The file was modifiedmlir/integration_test/Dialect/Vector/CPU/test-scatter.mlir
The file was modifiedmlir/test/Conversion/VectorToLLVM/vector-to-llvm.mlir
The file was addedmlir/integration_test/Dialect/Vector/CPU/test-expand.mlir
The file was modifiedmlir/lib/Conversion/VectorToLLVM/ConvertVectorToLLVM.cpp
The file was modifiedmlir/include/mlir/Dialect/Vector/VectorOps.td
Commit d0ad9e93ce546eb3d372f1b815b164ba137fd701 by Louis Dionne
[libc++abi] Make sure we use a 32 bit guard on 32 bit Aarch64
The file was modifiedlibcxxabi/include/__cxxabi_config.h
Commit 14ed5cf5c461cf34faf5729424b4221d30e24dcc by arsenm2
AMDGPU/GlobalISel: Add baseline tests for andn2/orn2 matching
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
The file was addedllvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
Commit f2942f9c26a39340f8604857c7c90e6ade02a381 by arsenm2
GlobalISel: Add node mappings for frameindex/blockaddress
The file was modifiedllvm/include/llvm/Target/GlobalISel/SelectionDAGCompat.td
Commit 6cd50e7b75ed39ba1218c724401117cb6e12748d by gyurgyikcp
[libc] Add implementations for isblank, iscntrl, isgraph, ispunct.

Reviewed By: sivachandra

Differential Revision: https://reviews.llvm.org/D85059
The file was addedlibc/test/src/ctype/isgraph_test.cpp
The file was addedlibc/src/ctype/ispunct.cpp
The file was addedlibc/src/ctype/iscntrl.h
The file was modifiedlibc/config/linux/api.td
The file was addedlibc/src/ctype/isblank.h
The file was addedlibc/src/ctype/isgraph.h
The file was modifiedlibc/src/ctype/isalnum.cpp
The file was addedlibc/test/src/ctype/ispunct_test.cpp
The file was modifiedlibc/test/src/ctype/CMakeLists.txt
The file was addedlibc/src/ctype/isblank.cpp
The file was addedlibc/src/ctype/ispunct.h
The file was modifiedlibc/config/linux/x86_64/entrypoints.txt
The file was addedlibc/src/ctype/isgraph.cpp
The file was addedlibc/test/src/ctype/isblank_test.cpp
The file was addedlibc/src/ctype/iscntrl.cpp
The file was modifiedlibc/src/ctype/CMakeLists.txt
The file was modifiedlibc/config/linux/aarch64/entrypoints.txt
The file was modifiedlibc/spec/stdc.td
The file was modifiedlibc/src/ctype/ctype_utils.h
The file was addedlibc/test/src/ctype/iscntrl_test.cpp
Commit 3e16e2152cd1fb3914d4da47d83d5e023dd3f2cb by Matthew.Arsenault
GlobalISel: Handle llvm.localescape

This one is pretty easy and shrinks the list of unhandled
intrinsics. I'm not sure how relevant the insert point is. Using the
insert position of EntryBuilder will place this after
constants. SelectionDAG seems to end up emitting these after argument
copies and before anything else, but I don't think it really
matters. This also ends up emitting these in the opposite order from
SelectionDAG, but I don't think that matters either.

This also needs a fix to stop the later passes dropping this as a dead
instruction. DeadMachineInstructionElim's version of isDead special
cases LOCAL_ESCAPE for some reason, and I'm not sure why it's excluded
from MachineInstr::isLabel (or why isDead doesn't check it).

I also noticed DeadMachineInstructionElim never considers inline asm
as dead, but GlobalISel will drop asm with no constraints.
The file was modifiedllvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/irtranslator-localescape.ll
The file was modifiedllvm/lib/CodeGen/GlobalISel/Utils.cpp
The file was addedllvm/test/CodeGen/AArch64/GlobalISel/labels-are-not-dead.mir
Commit 0729a772806e5ae38603c164c2f60e5e9f9e65e5 by i
[llvm-symbolizer][test] Fix pdb/pdb.test after D83530

This is a Windows only test which requires HAVE_DIA_SDK, so I failed to notice it.
The file was modifiedllvm/test/tools/llvm-symbolizer/pdb/pdb.test
Commit 3bfbc5df87cb0e736fe917e4a8d5166bc0b4ea79 by diego.caballero
[MLIR][Affine] Fix createPrivateMemRef in affine fusion

Always define a remapping for the memref replacement (`indexRemap`)
with the proper number of inputs, including all the `outerIVs`, so that
the number of inputs and the operands provided for the map don't mismatch.

Reviewed By: bondhugula, andydavis1

Differential Revision: https://reviews.llvm.org/D85177
The file was modifiedmlir/lib/Transforms/LoopFusion.cpp
The file was modifiedmlir/test/Transforms/loop-fusion.mlir